blob: 9b9b980f429239865ab8f746f1abd5a74de051ff [file] [log] [blame]
wdenk3bac3512003-03-12 10:41:04 +00001/*
2**=====================================================================
3**
4** Copyright (C) 2000, 2001, 2002, 2003
5** The LEOX team <team@leox.org>, http://www.leox.org
6**
7** LEOX.org is about the development of free hardware and software resources
8** for system on chip.
9**
10** Description: U-Boot port on the LEOX's ELPT860 CPU board
11** ~~~~~~~~~~~
12**
13**=====================================================================
14**
15** This program is free software; you can redistribute it and/or
16** modify it under the terms of the GNU General Public License as
17** published by the Free Software Foundation; either version 2 of
18** the License, or (at your option) any later version.
19**
20** This program is distributed in the hope that it will be useful,
21** but WITHOUT ANY WARRANTY; without even the implied warranty of
22** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23** GNU General Public License for more details.
24**
25** You should have received a copy of the GNU General Public License
26** along with this program; if not, write to the Free Software
27** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28** MA 02111-1307 USA
29**
30**=====================================================================
31*/
32
33OUTPUT_ARCH(powerpc)
wdenk3bac3512003-03-12 10:41:04 +000034/* Do we need any of these for elf?
35 __DYNAMIC = 0; */
36SECTIONS
37{
38 /* Read-only sections, merged into text segment: */
39 . = + SIZEOF_HEADERS;
40 .interp : { *(.interp) }
41 .hash : { *(.hash) }
42 .dynsym : { *(.dynsym) }
43 .dynstr : { *(.dynstr) }
44 .rel.text : { *(.rel.text) }
Wolfgang Denkdd520bf2006-11-30 18:02:20 +010045 .rela.text : { *(.rela.text) }
wdenk3bac3512003-03-12 10:41:04 +000046 .rel.data : { *(.rel.data) }
Wolfgang Denkdd520bf2006-11-30 18:02:20 +010047 .rela.data : { *(.rela.data) }
48 .rel.rodata : { *(.rel.rodata) }
49 .rela.rodata : { *(.rela.rodata) }
wdenk3bac3512003-03-12 10:41:04 +000050 .rel.got : { *(.rel.got) }
51 .rela.got : { *(.rela.got) }
52 .rel.ctors : { *(.rel.ctors) }
53 .rela.ctors : { *(.rela.ctors) }
54 .rel.dtors : { *(.rel.dtors) }
55 .rela.dtors : { *(.rela.dtors) }
56 .rel.bss : { *(.rel.bss) }
57 .rela.bss : { *(.rela.bss) }
58 .rel.plt : { *(.rel.plt) }
59 .rela.plt : { *(.rela.plt) }
60 .init : { *(.init) }
61 .plt : { *(.plt) }
62 .text :
63 {
64 /* WARNING - the following is hand-optimized to fit within */
65 /* the sector layout of our flash chips! XXX FIXME XXX */
66
67 cpu/mpc8xx/start.o (.text)
68 common/dlmalloc.o (.text)
69 lib_ppc/ppcstring.o (.text)
70 lib_generic/vsprintf.o (.text)
71 lib_generic/crc32.o (.text)
72 lib_generic/zlib.o (.text)
73 lib_generic/string.o (.text)
74 lib_ppc/cache.o (.text)
75 lib_ppc/extable.o (.text)
76 lib_ppc/time.o (.text)
77 lib_ppc/ticks.o (.text)
78
79 . = env_offset;
Jean-Christophe PLAGNIOL-VILLARD0cf4fd32008-09-10 22:48:01 +020080 common/env_embedded.o (.text)
wdenk3bac3512003-03-12 10:41:04 +000081
82 *(.text)
83 *(.fixup)
84 *(.got1)
85 }
86 _etext = .;
87 PROVIDE (etext = .);
88 .rodata :
89 {
90 *(.rodata)
91 *(.rodata1)
wdenkb783eda2003-06-25 22:26:29 +000092 *(.rodata.str1.4)
Wolfgang Denk74812662005-12-12 16:06:05 +010093 *(.eh_frame)
wdenk3bac3512003-03-12 10:41:04 +000094 }
95 .fini : { *(.fini) } =0
96 .ctors : { *(.ctors) }
97 .dtors : { *(.dtors) }
98
99 /* Read-write section, merged into data segment: */
100 . = (. + 0x00FF) & 0xFFFFFF00;
101 _erotext = .;
102 PROVIDE (erotext = .);
103 .reloc :
104 {
105 *(.got)
106 _GOT2_TABLE_ = .;
107 *(.got2)
108 _FIXUP_TABLE_ = .;
109 *(.fixup)
110 }
111 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
112 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
113
114 .data :
115 {
116 *(.data)
117 *(.data1)
118 *(.sdata)
119 *(.sdata2)
120 *(.dynamic)
121 CONSTRUCTORS
122 }
123 _edata = .;
124 PROVIDE (edata = .);
125
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200126 . = .;
wdenk8bde7f72003-06-27 21:31:46 +0000127 __u_boot_cmd_start = .;
128 .u_boot_cmd : { *(.u_boot_cmd) }
129 __u_boot_cmd_end = .;
130
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200131 . = .;
wdenk3bac3512003-03-12 10:41:04 +0000132 __start___ex_table = .;
133 __ex_table : { *(__ex_table) }
134 __stop___ex_table = .;
135
136 . = ALIGN(256);
137 __init_begin = .;
138 .text.init : { *(.text.init) }
139 .data.init : { *(.data.init) }
140 . = ALIGN(256);
141 __init_end = .;
142
143 __bss_start = .;
Wolfgang Denk64134f02008-01-12 20:31:39 +0100144 .bss (NOLOAD) :
wdenk3bac3512003-03-12 10:41:04 +0000145 {
146 *(.sbss) *(.scommon)
147 *(.dynbss)
148 *(.bss)
149 *(COMMON)
Selvamuthukumar9b827cf2008-10-16 22:54:03 +0530150 . = ALIGN(4);
wdenk3bac3512003-03-12 10:41:04 +0000151 }
152 _end = . ;
153 PROVIDE (end = .);
154}