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Jagan Teki2e8dbe12018-05-28 16:34:43 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
Samuel Hollande210ec02020-10-24 10:21:55 -05002// Copyright (C) 2018 Amarula Solutions B.V.
3// Author: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki2e8dbe12018-05-28 16:34:43 +05304
5/dts-v1/;
6
7#include "sun50i-a64.dtsi"
Samuel Hollande210ec02020-10-24 10:21:55 -05008#include "sun50i-a64-cpu-opp.dtsi"
Jagan Teki2e8dbe12018-05-28 16:34:43 +05309
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
15
16 aliases {
17 serial0 = &uart0;
18 };
19
20 chosen {
21 stdout-path = "serial0:115200n8";
22 };
23
Samuel Hollande210ec02020-10-24 10:21:55 -050024 i2c {
25 compatible = "i2c-gpio";
26 sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
27 scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>;
28 i2c-gpio,delay-us = <5>;
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 ov5640: camera@3c {
33 compatible = "ovti,ov5640";
34 reg = <0x3c>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&csi_mclk_pin>;
37 clocks = <&ccu CLK_CSI_MCLK>;
38 clock-names = "xclk";
39
40 AVDD-supply = <&reg_aldo1>;
41 DOVDD-supply = <&reg_dldo3>;
42 DVDD-supply = <&reg_eldo3>;
43 reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* CSI-RST-R: PE14 */
44 powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* CSI-STBY-R: PE15 */
45
46 port {
47 ov5640_ep: endpoint {
48 remote-endpoint = <&csi_ep>;
49 bus-width = <8>;
50 hsync-active = <1>; /* Active high */
51 vsync-active = <0>; /* Active low */
52 data-active = <1>; /* Active high */
53 pclk-sample = <1>; /* Rising */
54 };
55 };
56 };
57 };
58
Andre Przywara1b39a182018-10-29 00:56:47 +000059 wifi_pwrseq: wifi-pwrseq {
60 compatible = "mmc-pwrseq-simple";
61 clocks = <&rtc 1>;
62 clock-names = "ext_clock";
63 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
Jagan Teki2e8dbe12018-05-28 16:34:43 +053064 };
65};
66
Samuel Hollande210ec02020-10-24 10:21:55 -050067&cpu0 {
68 cpu-supply = <&reg_dcdc2>;
69};
70
71&cpu1 {
72 cpu-supply = <&reg_dcdc2>;
73};
74
75&cpu2 {
76 cpu-supply = <&reg_dcdc2>;
77};
78
79&cpu3 {
80 cpu-supply = <&reg_dcdc2>;
81};
82
83&csi {
84 status = "okay";
85
86 port {
87 csi_ep: endpoint {
88 remote-endpoint = <&ov5640_ep>;
89 bus-width = <8>;
90 hsync-active = <1>; /* Active high */
91 vsync-active = <0>; /* Active low */
92 data-active = <1>; /* Active high */
93 pclk-sample = <1>; /* Rising */
94 };
95 };
96};
97
Jagan Teki2e8dbe12018-05-28 16:34:43 +053098&ehci0 {
99 status = "okay";
100};
101
Samuel Hollande210ec02020-10-24 10:21:55 -0500102&i2c0 {
103 status = "okay";
104
105 sensor@48 {
106 compatible = "st,stlm75";
107 reg = <0x48>;
108 };
109};
110
111&i2c0_pins {
112 bias-pull-up;
113};
114
115&i2c1 {
116 status = "okay";
117
118 touchscreen@5d {
119 compatible = "goodix,gt5663";
120 reg = <0x5d>;
121 AVDD28-supply = <&reg_ldo_io0>; /* VCC-CTP: GPIO0-LDO */
122 interrupt-parent = <&pio>;
123 interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
124 irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */
125 reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH8 */
126 touchscreen-inverted-x;
127 touchscreen-inverted-y;
128 };
129};
130
Andre Przywara1b39a182018-10-29 00:56:47 +0000131&mmc1 {
132 pinctrl-names = "default";
133 pinctrl-0 = <&mmc1_pins>;
134 vmmc-supply = <&reg_dcdc1>;
135 /*
136 * Schematic shows both dldo4 and eldo1 connected for vcc-io-wifi, but
137 * dldo4 connection shows DNP(Do Not Populate) and eldo1 connected with
138 * 0Ohm register to vcc-io-wifi so eldo1 is used.
139 */
140 vqmmc-supply = <&reg_eldo1>;
141 mmc-pwrseq = <&wifi_pwrseq>;
142 bus-width = <4>;
143 non-removable;
144 status = "okay";
145
146 brcmf: wifi@1 {
147 reg = <1>;
148 compatible = "brcm,bcm4329-fmac";
149 interrupt-parent = <&r_pio>;
150 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
151 interrupt-names = "host-wake";
152 };
153};
154
Jagan Teki2e8dbe12018-05-28 16:34:43 +0530155&mmc2 {
156 pinctrl-names = "default";
157 pinctrl-0 = <&mmc2_pins>;
Andre Przywara1b39a182018-10-29 00:56:47 +0000158 vmmc-supply = <&reg_dcdc1>;
Jagan Teki2e8dbe12018-05-28 16:34:43 +0530159 bus-width = <8>;
160 non-removable;
161 cap-mmc-hw-reset;
162 status = "okay";
163};
164
165&ohci0 {
166 status = "okay";
167};
168
Andre Przywara1b39a182018-10-29 00:56:47 +0000169&r_rsb {
170 status = "okay";
171
172 axp803: pmic@3a3 {
173 compatible = "x-powers,axp803";
174 reg = <0x3a3>;
175 interrupt-parent = <&r_intc>;
176 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
177 x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
178 };
179};
180
181#include "axp803.dtsi"
182
183&reg_aldo1 {
184 regulator-always-on;
185 regulator-min-microvolt = <2800000>;
186 regulator-max-microvolt = <2800000>;
187 regulator-name = "avdd-csi";
188};
189
190&reg_aldo2 {
191 regulator-always-on;
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <3300000>;
194 regulator-name = "vcc-pl";
195};
196
197&reg_aldo3 {
198 regulator-always-on;
199 regulator-min-microvolt = <3000000>;
200 regulator-max-microvolt = <3000000>;
201 regulator-name = "vcc-pll-avcc";
202};
203
204&reg_dcdc1 {
205 regulator-always-on;
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 regulator-name = "vcc-3v3";
209};
210
211&reg_dcdc2 {
212 regulator-always-on;
213 regulator-min-microvolt = <1040000>;
214 regulator-max-microvolt = <1300000>;
215 regulator-name = "vdd-cpux";
216};
217
218/* DCDC3 is polyphased with DCDC2 */
219
220&reg_dcdc5 {
221 regulator-always-on;
222 regulator-min-microvolt = <1500000>;
223 regulator-max-microvolt = <1500000>;
224 regulator-name = "vcc-dram";
225};
226
227&reg_dcdc6 {
228 regulator-always-on;
229 regulator-min-microvolt = <1100000>;
230 regulator-max-microvolt = <1100000>;
231 regulator-name = "vdd-sys";
232};
233
234&reg_dldo1 {
235 regulator-min-microvolt = <3300000>;
236 regulator-max-microvolt = <3300000>;
237 regulator-name = "vcc-hdmi-dsi-sensor";
238};
239
240&reg_dldo2 {
241 regulator-min-microvolt = <3300000>;
242 regulator-max-microvolt = <3300000>;
243 regulator-name = "vcc-mipi";
244};
245
246&reg_dldo3 {
247 regulator-min-microvolt = <2800000>;
248 regulator-max-microvolt = <2800000>;
249 regulator-name = "dovdd-csi";
250};
251
252&reg_dldo4 {
253 regulator-min-microvolt = <3300000>;
254 regulator-max-microvolt = <3300000>;
255 regulator-name = "vcc-wifi-io";
256};
257
258&reg_drivevbus {
259 regulator-name = "usb0-vbus";
260 status = "okay";
261};
262
263&reg_eldo1 {
264 regulator-always-on;
265 regulator-min-microvolt = <1800000>;
266 regulator-max-microvolt = <1800000>;
267 regulator-name = "cpvdd";
268};
269
270&reg_eldo3 {
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-name = "dvdd-csi";
274};
275
276&reg_fldo1 {
277 regulator-min-microvolt = <1200000>;
278 regulator-max-microvolt = <1200000>;
279 regulator-name = "vcc-1v2-hsic";
280};
281
282/*
283 * The A64 chip cannot work without this regulator off, although
284 * it seems to be only driving the AR100 core.
285 * Maybe we don't still know well about CPUs domain.
286 */
287&reg_fldo2 {
288 regulator-always-on;
289 regulator-min-microvolt = <1100000>;
290 regulator-max-microvolt = <1100000>;
291 regulator-name = "vdd-cpus";
292};
293
Samuel Hollande210ec02020-10-24 10:21:55 -0500294&reg_ldo_io0 {
295 regulator-min-microvolt = <2800000>;
296 regulator-max-microvolt = <2800000>;
297 regulator-name = "vcc-ctp";
298 status = "okay";
299};
300
Andre Przywara1b39a182018-10-29 00:56:47 +0000301&reg_rtc_ldo {
302 regulator-name = "vcc-rtc";
303};
304
Jagan Teki2e8dbe12018-05-28 16:34:43 +0530305&uart0 {
306 pinctrl-names = "default";
Andre Przywara1b39a182018-10-29 00:56:47 +0000307 pinctrl-0 = <&uart0_pb_pins>;
Jagan Teki2e8dbe12018-05-28 16:34:43 +0530308 status = "okay";
309};
310
311&usb_otg {
312 dr_mode = "otg";
313 status = "okay";
314};
315
316&usbphy {
317 usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
Andre Przywara1b39a182018-10-29 00:56:47 +0000318 usb0_vbus-supply = <&reg_drivevbus>;
Jagan Teki2e8dbe12018-05-28 16:34:43 +0530319 status = "okay";
320};