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Lokesh Vutlaaebb2a42019-06-13 10:29:55 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-j721e-som-p0.dtsi"
Praneeth Bajjuri9c789fe2020-12-03 17:43:47 -06009#include "k3-j721e-ddr-evm-lp4-4266.dtsi"
Lokesh Vutlaec2fa9f2019-10-07 19:26:37 +053010#include "k3-j721e-ddr.dtsi"
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +053011
12/ {
13 aliases {
14 remoteproc0 = &sysctrler;
15 remoteproc1 = &a72_0;
16 };
17
18 chosen {
19 stdout-path = "serial2:115200n8";
20 tick-timer = &timer1;
21 };
22
23 a72_0: a72@0 {
24 compatible = "ti,am654-rproc";
25 reg = <0x0 0x00a90000 0x0 0x10>;
26 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
27 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
28 resets = <&k3_reset 202 0>;
Nishanth Menon965db9f2021-01-06 13:20:31 -060029 clocks = <&k3_clks 61 1>;
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +053030 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
31 assigned-clock-rates = <2000000000>, <200000000>;
32 ti,sci = <&dmsc>;
33 ti,sci-proc-id = <32>;
34 ti,sci-host-id = <10>;
35 u-boot,dm-spl;
36 };
37
Faiz Abbas0abf6002020-02-26 13:44:37 +053038 clk_200mhz: dummy_clock_200mhz {
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +053039 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <200000000>;
42 u-boot,dm-spl;
43 };
Vignesh Raghavendrab070f582020-01-27 17:59:25 +053044
Faiz Abbas0abf6002020-02-26 13:44:37 +053045 clk_19_2mhz: dummy_clock_19_2mhz {
Vignesh Raghavendrab070f582020-01-27 17:59:25 +053046 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <19200000>;
49 u-boot,dm-spl;
50 };
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +053051};
52
53&cbass_mcu_wakeup {
54 mcu_secproxy: secproxy@28380000 {
55 u-boot,dm-spl;
56 compatible = "ti,am654-secure-proxy";
57 reg = <0x0 0x2a380000 0x0 0x80000>,
58 <0x0 0x2a400000 0x0 0x80000>,
59 <0x0 0x2a480000 0x0 0x80000>;
60 reg-names = "rt", "scfg", "target_data";
61 #mbox-cells = <1>;
62 };
63
64 sysctrler: sysctrler {
65 u-boot,dm-spl;
66 compatible = "ti,am654-system-controller";
67 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
68 mbox-names = "tx", "rx";
69 };
Keerthy69eceae2019-10-24 15:00:58 +053070
71 wkup_vtm0: wkup_vtm@42040000 {
72 compatible = "ti,am654-vtm", "ti,j721e-avs";
73 reg = <0x0 0x42040000 0x0 0x330>;
74 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
75 #thermal-sensor-cells = <1>;
76 };
Vignesh Raghavendra00d6fc92021-06-07 19:47:50 +053077
78 dm_tifs: dm-tifs {
79 compatible = "ti,j721e-dm-sci";
80 ti,host-id = <3>;
81 ti,secure-host;
82 mbox-names = "rx", "tx";
83 mboxes= <&mcu_secproxy 21>,
84 <&mcu_secproxy 23>;
85 u-boot,dm-spl;
86 };
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +053087};
88
Tero Kristo73045462020-02-14 11:18:17 +020089&cbass_main {
90 main_esm: esm@700000 {
91 compatible = "ti,j721e-esm";
92 reg = <0x0 0x700000 0x0 0x1000>;
93 ti,esm-pins = <344>, <345>;
94 u-boot,dm-spl;
95 };
96};
97
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +053098&dmsc {
99 mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
100 mbox-names = "tx", "rx", "notify";
101 ti,host-id = <4>;
102 ti,secure-host;
103};
104
105&wkup_pmx0 {
106 wkup_uart0_pins_default: wkup_uart0_pins_default {
107 u-boot,dm-spl;
108 pinctrl-single,pins = <
109 J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
110 J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
111 >;
112 };
113
114 mcu_uart0_pins_default: mcu_uart0_pins_default {
115 u-boot,dm-spl;
116 pinctrl-single,pins = <
117 J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
118 J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
119 J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
120 J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
121 >;
122 };
Keerthy0f63cea2019-10-24 15:00:59 +0530123
124 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
125 pinctrl-single,pins = <
126 J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
127 J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
128 >;
129 };
Vignesh Raghavendra224d7fe2020-02-04 11:09:52 +0530130
131 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
132 pinctrl-single,pins = <
133 J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
134 J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
135 J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
136 J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
137 J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
138 J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
139 J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
140 J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
141 J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
142 J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
143 J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
144 >;
145 };
Keerthy896cf0e2020-03-04 10:09:59 +0530146
147 mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
148 u-boot,dm-spl;
149 pinctrl-single,pins = <
150 J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
151 J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
152 J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
153 J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
154 J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
155 J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
156 J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
157 J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
158 >;
159 };
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +0530160};
161
162&main_pmx0 {
163 main_uart0_pins_default: main_uart0_pins_default {
164 u-boot,dm-spl;
165 pinctrl-single,pins = <
166 J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
167 J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
168 J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
169 J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
170 >;
171 };
Vignesh Raghavendra5aeab3b2019-11-18 19:16:35 +0530172
173 main_usbss0_pins_default: main_usbss0_pins_default {
174 pinctrl-single,pins = <
175 J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
176 J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
177 >;
178 };
Faiz Abbasccc855e2020-01-16 19:42:21 +0530179
180 main_mmc1_pins_default: main_mmc1_pins_default {
181 pinctrl-single,pins = <
182 J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
183 J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
184 J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
185 J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
186 J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
187 J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
188 J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
189 J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
190 J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
191 >;
192 };
Vignesh Raghavendrab6427782020-01-27 23:22:15 +0530193
194 main_i2c0_pins_default: main-i2c0-pins-default {
195 pinctrl-single,pins = <
196 J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
197 J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
198 >;
199 };
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +0530200};
201
202&wkup_uart0 {
203 u-boot,dm-spl;
204 pinctrl-names = "default";
205 pinctrl-0 = <&wkup_uart0_pins_default>;
206 status = "okay";
207};
208
209&mcu_uart0 {
Lokesh Vutlafde109d2020-02-03 19:16:53 +0530210 /delete-property/ power-domains;
211 /delete-property/ clocks;
212 /delete-property/ clock-names;
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +0530213 pinctrl-names = "default";
214 pinctrl-0 = <&mcu_uart0_pins_default>;
215 status = "okay";
Lokesh Vutlafde109d2020-02-03 19:16:53 +0530216 clock-frequency = <48000000>;
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +0530217};
218
219&main_uart0 {
220 pinctrl-names = "default";
221 pinctrl-0 = <&main_uart0_pins_default>;
222 status = "okay";
223 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
224};
225
226&main_sdhci0 {
227 /delete-property/ power-domains;
228 /delete-property/ assigned-clocks;
229 /delete-property/ assigned-clock-parents;
230 clock-names = "clk_xin";
231 clocks = <&clk_200mhz>;
232 ti,driver-strength-ohm = <50>;
233 non-removable;
234 bus-width = <8>;
235};
236
237&main_sdhci1 {
238 /delete-property/ power-domains;
239 /delete-property/ assigned-clocks;
240 /delete-property/ assigned-clock-parents;
Faiz Abbasccc855e2020-01-16 19:42:21 +0530241 pinctrl-names = "default";
242 pinctrl-0 = <&main_mmc1_pins_default>;
Lokesh Vutlaaebb2a42019-06-13 10:29:55 +0530243 clock-names = "clk_xin";
244 clocks = <&clk_200mhz>;
245 ti,driver-strength-ohm = <50>;
246};
247
Keerthy0f63cea2019-10-24 15:00:59 +0530248&wkup_i2c0 {
249 u-boot,dm-spl;
250 tps659413a: tps659413a@48 {
251 reg = <0x48>;
252 compatible = "ti,tps659413";
253 u-boot,dm-spl;
254 pinctrl-names = "default";
255 pinctrl-0 = <&wkup_i2c0_pins_default>;
256 clock-frequency = <400000>;
257
258 regulators: regulators {
259 u-boot,dm-spl;
260 buck12_reg: buck12 {
261 /*VDD_MPU*/
262 regulator-name = "buck12";
263 regulator-min-microvolt = <800000>;
264 regulator-max-microvolt = <1250000>;
265 regulator-always-on;
266 regulator-boot-on;
267 u-boot,dm-spl;
268 };
269 };
270 };
271};
272
Keerthy2f714982019-10-24 15:01:00 +0530273&wkup_vtm0 {
274 vdd-supply-2 = <&buck12_reg>;
275 u-boot,dm-spl;
276};
277
Vignesh Raghavendrab070f582020-01-27 17:59:25 +0530278&usbss0 {
279 /delete-property/ power-domains;
280 /delete-property/ assigned-clocks;
281 /delete-property/ assigned-clock-parents;
282 clocks = <&clk_19_2mhz>;
Aswath Govindrajufa7a1452021-08-26 21:28:57 +0530283 clock-names = "ref";
Vignesh Raghavendrab070f582020-01-27 17:59:25 +0530284 pinctrl-names = "default";
285 pinctrl-0 = <&main_usbss0_pins_default>;
286 ti,vbus-divider;
287};
288
Vignesh Raghavendrab6427782020-01-27 23:22:15 +0530289&main_i2c0 {
290 pinctrl-names = "default";
291 pinctrl-0 = <&main_i2c0_pins_default>;
292 clock-frequency = <400000>;
293
294 exp1: gpio@20 {
295 compatible = "ti,tca6416";
296 reg = <0x20>;
297 gpio-controller;
298 #gpio-cells = <2>;
299 };
300
301 exp2: gpio@22 {
302 compatible = "ti,tca6424";
303 reg = <0x22>;
304 gpio-controller;
305 #gpio-cells = <2>;
306 };
307};
308
Vignesh Raghavendra224d7fe2020-02-04 11:09:52 +0530309&ospi0 {
310 pinctrl-names = "default";
311 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
312
313 reg = <0x0 0x47040000 0x0 0x100>,
314 <0x0 0x50000000 0x0 0x8000000>;
315
316 flash@0{
317 compatible = "jedec,spi-nor";
318 reg = <0x0>;
319 spi-tx-bus-width = <1>;
320 spi-rx-bus-width = <8>;
Vignesh Raghavendraaaf55802020-04-02 18:59:13 +0530321 spi-max-frequency = <50000000>;
Vignesh Raghavendra224d7fe2020-02-04 11:09:52 +0530322 cdns,tshsl-ns = <60>;
323 cdns,tsd2d-ns = <60>;
324 cdns,tchsh-ns = <60>;
325 cdns,tslch-ns = <60>;
326 cdns,read-delay = <0>;
327 #address-cells = <1>;
328 #size-cells = <1>;
329 };
330};
331
Keerthy6d310ba2020-03-04 10:10:01 +0530332&ospi1 {
333 pinctrl-names = "default";
334 pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
335 u-boot,dm-spl;
336
337 reg = <0x0 0x47050000 0x0 0x100>,
338 <0x0 0x58000000 0x0 0x8000000>;
339
340 flash@0{
341 compatible = "jedec,spi-nor";
342 reg = <0x0>;
343 spi-tx-bus-width = <1>;
344 spi-rx-bus-width = <4>;
345 spi-max-frequency = <40000000>;
346 cdns,tshsl-ns = <60>;
347 cdns,tsd2d-ns = <60>;
348 cdns,tchsh-ns = <60>;
349 cdns,tslch-ns = <60>;
350 cdns,read-delay = <2>;
351 #address-cells = <1>;
352 #size-cells = <1>;
353 u-boot,dm-spl;
354 };
355};
Vignesh Raghavendra00d6fc92021-06-07 19:47:50 +0530356
357&mcu_ringacc {
358 ti,sci = <&dm_tifs>;
359};
360
361&mcu_udmap {
362 ti,sci = <&dm_tifs>;
363};