blob: c161b9335235cae8cbe7ca22854279b58ef74c94 [file] [log] [blame]
Sjoerd Simons45123802019-02-25 15:33:00 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * am335x_guardian_.h
4 *
5 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
6 * Copyright (C) 2018 sjoerd Simons <sjoerd.simons@collabora.co.uk>
7 *
8 */
9
10#ifndef __CONFIG_AM335X_GUARDIAN_H
11#define __CONFIG_AM335X_GUARDIAN_H
12
13#include <configs/ti_am335x_common.h>
14
15#ifndef CONFIG_SPL_BUILD
16#define CONFIG_TIMESTAMP
17#endif
18
Moses Christopher51d4e472019-09-17 14:25:38 +000019#define CONFIG_SYS_BOOTM_LEN (16 << 20)
20
Sjoerd Simons45123802019-02-25 15:33:00 +000021/* Clock Defines */
22#define V_OSCK 24000000 /* Clock output from T2 */
23#define V_SCLK (V_OSCK)
24
Moses Christopher51d4e472019-09-17 14:25:38 +000025#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
26
Sjoerd Simons45123802019-02-25 15:33:00 +000027#ifndef CONFIG_SPL_BUILD
28
29#define MEM_LAYOUT_ENV_SETTINGS \
30 "scriptaddr=0x80000000\0" \
31 "pxefile_addr_r=0x80100000\0" \
Moses Christopher2f147e02021-06-11 16:13:36 +000032 "tftp_load_addr=0x82000000\0" \
Sjoerd Simons45123802019-02-25 15:33:00 +000033 "kernel_addr_r=0x82000000\0" \
34 "fdt_addr_r=0x88000000\0" \
35 "ramdisk_addr_r=0x88080000\0" \
36
37#define BOOT_TARGET_DEVICES(func) \
Moses Christopher360ced62020-03-25 06:45:48 +000038 func(UBIFS, ubifs, 0)
Sjoerd Simons45123802019-02-25 15:33:00 +000039
40#define AM335XX_BOARD_FDTFILE "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"
41
42#include <config_distro_bootcmd.h>
43
Moses Christophera3121672020-03-25 06:45:47 +000044#define GUARDIAN_DEFAULT_PROD_ENV \
45 "factory_assembly_status=0\0" \
46 "main_pcba_part_number=0\0" \
47 "main_pcba_supplier=0\0" \
48 "main_pcba_timestamp=0\0" \
49 "main_pcba_hardware_version=0\0" \
50 "main_pcba_id=0\0" \
51 "main_pcba_aux_1=0\0" \
52 "main_pcba_aux_2=0\0" \
53 "main_pcba_aux_3=0\0" \
54 "main_pcba_aux_4=0\0" \
55
Sjoerd Simons45123802019-02-25 15:33:00 +000056#define CONFIG_EXTRA_ENV_SETTINGS \
57 AM335XX_BOARD_FDTFILE \
58 MEM_LAYOUT_ENV_SETTINGS \
59 BOOTENV \
Moses Christophera3121672020-03-25 06:45:47 +000060 GUARDIAN_DEFAULT_PROD_ENV \
Gireesh Hiremathf379c442021-06-11 16:13:39 +000061 "autoload=no\0" \
Gireesh Hiremathae628fb2021-06-11 16:13:44 +000062 "backlight_brightness=50\0" \
Moses Christopher51d4e472019-09-17 14:25:38 +000063 "bootubivol=rootfs\0" \
Moses Christopher360ced62020-03-25 06:45:48 +000064 "distro_bootcmd=" \
Moses Christopher360ced62020-03-25 06:45:48 +000065 "setenv rootflags \"bulk_read,chk_data_crc\"; " \
66 "setenv ethact usb_ether; " \
67 "if test \"${swi_status}\" -eq 1; then " \
Moses Christopher360ced62020-03-25 06:45:48 +000068 "if dhcp; then " \
69 "sleep 1; " \
70 "if tftp \"${tftp_load_addr}\" \"bootscript.scr\"; then " \
71 "source \"${tftp_load_addr}\"; " \
72 "fi; " \
73 "fi; " \
Gireesh Hiremathd3649262021-06-11 16:13:43 +000074 "setenv extrabootargs $extrabootargs \"swi_attached\"; " \
Moses Christopher360ced62020-03-25 06:45:48 +000075 "fi;" \
76 "run bootcmd_ubifs0;\0" \
Sjoerd Simons45123802019-02-25 15:33:00 +000077 "altbootcmd=" \
Moses Christopher360ced62020-03-25 06:45:48 +000078 "setenv boot_syslinux_conf \"extlinux/extlinux-rollback.conf\"; " \
79 "run distro_bootcmd; " \
80 "setenv boot_syslinux_conf \"extlinux/extlinux.conf\"; " \
81 "run bootcmd_ubifs0;\0"
Sjoerd Simons45123802019-02-25 15:33:00 +000082
Moses Christopher51d4e472019-09-17 14:25:38 +000083#endif /* ! CONFIG_SPL_BUILD */
Sjoerd Simons45123802019-02-25 15:33:00 +000084
Gireesh Hiremath9cd380e2021-06-11 16:13:47 +000085#define CONFIG_BMP_16BPP
86#define SPLASH_SCREEN_NAND_PART "nand0,10"
87#define SPLASH_SCREEN_BMP_FILE_SIZE 0x26000
88#define SPLASH_SCREEN_BMP_LOAD_ADDR 0x82000000
89#define SPLASH_SCREEN_TEXT "U-Boot"
90
91/* BGR 16Bit Color Definitions */
92#define CONSOLE_COLOR_BLACK 0x0000
93#define CONSOLE_COLOR_WHITE 0xFFFF
94#define CONSOLE_COLOR_RED 0x001F
95
Sjoerd Simons45123802019-02-25 15:33:00 +000096/* NS16550 Configuration */
97#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
98#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
99#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
100#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
101#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
102#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
103
104/* PMIC support */
105#define CONFIG_POWER_TPS65217
106
107/* Bootcount using the RTC block */
108#define CONFIG_SYS_BOOTCOUNT_LE
109
Miquel Raynal88718be2019-10-03 19:50:03 +0200110#ifdef CONFIG_MTD_RAW_NAND
Sjoerd Simons45123802019-02-25 15:33:00 +0000111
112#define CONFIG_SYS_NAND_5_ADDR_CYCLE
113#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
114 CONFIG_SYS_NAND_PAGE_SIZE)
115#define CONFIG_SYS_NAND_PAGE_SIZE 4096
116#define CONFIG_SYS_NAND_OOBSIZE 256
117#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
118
119#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
120 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
121 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
122 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
123 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
124 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
125 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
126 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
127 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
128 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
129 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
130 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
131 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
132 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
133 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
134 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
135 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
136 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
137 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
138 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
139 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
140 }
141#define CONFIG_SYS_NAND_ECCSIZE 512
142#define CONFIG_SYS_NAND_ECCBYTES 26
143#define CONFIG_SYS_NAND_ONFI_DETECTION
144#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
145#define MTDIDS_DEFAULT "nand0=nand.0"
146
147#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
148
Miquel Raynal88718be2019-10-03 19:50:03 +0200149#endif /* CONFIG_MTD_RAW_NAND */
Sjoerd Simons45123802019-02-25 15:33:00 +0000150
Moses Christopherb1c95cc2020-03-25 06:45:44 +0000151#define CONFIG_AM335X_USB0
152#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
153#define CONFIG_AM335X_USB1
154#define CONFIG_AM335X_USB1_MODE MUSB_HOST
155
Sjoerd Simons45123802019-02-25 15:33:00 +0000156#endif /* ! __CONFIG_AM335X_GUARDIAN_H */