blob: e79c90b9395dc7975bf47f1334486f298eca59fb [file] [log] [blame]
Miquel Raynalff322452018-05-15 11:57:08 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +02003 * Defines APIs and structures that allow software to interact with a
4 * TPM2 device
5 *
6 * Copyright (c) 2020 Linaro
Miquel Raynalff322452018-05-15 11:57:08 +02007 * Copyright (c) 2018 Bootlin
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +02008 *
9 * https://trustedcomputinggroup.org/resource/tss-overview-common-structures-specification/
10 *
Miquel Raynalff322452018-05-15 11:57:08 +020011 * Author: Miquel Raynal <miquel.raynal@bootlin.com>
12 */
13
14#ifndef __TPM_V2_H
15#define __TPM_V2_H
16
17#include <tpm-common.h>
18
Simon Glass401d1c42020-10-30 21:38:53 -060019struct udevice;
20
Miquel Raynalff322452018-05-15 11:57:08 +020021#define TPM2_DIGEST_LEN 32
22
Ilias Apalodimas8e0b0872020-11-30 11:47:39 +020023#define TPM2_SHA1_DIGEST_SIZE 20
24#define TPM2_SHA256_DIGEST_SIZE 32
25#define TPM2_SHA384_DIGEST_SIZE 48
26#define TPM2_SHA512_DIGEST_SIZE 64
27#define TPM2_SM3_256_DIGEST_SIZE 32
28
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +020029#define TPM2_MAX_PCRS 32
30#define TPM2_PCR_SELECT_MAX ((TPM2_MAX_PCRS + 7) / 8)
31#define TPM2_MAX_CAP_BUFFER 1024
32#define TPM2_MAX_TPM_PROPERTIES ((TPM2_MAX_CAP_BUFFER - sizeof(u32) /* TPM2_CAP */ - \
33 sizeof(u32)) / sizeof(struct tpms_tagged_property))
34
Simon Glassd8f105d2021-07-18 14:18:03 -060035#define TPM2_HDR_LEN 10
36
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +020037/*
38 * We deviate from this draft of the specification by increasing the value of
39 * TPM2_NUM_PCR_BANKS from 3 to 16 to ensure compatibility with TPM2
40 * implementations that have enabled a larger than typical number of PCR
41 * banks. This larger value for TPM2_NUM_PCR_BANKS is expected to be included
42 * in a future revision of the specification.
43 */
44#define TPM2_NUM_PCR_BANKS 16
45
46/* Definition of (UINT32) TPM2_CAP Constants */
47#define TPM2_CAP_PCRS 0x00000005U
48#define TPM2_CAP_TPM_PROPERTIES 0x00000006U
49
50/* Definition of (UINT32) TPM2_PT Constants */
51#define TPM2_PT_GROUP (u32)(0x00000100)
52#define TPM2_PT_FIXED (u32)(TPM2_PT_GROUP * 1)
53#define TPM2_PT_MANUFACTURER (u32)(TPM2_PT_FIXED + 5)
54#define TPM2_PT_PCR_COUNT (u32)(TPM2_PT_FIXED + 18)
55#define TPM2_PT_MAX_COMMAND_SIZE (u32)(TPM2_PT_FIXED + 30)
56#define TPM2_PT_MAX_RESPONSE_SIZE (u32)(TPM2_PT_FIXED + 31)
57
Heinrich Schuchardt5b700cd2021-04-21 12:24:29 +020058/*
59 * event types, cf.
60 * "TCG Server Management Domain Firmware Profile Specification",
61 * rev 1.00, 2020-05-01
62 */
63#define EV_POST_CODE ((u32)0x00000001)
64#define EV_NO_ACTION ((u32)0x00000003)
65#define EV_SEPARATOR ((u32)0x00000004)
66#define EV_ACTION ((u32)0x00000005)
67#define EV_TAG ((u32)0x00000006)
68#define EV_S_CRTM_CONTENTS ((u32)0x00000007)
69#define EV_S_CRTM_VERSION ((u32)0x00000008)
70#define EV_CPU_MICROCODE ((u32)0x00000009)
71#define EV_PLATFORM_CONFIG_FLAGS ((u32)0x0000000A)
72#define EV_TABLE_OF_DEVICES ((u32)0x0000000B)
73#define EV_COMPACT_HASH ((u32)0x0000000C)
Ilias Apalodimas8e0b0872020-11-30 11:47:39 +020074
Masahisa Kojima163a0d72021-05-26 12:09:58 +090075/*
76 * event types, cf.
77 * "TCG PC Client Platform Firmware Profile Specification", Family "2.0"
Masahisa Kojima8fc4e0b2021-08-13 16:12:40 +090078 * Level 00 Version 1.05 Revision 23, May 7, 2021
Masahisa Kojima163a0d72021-05-26 12:09:58 +090079 */
80#define EV_EFI_EVENT_BASE ((u32)0x80000000)
81#define EV_EFI_VARIABLE_DRIVER_CONFIG ((u32)0x80000001)
82#define EV_EFI_VARIABLE_BOOT ((u32)0x80000002)
83#define EV_EFI_BOOT_SERVICES_APPLICATION ((u32)0x80000003)
84#define EV_EFI_BOOT_SERVICES_DRIVER ((u32)0x80000004)
85#define EV_EFI_RUNTIME_SERVICES_DRIVER ((u32)0x80000005)
86#define EV_EFI_GPT_EVENT ((u32)0x80000006)
87#define EV_EFI_ACTION ((u32)0x80000007)
88#define EV_EFI_PLATFORM_FIRMWARE_BLOB ((u32)0x80000008)
89#define EV_EFI_HANDOFF_TABLES ((u32)0x80000009)
Masahisa Kojima8fc4e0b2021-08-13 16:12:40 +090090#define EV_EFI_PLATFORM_FIRMWARE_BLOB2 ((u32)0x8000000A)
91#define EV_EFI_HANDOFF_TABLES2 ((u32)0x8000000B)
92#define EV_EFI_VARIABLE_BOOT2 ((u32)0x8000000C)
Masahisa Kojima163a0d72021-05-26 12:09:58 +090093#define EV_EFI_HCRTM_EVENT ((u32)0x80000010)
94#define EV_EFI_VARIABLE_AUTHORITY ((u32)0x800000E0)
Masahisa Kojima8fc4e0b2021-08-13 16:12:40 +090095#define EV_EFI_SPDM_FIRMWARE_BLOB ((u32)0x800000E1)
96#define EV_EFI_SPDM_FIRMWARE_CONFIG ((u32)0x800000E2)
97
98#define EFI_CALLING_EFI_APPLICATION \
99 "Calling EFI Application from Boot Option"
100#define EFI_RETURNING_FROM_EFI_APPLICATION \
101 "Returning from EFI Application from Boot Option"
102#define EFI_EXIT_BOOT_SERVICES_INVOCATION \
103 "Exit Boot Services Invocation"
104#define EFI_EXIT_BOOT_SERVICES_FAILED \
105 "Exit Boot Services Returned with Failure"
106#define EFI_EXIT_BOOT_SERVICES_SUCCEEDED \
107 "Exit Boot Services Returned with Success"
Masahisa Kojima163a0d72021-05-26 12:09:58 +0900108
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +0200109/* TPMS_TAGGED_PROPERTY Structure */
110struct tpms_tagged_property {
111 u32 property;
112 u32 value;
113} __packed;
114
115/* TPMS_PCR_SELECTION Structure */
116struct tpms_pcr_selection {
117 u16 hash;
118 u8 size_of_select;
119 u8 pcr_select[TPM2_PCR_SELECT_MAX];
120} __packed;
121
122/* TPML_PCR_SELECTION Structure */
123struct tpml_pcr_selection {
124 u32 count;
125 struct tpms_pcr_selection selection[TPM2_NUM_PCR_BANKS];
126} __packed;
127
128/* TPML_TAGGED_TPM_PROPERTY Structure */
129struct tpml_tagged_tpm_property {
130 u32 count;
131 struct tpms_tagged_property tpm_property[TPM2_MAX_TPM_PROPERTIES];
132} __packed;
133
134/* TPMU_CAPABILITIES Union */
135union tpmu_capabilities {
136 /*
137 * Non exhaustive. Only added the structs needed for our
138 * current code
139 */
140 struct tpml_pcr_selection assigned_pcr;
141 struct tpml_tagged_tpm_property tpm_properties;
142} __packed;
143
144/* TPMS_CAPABILITY_DATA Structure */
145struct tpms_capability_data {
146 u32 capability;
147 union tpmu_capabilities data;
148} __packed;
149
Miquel Raynalff322452018-05-15 11:57:08 +0200150/**
Ilias Apalodimas8e0b0872020-11-30 11:47:39 +0200151 * SHA1 Event Log Entry Format
152 *
153 * @pcr_index: PCRIndex event extended to
154 * @event_type: Type of event (see EFI specs)
155 * @digest: Value extended into PCR index
156 * @event_size: Size of event
157 * @event: Event data
158 */
159struct tcg_pcr_event {
160 u32 pcr_index;
161 u32 event_type;
162 u8 digest[TPM2_SHA1_DIGEST_SIZE];
163 u32 event_size;
164 u8 event[];
165} __packed;
166
167/**
168 * Definition of TPMU_HA Union
169 */
170union tmpu_ha {
171 u8 sha1[TPM2_SHA1_DIGEST_SIZE];
172 u8 sha256[TPM2_SHA256_DIGEST_SIZE];
173 u8 sm3_256[TPM2_SM3_256_DIGEST_SIZE];
174 u8 sha384[TPM2_SHA384_DIGEST_SIZE];
175 u8 sha512[TPM2_SHA512_DIGEST_SIZE];
176} __packed;
177
178/**
179 * Definition of TPMT_HA Structure
180 *
181 * @hash_alg: Hash algorithm defined in enum tpm2_algorithms
182 * @digest: Digest value for a given algorithm
183 */
184struct tpmt_ha {
185 u16 hash_alg;
186 union tmpu_ha digest;
187} __packed;
188
189/**
190 * Definition of TPML_DIGEST_VALUES Structure
191 *
192 * @count: Number of algorithms supported by hardware
193 * @digests: struct for algorithm id and hash value
194 */
195struct tpml_digest_values {
196 u32 count;
197 struct tpmt_ha digests[TPM2_NUM_PCR_BANKS];
198} __packed;
199
200/**
201 * Crypto Agile Log Entry Format
202 *
203 * @pcr_index: PCRIndex event extended to
204 * @event_type: Type of event
205 * @digests: List of digestsextended to PCR index
206 * @event_size: Size of the event data
207 * @event: Event data
208 */
209struct tcg_pcr_event2 {
210 u32 pcr_index;
211 u32 event_type;
212 struct tpml_digest_values digests;
213 u32 event_size;
214 u8 event[];
215} __packed;
216
217/**
Miquel Raynalff322452018-05-15 11:57:08 +0200218 * TPM2 Structure Tags for command/response buffers.
219 *
220 * @TPM2_ST_NO_SESSIONS: the command does not need an authentication.
221 * @TPM2_ST_SESSIONS: the command needs an authentication.
222 */
223enum tpm2_structures {
224 TPM2_ST_NO_SESSIONS = 0x8001,
225 TPM2_ST_SESSIONS = 0x8002,
226};
227
228/**
229 * TPM2 type of boolean.
230 */
231enum tpm2_yes_no {
232 TPMI_YES = 1,
233 TPMI_NO = 0,
234};
235
236/**
237 * TPM2 startup values.
238 *
239 * @TPM2_SU_CLEAR: reset the internal state.
240 * @TPM2_SU_STATE: restore saved state (if any).
241 */
242enum tpm2_startup_types {
243 TPM2_SU_CLEAR = 0x0000,
244 TPM2_SU_STATE = 0x0001,
245};
246
247/**
248 * TPM2 permanent handles.
249 *
250 * @TPM2_RH_OWNER: refers to the 'owner' hierarchy.
251 * @TPM2_RS_PW: indicates a password.
252 * @TPM2_RH_LOCKOUT: refers to the 'lockout' hierarchy.
253 * @TPM2_RH_ENDORSEMENT: refers to the 'endorsement' hierarchy.
254 * @TPM2_RH_PLATFORM: refers to the 'platform' hierarchy.
255 */
256enum tpm2_handles {
257 TPM2_RH_OWNER = 0x40000001,
258 TPM2_RS_PW = 0x40000009,
259 TPM2_RH_LOCKOUT = 0x4000000A,
260 TPM2_RH_ENDORSEMENT = 0x4000000B,
261 TPM2_RH_PLATFORM = 0x4000000C,
262};
263
264/**
265 * TPM2 command codes used at the beginning of a buffer, gives the command.
266 *
267 * @TPM2_CC_STARTUP: TPM2_Startup().
268 * @TPM2_CC_SELF_TEST: TPM2_SelfTest().
269 * @TPM2_CC_CLEAR: TPM2_Clear().
270 * @TPM2_CC_CLEARCONTROL: TPM2_ClearControl().
271 * @TPM2_CC_HIERCHANGEAUTH: TPM2_HierarchyChangeAuth().
272 * @TPM2_CC_PCR_SETAUTHPOL: TPM2_PCR_SetAuthPolicy().
273 * @TPM2_CC_DAM_RESET: TPM2_DictionaryAttackLockReset().
274 * @TPM2_CC_DAM_PARAMETERS: TPM2_DictionaryAttackParameters().
275 * @TPM2_CC_GET_CAPABILITY: TPM2_GetCapibility().
Dhananjay Phadke06bea492020-06-04 16:43:59 -0700276 * @TPM2_CC_GET_RANDOM: TPM2_GetRandom().
Miquel Raynalff322452018-05-15 11:57:08 +0200277 * @TPM2_CC_PCR_READ: TPM2_PCR_Read().
278 * @TPM2_CC_PCR_EXTEND: TPM2_PCR_Extend().
279 * @TPM2_CC_PCR_SETAUTHVAL: TPM2_PCR_SetAuthValue().
280 */
281enum tpm2_command_codes {
282 TPM2_CC_STARTUP = 0x0144,
283 TPM2_CC_SELF_TEST = 0x0143,
Simon Glass63af92e2021-02-06 14:23:42 -0700284 TPM2_CC_HIER_CONTROL = 0x0121,
Miquel Raynalff322452018-05-15 11:57:08 +0200285 TPM2_CC_CLEAR = 0x0126,
286 TPM2_CC_CLEARCONTROL = 0x0127,
287 TPM2_CC_HIERCHANGEAUTH = 0x0129,
Simon Glasseadcbc72021-02-06 14:23:39 -0700288 TPM2_CC_NV_DEFINE_SPACE = 0x012a,
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200289 TPM2_CC_PCR_SETAUTHPOL = 0x012C,
Simon Glass6719cbe2021-02-06 14:23:40 -0700290 TPM2_CC_NV_WRITE = 0x0137,
Simon Glass7785bc12021-02-06 14:23:41 -0700291 TPM2_CC_NV_WRITELOCK = 0x0138,
Miquel Raynalff322452018-05-15 11:57:08 +0200292 TPM2_CC_DAM_RESET = 0x0139,
293 TPM2_CC_DAM_PARAMETERS = 0x013A,
Simon Glass998af312018-10-01 11:55:17 -0600294 TPM2_CC_NV_READ = 0x014E,
Miquel Raynalff322452018-05-15 11:57:08 +0200295 TPM2_CC_GET_CAPABILITY = 0x017A,
Dhananjay Phadke06bea492020-06-04 16:43:59 -0700296 TPM2_CC_GET_RANDOM = 0x017B,
Miquel Raynalff322452018-05-15 11:57:08 +0200297 TPM2_CC_PCR_READ = 0x017E,
298 TPM2_CC_PCR_EXTEND = 0x0182,
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200299 TPM2_CC_PCR_SETAUTHVAL = 0x0183,
Miquel Raynalff322452018-05-15 11:57:08 +0200300};
301
302/**
303 * TPM2 return codes.
304 */
305enum tpm2_return_codes {
306 TPM2_RC_SUCCESS = 0x0000,
307 TPM2_RC_BAD_TAG = 0x001E,
308 TPM2_RC_FMT1 = 0x0080,
309 TPM2_RC_HASH = TPM2_RC_FMT1 + 0x0003,
310 TPM2_RC_VALUE = TPM2_RC_FMT1 + 0x0004,
311 TPM2_RC_SIZE = TPM2_RC_FMT1 + 0x0015,
312 TPM2_RC_BAD_AUTH = TPM2_RC_FMT1 + 0x0022,
313 TPM2_RC_HANDLE = TPM2_RC_FMT1 + 0x000B,
314 TPM2_RC_VER1 = 0x0100,
315 TPM2_RC_INITIALIZE = TPM2_RC_VER1 + 0x0000,
316 TPM2_RC_FAILURE = TPM2_RC_VER1 + 0x0001,
317 TPM2_RC_DISABLED = TPM2_RC_VER1 + 0x0020,
318 TPM2_RC_AUTH_MISSING = TPM2_RC_VER1 + 0x0025,
319 TPM2_RC_COMMAND_CODE = TPM2_RC_VER1 + 0x0043,
320 TPM2_RC_AUTHSIZE = TPM2_RC_VER1 + 0x0044,
321 TPM2_RC_AUTH_CONTEXT = TPM2_RC_VER1 + 0x0045,
Simon Glass63af92e2021-02-06 14:23:42 -0700322 TPM2_RC_NV_DEFINED = TPM2_RC_VER1 + 0x004c,
Miquel Raynalff322452018-05-15 11:57:08 +0200323 TPM2_RC_NEEDS_TEST = TPM2_RC_VER1 + 0x0053,
324 TPM2_RC_WARN = 0x0900,
325 TPM2_RC_TESTING = TPM2_RC_WARN + 0x000A,
326 TPM2_RC_REFERENCE_H0 = TPM2_RC_WARN + 0x0010,
327 TPM2_RC_LOCKOUT = TPM2_RC_WARN + 0x0021,
328};
329
330/**
331 * TPM2 algorithms.
332 */
333enum tpm2_algorithms {
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +0200334 TPM2_ALG_SHA1 = 0x04,
Miquel Raynalff322452018-05-15 11:57:08 +0200335 TPM2_ALG_XOR = 0x0A,
336 TPM2_ALG_SHA256 = 0x0B,
337 TPM2_ALG_SHA384 = 0x0C,
338 TPM2_ALG_SHA512 = 0x0D,
339 TPM2_ALG_NULL = 0x10,
Ilias Apalodimas915e3ae2020-11-11 11:18:10 +0200340 TPM2_ALG_SM3_256 = 0x12,
Miquel Raynalff322452018-05-15 11:57:08 +0200341};
342
Simon Glassbe8a0252018-11-23 21:29:34 -0700343/* NV index attributes */
344enum tpm_index_attrs {
345 TPMA_NV_PPWRITE = 1UL << 0,
346 TPMA_NV_OWNERWRITE = 1UL << 1,
347 TPMA_NV_AUTHWRITE = 1UL << 2,
348 TPMA_NV_POLICYWRITE = 1UL << 3,
349 TPMA_NV_COUNTER = 1UL << 4,
350 TPMA_NV_BITS = 1UL << 5,
351 TPMA_NV_EXTEND = 1UL << 6,
352 TPMA_NV_POLICY_DELETE = 1UL << 10,
353 TPMA_NV_WRITELOCKED = 1UL << 11,
354 TPMA_NV_WRITEALL = 1UL << 12,
355 TPMA_NV_WRITEDEFINE = 1UL << 13,
356 TPMA_NV_WRITE_STCLEAR = 1UL << 14,
357 TPMA_NV_GLOBALLOCK = 1UL << 15,
358 TPMA_NV_PPREAD = 1UL << 16,
359 TPMA_NV_OWNERREAD = 1UL << 17,
360 TPMA_NV_AUTHREAD = 1UL << 18,
361 TPMA_NV_POLICYREAD = 1UL << 19,
362 TPMA_NV_NO_DA = 1UL << 25,
363 TPMA_NV_ORDERLY = 1UL << 26,
364 TPMA_NV_CLEAR_STCLEAR = 1UL << 27,
365 TPMA_NV_READLOCKED = 1UL << 28,
366 TPMA_NV_WRITTEN = 1UL << 29,
367 TPMA_NV_PLATFORMCREATE = 1UL << 30,
368 TPMA_NV_READ_STCLEAR = 1UL << 31,
369
370 TPMA_NV_MASK_READ = TPMA_NV_PPREAD | TPMA_NV_OWNERREAD |
371 TPMA_NV_AUTHREAD | TPMA_NV_POLICYREAD,
372 TPMA_NV_MASK_WRITE = TPMA_NV_PPWRITE | TPMA_NV_OWNERWRITE |
373 TPMA_NV_AUTHWRITE | TPMA_NV_POLICYWRITE,
374};
375
Simon Glass1400a7f2020-02-06 09:55:03 -0700376enum {
377 TPM_ACCESS_VALID = 1 << 7,
378 TPM_ACCESS_ACTIVE_LOCALITY = 1 << 5,
379 TPM_ACCESS_REQUEST_PENDING = 1 << 2,
380 TPM_ACCESS_REQUEST_USE = 1 << 1,
381 TPM_ACCESS_ESTABLISHMENT = 1 << 0,
382};
383
384enum {
385 TPM_STS_FAMILY_SHIFT = 26,
386 TPM_STS_FAMILY_MASK = 0x3 << TPM_STS_FAMILY_SHIFT,
387 TPM_STS_FAMILY_TPM2 = 1 << TPM_STS_FAMILY_SHIFT,
388 TPM_STS_RESE_TESTABLISMENT_BIT = 1 << 25,
389 TPM_STS_COMMAND_CANCEL = 1 << 24,
390 TPM_STS_BURST_COUNT_SHIFT = 8,
391 TPM_STS_BURST_COUNT_MASK = 0xffff << TPM_STS_BURST_COUNT_SHIFT,
392 TPM_STS_VALID = 1 << 7,
393 TPM_STS_COMMAND_READY = 1 << 6,
394 TPM_STS_GO = 1 << 5,
395 TPM_STS_DATA_AVAIL = 1 << 4,
396 TPM_STS_DATA_EXPECT = 1 << 3,
397 TPM_STS_SELF_TEST_DONE = 1 << 2,
398 TPM_STS_RESPONSE_RETRY = 1 << 1,
Ilias Apalodimas2c9626c2021-11-09 09:02:17 +0200399 TPM_STS_READ_ZERO = 0x23
Simon Glass1400a7f2020-02-06 09:55:03 -0700400};
401
402enum {
403 TPM_CMD_COUNT_OFFSET = 2,
404 TPM_CMD_ORDINAL_OFFSET = 6,
405 TPM_MAX_BUF_SIZE = 1260,
406};
407
Simon Glass6719cbe2021-02-06 14:23:40 -0700408enum {
409 /* Secure storage for firmware settings */
410 TPM_HT_PCR = 0,
411 TPM_HT_NV_INDEX,
412 TPM_HT_HMAC_SESSION,
413 TPM_HT_POLICY_SESSION,
414
415 HR_SHIFT = 24,
416 HR_PCR = TPM_HT_PCR << HR_SHIFT,
417 HR_HMAC_SESSION = TPM_HT_HMAC_SESSION << HR_SHIFT,
418 HR_POLICY_SESSION = TPM_HT_POLICY_SESSION << HR_SHIFT,
419 HR_NV_INDEX = TPM_HT_NV_INDEX << HR_SHIFT,
420};
421
Miquel Raynal1922df22018-05-15 11:57:12 +0200422/**
423 * Issue a TPM2_Startup command.
424 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700425 * @dev TPM device
Miquel Raynal1922df22018-05-15 11:57:12 +0200426 * @mode TPM startup mode
427 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100428 * Return: code of the operation
Miquel Raynal1922df22018-05-15 11:57:12 +0200429 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700430u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode);
Miquel Raynal1922df22018-05-15 11:57:12 +0200431
Miquel Raynal2dc6d972018-05-15 11:57:13 +0200432/**
433 * Issue a TPM2_SelfTest command.
434 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700435 * @dev TPM device
Miquel Raynal2dc6d972018-05-15 11:57:13 +0200436 * @full_test Asking to perform all tests or only the untested ones
437 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100438 * Return: code of the operation
Miquel Raynal2dc6d972018-05-15 11:57:13 +0200439 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700440u32 tpm2_self_test(struct udevice *dev, enum tpm2_yes_no full_test);
Miquel Raynal2dc6d972018-05-15 11:57:13 +0200441
Miquel Raynalbad8ff52018-05-15 11:57:14 +0200442/**
443 * Issue a TPM2_Clear command.
444 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700445 * @dev TPM device
Miquel Raynalbad8ff52018-05-15 11:57:14 +0200446 * @handle Handle
447 * @pw Password
448 * @pw_sz Length of the password
449 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100450 * Return: code of the operation
Miquel Raynalbad8ff52018-05-15 11:57:14 +0200451 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700452u32 tpm2_clear(struct udevice *dev, u32 handle, const char *pw,
453 const ssize_t pw_sz);
Miquel Raynalbad8ff52018-05-15 11:57:14 +0200454
Miquel Raynal6284be52018-05-15 11:57:15 +0200455/**
Simon Glasseadcbc72021-02-06 14:23:39 -0700456 * Issue a TPM_NV_DefineSpace command
457 *
458 * This allows a space to be defined with given attributes and policy
459 *
460 * @dev TPM device
461 * @space_index index of the area
462 * @space_size size of area in bytes
463 * @nv_attributes TPM_NV_ATTRIBUTES of the area
464 * @nv_policy policy to use
465 * @nv_policy_size size of the policy
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100466 * Return: return code of the operation
Simon Glasseadcbc72021-02-06 14:23:39 -0700467 */
468u32 tpm2_nv_define_space(struct udevice *dev, u32 space_index,
469 size_t space_size, u32 nv_attributes,
470 const u8 *nv_policy, size_t nv_policy_size);
471
472/**
Miquel Raynal6284be52018-05-15 11:57:15 +0200473 * Issue a TPM2_PCR_Extend command.
474 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700475 * @dev TPM device
Miquel Raynal6284be52018-05-15 11:57:15 +0200476 * @index Index of the PCR
Ilias Apalodimase9261362020-11-26 23:07:22 +0200477 * @algorithm Algorithm used, defined in 'enum tpm2_algorithms'
Miquel Raynal6284be52018-05-15 11:57:15 +0200478 * @digest Value representing the event to be recorded
Ilias Apalodimase9261362020-11-26 23:07:22 +0200479 * @digest_len len of the hash
Miquel Raynal6284be52018-05-15 11:57:15 +0200480 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100481 * Return: code of the operation
Miquel Raynal6284be52018-05-15 11:57:15 +0200482 */
Ilias Apalodimase9261362020-11-26 23:07:22 +0200483u32 tpm2_pcr_extend(struct udevice *dev, u32 index, u32 algorithm,
484 const u8 *digest, u32 digest_len);
Miquel Raynal6284be52018-05-15 11:57:15 +0200485
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200486/**
Simon Glass6719cbe2021-02-06 14:23:40 -0700487 * Read data from the secure storage
488 *
489 * @dev TPM device
490 * @index Index of data to read
491 * @data Place to put data
492 * @count Number of bytes of data
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100493 * Return: code of the operation
Simon Glass6719cbe2021-02-06 14:23:40 -0700494 */
495u32 tpm2_nv_read_value(struct udevice *dev, u32 index, void *data, u32 count);
496
497/**
498 * Write data to the secure storage
499 *
500 * @dev TPM device
501 * @index Index of data to write
502 * @data Data to write
503 * @count Number of bytes of data
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100504 * Return: code of the operation
Simon Glass6719cbe2021-02-06 14:23:40 -0700505 */
506u32 tpm2_nv_write_value(struct udevice *dev, u32 index, const void *data,
507 u32 count);
508
509/**
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200510 * Issue a TPM2_PCR_Read command.
511 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700512 * @dev TPM device
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200513 * @idx Index of the PCR
514 * @idx_min_sz Minimum size in bytes of the pcrSelect array
Ruchika Gupta2957a1e2021-11-29 13:09:45 +0530515 * @algorithm Algorithm used, defined in 'enum tpm2_algorithms'
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200516 * @data Output buffer for contents of the named PCR
Ruchika Gupta2957a1e2021-11-29 13:09:45 +0530517 * @digest_len len of the data
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200518 * @updates Optional out parameter: number of updates for this PCR
519 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100520 * Return: code of the operation
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200521 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700522u32 tpm2_pcr_read(struct udevice *dev, u32 idx, unsigned int idx_min_sz,
Ruchika Gupta2957a1e2021-11-29 13:09:45 +0530523 u16 algorithm, void *data, u32 digest_len,
524 unsigned int *updates);
Miquel Raynal1c4ea8f2018-05-15 11:57:16 +0200525
Miquel Raynal69cd8f02018-05-15 11:57:17 +0200526/**
527 * Issue a TPM2_GetCapability command. This implementation is limited
528 * to query property index that is 4-byte wide.
529 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700530 * @dev TPM device
Miquel Raynal69cd8f02018-05-15 11:57:17 +0200531 * @capability Partition of capabilities
532 * @property Further definition of capability, limited to be 4 bytes wide
533 * @buf Output buffer for capability information
534 * @prop_count Size of output buffer
535 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100536 * Return: code of the operation
Miquel Raynal69cd8f02018-05-15 11:57:17 +0200537 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700538u32 tpm2_get_capability(struct udevice *dev, u32 capability, u32 property,
539 void *buf, size_t prop_count);
Miquel Raynal69cd8f02018-05-15 11:57:17 +0200540
Miquel Raynalda9c3392018-05-15 11:57:18 +0200541/**
542 * Issue a TPM2_DictionaryAttackLockReset command.
543 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700544 * @dev TPM device
Miquel Raynalda9c3392018-05-15 11:57:18 +0200545 * @pw Password
546 * @pw_sz Length of the password
547 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100548 * Return: code of the operation
Miquel Raynalda9c3392018-05-15 11:57:18 +0200549 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700550u32 tpm2_dam_reset(struct udevice *dev, const char *pw, const ssize_t pw_sz);
Miquel Raynalda9c3392018-05-15 11:57:18 +0200551
552/**
553 * Issue a TPM2_DictionaryAttackParameters command.
554 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700555 * @dev TPM device
Miquel Raynalda9c3392018-05-15 11:57:18 +0200556 * @pw Password
557 * @pw_sz Length of the password
558 * @max_tries Count of authorizations before lockout
559 * @recovery_time Time before decrementation of the failure count
560 * @lockout_recovery Time to wait after a lockout
561 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100562 * Return: code of the operation
Miquel Raynalda9c3392018-05-15 11:57:18 +0200563 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700564u32 tpm2_dam_parameters(struct udevice *dev, const char *pw,
565 const ssize_t pw_sz, unsigned int max_tries,
566 unsigned int recovery_time,
Miquel Raynalda9c3392018-05-15 11:57:18 +0200567 unsigned int lockout_recovery);
568
Miquel Raynaldc26e912018-05-15 11:57:19 +0200569/**
570 * Issue a TPM2_HierarchyChangeAuth command.
571 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700572 * @dev TPM device
Miquel Raynaldc26e912018-05-15 11:57:19 +0200573 * @handle Handle
574 * @newpw New password
575 * @newpw_sz Length of the new password
576 * @oldpw Old password
577 * @oldpw_sz Length of the old password
578 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100579 * Return: code of the operation
Miquel Raynaldc26e912018-05-15 11:57:19 +0200580 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700581int tpm2_change_auth(struct udevice *dev, u32 handle, const char *newpw,
582 const ssize_t newpw_sz, const char *oldpw,
583 const ssize_t oldpw_sz);
Miquel Raynaldc26e912018-05-15 11:57:19 +0200584
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200585/**
586 * Issue a TPM_PCR_SetAuthPolicy command.
587 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700588 * @dev TPM device
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200589 * @pw Platform password
590 * @pw_sz Length of the password
591 * @index Index of the PCR
592 * @digest New key to access the PCR
593 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100594 * Return: code of the operation
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200595 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700596u32 tpm2_pcr_setauthpolicy(struct udevice *dev, const char *pw,
597 const ssize_t pw_sz, u32 index, const char *key);
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200598
599/**
600 * Issue a TPM_PCR_SetAuthValue command.
601 *
Simon Glassabdc7b82018-11-18 14:22:27 -0700602 * @dev TPM device
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200603 * @pw Platform password
604 * @pw_sz Length of the password
605 * @index Index of the PCR
606 * @digest New key to access the PCR
607 * @key_sz Length of the new key
608 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100609 * Return: code of the operation
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200610 */
Simon Glassabdc7b82018-11-18 14:22:27 -0700611u32 tpm2_pcr_setauthvalue(struct udevice *dev, const char *pw,
612 const ssize_t pw_sz, u32 index, const char *key,
613 const ssize_t key_sz);
Miquel Raynalb9dd4fab2018-05-15 11:57:20 +0200614
Dhananjay Phadke06bea492020-06-04 16:43:59 -0700615/**
616 * Issue a TPM2_GetRandom command.
617 *
618 * @dev TPM device
619 * @param data output buffer for the random bytes
620 * @param count size of output buffer
621 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100622 * Return: return code of the operation
Dhananjay Phadke06bea492020-06-04 16:43:59 -0700623 */
624u32 tpm2_get_random(struct udevice *dev, void *data, u32 count);
625
Simon Glass7785bc12021-02-06 14:23:41 -0700626/**
627 * Lock data in the TPM
628 *
629 * Once locked the data cannot be written until after a reboot
630 *
631 * @dev TPM device
632 * @index Index of data to lock
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100633 * Return: code of the operation
Simon Glass7785bc12021-02-06 14:23:41 -0700634 */
635u32 tpm2_write_lock(struct udevice *dev, u32 index);
636
Simon Glass63af92e2021-02-06 14:23:42 -0700637/**
638 * Disable access to any platform data
639 *
640 * This can be called to close off access to the firmware data in the data,
641 * before calling the kernel.
642 *
643 * @dev TPM device
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100644 * Return: code of the operation
Simon Glass63af92e2021-02-06 14:23:42 -0700645 */
646u32 tpm2_disable_platform_hierarchy(struct udevice *dev);
647
Masahisa Kojima7fc93ca2021-11-04 22:59:16 +0900648/**
649 * submit user specified data to the TPM and get response
650 *
651 * @dev TPM device
652 * @sendbuf: Buffer of the data to send
653 * @recvbuf: Buffer to save the response to
654 * @recv_size: Pointer to the size of the response buffer
655 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100656 * Return: code of the operation
Masahisa Kojima7fc93ca2021-11-04 22:59:16 +0900657 */
658u32 tpm2_submit_command(struct udevice *dev, const u8 *sendbuf,
659 u8 *recvbuf, size_t *recv_size);
660
Miquel Raynalff322452018-05-15 11:57:08 +0200661#endif /* __TPM_V2_H */