Michal Simek | 6ded73a | 2016-09-19 10:41:55 +0200 | [diff] [blame] | 1 | menu "FPGA support" |
| 2 | |
Siva Durga Prasad Paladugu | 6b24501 | 2016-01-13 16:25:37 +0530 | [diff] [blame] | 3 | config FPGA |
| 4 | bool |
| 5 | |
Patrick Bruenn | 98d62e6 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 6 | config FPGA_ALTERA |
| 7 | bool "Enable Altera FPGA drivers" |
| 8 | select FPGA |
| 9 | help |
| 10 | Say Y here to enable the Altera FPGA driver |
| 11 | |
| 12 | This provides basic infrastructure to support Altera FPGA devices. |
| 13 | Enable Altera FPGA specific functions which includes bitstream |
| 14 | (in BIT format), fpga and device validation. |
| 15 | |
Tien Fong Chee | fa23ba1 | 2017-07-26 13:05:40 +0800 | [diff] [blame] | 16 | config FPGA_SOCFPGA |
| 17 | bool "Enable Gen5 and Arria10 common FPGA drivers" |
| 18 | select FPGA_ALTERA |
| 19 | help |
| 20 | Say Y here to enable the Gen5 and Arria10 common FPGA driver |
| 21 | |
| 22 | This provides common functionality for Gen5 and Arria10 devices. |
| 23 | |
Patrick Bruenn | 98d62e6 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 24 | config FPGA_CYCLON2 |
| 25 | bool "Enable Altera FPGA driver for Cyclone II" |
| 26 | depends on FPGA_ALTERA |
| 27 | help |
| 28 | Say Y here to enable the Altera Cyclone II FPGA specific driver |
| 29 | |
| 30 | This provides common functionality for Altera Cyclone II devices. |
| 31 | Enable FPGA driver for loading bitstream in BIT and BIN format |
| 32 | on Altera Cyclone II device. |
| 33 | |
Siva Durga Prasad Paladugu | 6b24501 | 2016-01-13 16:25:37 +0530 | [diff] [blame] | 34 | config FPGA_XILINX |
| 35 | bool "Enable Xilinx FPGA drivers" |
| 36 | select FPGA |
| 37 | help |
| 38 | Enable Xilinx FPGA specific functions which includes bitstream |
| 39 | (in BIT format), fpga and device validation. |
| 40 | |
| 41 | config FPGA_ZYNQMPPL |
| 42 | bool "Enable Xilinx FPGA driver for ZynqMP" |
| 43 | depends on FPGA_XILINX |
| 44 | help |
| 45 | Enable FPGA driver for loading bitstream in BIT and BIN format |
| 46 | on Xilinx Zynq UltraScale+ (ZynqMP) device. |
| 47 | |
Vipul Kumar | f415834 | 2018-02-16 18:02:49 +0530 | [diff] [blame] | 48 | config FPGA_SPARTAN3 |
| 49 | bool "Enable Spartan3 FPGA driver" |
| 50 | help |
| 51 | Enable Spartan3 FPGA driver for loading in BIT format. |
| 52 | |
Vipul Kumar | 3990c9d | 2018-02-16 18:02:51 +0530 | [diff] [blame] | 53 | config FPGA_ZYNQPL |
| 54 | bool "Enable Xilinx FPGA for Zynq" |
| 55 | depends on ARCH_ZYNQ |
| 56 | help |
| 57 | Enable FPGA driver for loading bitstream in BIT and BIN format |
| 58 | on Xilinx Zynq devices. |
| 59 | |
Michal Simek | 6ded73a | 2016-09-19 10:41:55 +0200 | [diff] [blame] | 60 | endmenu |