wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 1 | /* |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 2 | * Gary Jennejohn <garyj@denx.de> |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 3 | * |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 4 | * Configuration settings for the CMC PU2 board. |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #ifndef __CONFIG_H |
| 26 | #define __CONFIG_H |
| 27 | |
| 28 | /* |
| 29 | * If we are developing, we might want to start armboot from ram |
| 30 | * so we MUST NOT initialize critical regs like mem-timing ... |
| 31 | */ |
| 32 | #define CONFIG_INIT_CRITICAL /* undef for developing */ |
| 33 | |
| 34 | /* ARM asynchronous clock */ |
| 35 | #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ |
| 36 | #define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 37 | |
| 38 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| 39 | |
| 40 | #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */ |
| 41 | #define CONFIG_CMC_PU2 1 /* on an CMC_PU2 Board */ |
| 42 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 43 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 44 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 45 | #define CONFIG_INITRD_TAG 1 |
| 46 | |
| 47 | /* define this to include the functionality of boot.bin in u-boot */ |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 48 | #define CONFIG_BOOTBINFUNC |
| 49 | |
| 50 | /* just to make sure */ |
| 51 | #ifndef CONFIG_BOOTBINFUNC |
| 52 | #define CONFIG_BOOTBINFUNC |
| 53 | #endif |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 54 | |
| 55 | /* |
| 56 | * Size of malloc() pool |
| 57 | */ |
| 58 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
| 59 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 60 | |
| 61 | #define CONFIG_BAUDRATE 9600 |
| 62 | |
| 63 | #define CFG_AT91C_BRGR_DIVISOR 390 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */ |
| 64 | |
| 65 | /* |
| 66 | * Hardware drivers |
| 67 | */ |
| 68 | |
| 69 | /* define one of these to choose the DBGU, USART0 or USART1 as console */ |
| 70 | #undef CONFIG_DBGU |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 71 | #define CONFIG_USART0 |
| 72 | #undef CONFIG_USART1 |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 73 | |
| 74 | #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ |
| 75 | |
| 76 | #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ |
| 77 | |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 78 | #define CONFIG_HARD_I2C |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 79 | |
| 80 | #ifdef CONFIG_HARD_I2C |
| 81 | #define CFG_I2C_SPEED 0 /* not used */ |
| 82 | #define CFG_I2C_SLAVE 0 /* not used */ |
| 83 | #define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */ |
| 84 | #define CFG_I2C_RTC_ADDR 0x32 |
| 85 | #define CFG_I2C_EEPROM_ADDR 0x50 |
| 86 | #define CFG_I2C_EEPROM_ADDR_LEN 1 |
| 87 | #define CFG_I2C_EEPROM_ADDR_OVERFLOW |
| 88 | #endif |
| 89 | |
| 90 | #define CONFIG_BOOTDELAY 3 |
| 91 | /* #define CONFIG_ENV_OVERWRITE 1 */ |
| 92 | |
| 93 | #ifdef CONFIG_HARD_I2C |
| 94 | #define CONFIG_COMMANDS \ |
| 95 | ((CONFIG_CMD_DFL | \ |
| 96 | CFG_CMD_I2C | \ |
wdenk | 9455b7f | 2004-10-11 22:25:49 +0000 | [diff] [blame] | 97 | CFG_CMD_DATE | \ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 98 | CFG_CMD_EEPROM | \ |
| 99 | CFG_CMD_DHCP ) & \ |
| 100 | ~(CFG_CMD_BDI | \ |
| 101 | CFG_CMD_IMI | \ |
| 102 | CFG_CMD_AUTOSCRIPT | \ |
| 103 | CFG_CMD_FPGA | \ |
| 104 | CFG_CMD_MISC | \ |
| 105 | CFG_CMD_LOADS )) |
| 106 | #else |
| 107 | #define CONFIG_COMMANDS \ |
| 108 | ((CONFIG_CMD_DFL | \ |
| 109 | CFG_CMD_DHCP ) & \ |
| 110 | ~(CFG_CMD_BDI | \ |
| 111 | CFG_CMD_IMI | \ |
| 112 | CFG_CMD_AUTOSCRIPT | \ |
| 113 | CFG_CMD_FPGA | \ |
| 114 | CFG_CMD_MISC | \ |
| 115 | CFG_CMD_LOADS )) |
| 116 | #endif |
| 117 | |
| 118 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 119 | #include <cmd_confdefs.h> |
| 120 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 121 | #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ |
| 122 | #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ |
| 123 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 124 | #define CONFIG_NR_DRAM_BANKS 1 |
| 125 | #define PHYS_SDRAM 0x20000000 |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 126 | #define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 127 | |
| 128 | #define CFG_MEMTEST_START PHYS_SDRAM |
| 129 | #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 |
| 130 | |
| 131 | #define CONFIG_DRIVER_ETHER |
| 132 | #define CONFIG_NET_RETRY_COUNT 20 |
| 133 | #define CONFIG_AT91C_USE_RMII |
| 134 | |
| 135 | #define CONFIG_HAS_DATAFLASH 1 |
| 136 | #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) |
| 137 | #define CFG_MAX_DATAFLASH_BANKS 2 |
| 138 | #define CFG_MAX_DATAFLASH_PAGES 16384 |
| 139 | #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ |
| 140 | #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ |
| 141 | |
| 142 | #define PHYS_FLASH_1 0x10000000 |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 143 | #define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 144 | #define CFG_FLASH_BASE PHYS_FLASH_1 |
| 145 | #define CFG_MAX_FLASH_BANKS 1 |
| 146 | #define CFG_MAX_FLASH_SECT 256 |
| 147 | #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ |
| 148 | #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ |
| 149 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 150 | #define CFG_ENV_IS_IN_FLASH 1 |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 151 | #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* after u-boot.bin */ |
| 152 | #define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 153 | |
| 154 | #define CFG_LOAD_ADDR 0x21000000 /* default load address */ |
| 155 | |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 156 | #define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ |
| 157 | #define CFG_U_BOOT_BASE PHYS_FLASH_1 |
| 158 | #define CFG_U_BOOT_SIZE 0x20000 /* 128 KBytes */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 159 | |
| 160 | #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| 161 | |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 162 | #define CFG_PROMPT "cmc> " /* Monitor Command Prompt */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 163 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 164 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 165 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 166 | |
| 167 | #ifndef __ASSEMBLY__ |
| 168 | /*----------------------------------------------------------------------- |
| 169 | * Board specific extension for bd_info |
| 170 | * |
| 171 | * This structure is embedded in the global bd_info (bd_t) structure |
| 172 | * and can be used by the board specific code (eg board/...) |
| 173 | */ |
| 174 | |
| 175 | struct bd_info_ext { |
| 176 | /* helper variable for board environment handling |
| 177 | * |
| 178 | * env_crc_valid == 0 => uninitialised |
| 179 | * env_crc_valid > 0 => environment crc in flash is valid |
| 180 | * env_crc_valid < 0 => environment crc in flash is invalid |
| 181 | */ |
| 182 | int env_crc_valid; |
| 183 | }; |
| 184 | #endif |
| 185 | |
wdenk | 9455b7f | 2004-10-11 22:25:49 +0000 | [diff] [blame] | 186 | #define CFG_HZ 1000 |
| 187 | #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 188 | /* AT91C_TC_TIMER_DIV1_CLOCK */ |
| 189 | |
| 190 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ |
| 191 | |
| 192 | #ifdef CONFIG_USE_IRQ |
| 193 | #error CONFIG_USE_IRQ not supported |
| 194 | #endif |
| 195 | |
| 196 | #endif |