blob: 4d8b8a626becb3a3685a9f18bad66bc96e0dfeb6 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000026
27/* TODO: Can we move these into arch/ headers? */
28#ifdef CONFIG_8xx
29#include <mpc8xx.h>
30#endif
31#ifdef CONFIG_5xx
32#include <mpc5xx.h>
33#endif
34#ifdef CONFIG_MPC5xxx
35#include <mpc5xxx.h>
36#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070037#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070038#include <asm/mp.h>
39#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000040
Simon Glassa733b062013-04-26 02:53:43 +000041#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000042#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000043#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020044#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070045#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000046#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000047#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000048#include <asm/io.h>
49#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000050#ifdef CONFIG_X86
51#include <asm/init_helpers.h>
52#include <asm/relocate.h>
53#endif
Simon Glassa733b062013-04-26 02:53:43 +000054#ifdef CONFIG_SANDBOX
55#include <asm/state.h>
56#endif
Simon Glassab7cd622014-07-23 06:55:04 -060057#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000058#include <linux/compiler.h>
59
60/*
61 * Pointer to initial global data area
62 *
63 * Here we initialize it if needed.
64 */
65#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66#undef XTRN_DECLARE_GLOBAL_DATA_PTR
67#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
69#else
70DECLARE_GLOBAL_DATA_PTR;
71#endif
72
73/*
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
76 *
77 * void led_set_state(enum led_colour_t colour, int on);
78 */
79/************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
83 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020084__weak void coloured_LED_init(void) {}
85__weak void red_led_on(void) {}
86__weak void red_led_off(void) {}
87__weak void green_led_on(void) {}
88__weak void green_led_off(void) {}
89__weak void yellow_led_on(void) {}
90__weak void yellow_led_off(void) {}
91__weak void blue_led_on(void) {}
92__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000093
94/*
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
97 *
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 * a structure...
103 */
104
105/*
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 */
108
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800109#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000110static int init_func_watchdog_init(void)
111{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800112# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Heiko Schocher2b8b38e2015-01-21 08:38:21 +0100114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800115 hw_watchdog_init();
116# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000117 puts(" Watchdog enabled\n");
118 WATCHDOG_RESET();
119
120 return 0;
121}
122
123int init_func_watchdog_reset(void)
124{
125 WATCHDOG_RESET();
126
127 return 0;
128}
129#endif /* CONFIG_WATCHDOG */
130
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200131__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000132{
133 /* please define platform specific board_add_ram_info() */
134}
135
Simon Glass1938f4a2013-03-11 06:49:53 +0000136static int init_baud_rate(void)
137{
138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
139 return 0;
140}
141
142static int display_text_info(void)
143{
Simon Glassa733b062013-04-26 02:53:43 +0000144#ifndef CONFIG_SANDBOX
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100145 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000146
Simon Glass632efa72013-03-11 07:06:48 +0000147 bss_start = (ulong)&__bss_start;
148 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100149
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800150#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100151 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800152#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100153 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800154#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100155
156 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
157 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000158#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000159
160#ifdef CONFIG_MODEM_SUPPORT
161 debug("Modem Support enabled\n");
162#endif
163#ifdef CONFIG_USE_IRQ
164 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
165 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
166#endif
167
168 return 0;
169}
170
171static int announce_dram_init(void)
172{
173 puts("DRAM: ");
174 return 0;
175}
176
Paul Burton3da7e5a2014-04-07 10:11:20 +0100177#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000178static int init_func_ram(void)
179{
180#ifdef CONFIG_BOARD_TYPES
181 int board_type = gd->board_type;
182#else
183 int board_type = 0; /* use dummy arg */
184#endif
185
186 gd->ram_size = initdram(board_type);
187
188 if (gd->ram_size > 0)
189 return 0;
190
191 puts("*** failed ***\n");
192 return 1;
193}
194#endif
195
Simon Glass1938f4a2013-03-11 06:49:53 +0000196static int show_dram_config(void)
197{
York Sunfa39ffe2014-05-02 17:28:05 -0700198 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000199
200#ifdef CONFIG_NR_DRAM_BANKS
201 int i;
202
203 debug("\nRAM Configuration:\n");
204 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
205 size += gd->bd->bi_dram[i].size;
206 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
207#ifdef DEBUG
208 print_size(gd->bd->bi_dram[i].size, "\n");
209#endif
210 }
211 debug("\nDRAM: ");
212#else
213 size = gd->ram_size;
214#endif
215
Simon Glasse4fef6c2013-03-11 14:30:42 +0000216 print_size(size, "");
217 board_add_ram_info(0);
218 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000219
220 return 0;
221}
222
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200223__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000224{
225#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
226 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
227 gd->bd->bi_dram[0].size = get_effective_memsize();
228#endif
229}
230
Heiko Schocherea818db2013-01-29 08:53:15 +0100231#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000232static int init_func_i2c(void)
233{
234 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200235#ifdef CONFIG_SYS_I2C
236 i2c_init_all();
237#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000238 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200239#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000240 puts("ready\n");
241 return 0;
242}
243#endif
244
245#if defined(CONFIG_HARD_SPI)
246static int init_func_spi(void)
247{
248 puts("SPI: ");
249 spi_init();
250 puts("ready\n");
251 return 0;
252}
253#endif
254
255__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000256static int zero_global_data(void)
257{
258 memset((void *)gd, '\0', sizeof(gd_t));
259
260 return 0;
261}
262
263static int setup_mon_len(void)
264{
Michal Simeke945f6d2014-05-08 16:08:44 +0200265#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100266 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Simon Glassa733b062013-04-26 02:53:43 +0000267#elif defined(CONFIG_SANDBOX)
268 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800269#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800270 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Simon Glass632efa72013-03-11 07:06:48 +0000271#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000274#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000275 return 0;
276}
277
278__weak int arch_cpu_init(void)
279{
280 return 0;
281}
282
Simon Glassf828bf22013-04-20 08:42:41 +0000283#ifdef CONFIG_OF_HOSTFILE
284
Simon Glassf828bf22013-04-20 08:42:41 +0000285static int read_fdt_from_file(void)
286{
287 struct sandbox_state *state = state_get_current();
Simon Glass95fac6a2014-02-27 13:25:58 -0700288 const char *fname = state->fdt_fname;
Simon Glassf828bf22013-04-20 08:42:41 +0000289 void *blob;
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800290 loff_t size;
Simon Glassf828bf22013-04-20 08:42:41 +0000291 int err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700292 int fd;
Simon Glassf828bf22013-04-20 08:42:41 +0000293
294 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
295 if (!state->fdt_fname) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700296 err = fdt_create_empty_tree(blob, 256);
Simon Glassf828bf22013-04-20 08:42:41 +0000297 if (!err)
298 goto done;
Simon Glass95fac6a2014-02-27 13:25:58 -0700299 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
300 return -EINVAL;
Simon Glassf828bf22013-04-20 08:42:41 +0000301 }
Simon Glass95fac6a2014-02-27 13:25:58 -0700302
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800303 err = os_get_filesize(fname, &size);
304 if (err < 0) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700305 printf("Failed to file FDT file '%s'\n", fname);
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800306 return err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700307 }
308 fd = os_open(fname, OS_O_RDONLY);
309 if (fd < 0) {
310 printf("Failed to open FDT file '%s'\n", fname);
311 return -EACCES;
312 }
313 if (os_read(fd, blob, size) != size) {
314 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000315 return -EIO;
Simon Glass95fac6a2014-02-27 13:25:58 -0700316 }
317 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000318
319done:
320 gd->fdt_blob = blob;
321
322 return 0;
323}
324#endif
325
Simon Glassa733b062013-04-26 02:53:43 +0000326#ifdef CONFIG_SANDBOX
327static int setup_ram_buf(void)
328{
Simon Glass5c2859c2013-11-10 10:27:03 -0700329 struct sandbox_state *state = state_get_current();
330
331 gd->arch.ram_buf = state->ram_buf;
332 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000333
334 return 0;
335}
336#endif
337
Simon Glass1938f4a2013-03-11 06:49:53 +0000338static int setup_fdt(void)
339{
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900340#ifdef CONFIG_OF_CONTROL
341# ifdef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000342 /* Get a pointer to the FDT */
Masahiro Yamada6ab6b2a2014-02-05 11:28:25 +0900343 gd->fdt_blob = __dtb_dt_begin;
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900344# elif defined CONFIG_OF_SEPARATE
Simon Glass1938f4a2013-03-11 06:49:53 +0000345 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000346 gd->fdt_blob = (ulong *)&_end;
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900347# elif defined(CONFIG_OF_HOSTFILE)
Simon Glassf828bf22013-04-20 08:42:41 +0000348 if (read_fdt_from_file()) {
349 puts("Failed to read control FDT\n");
350 return -1;
351 }
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900352# endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 /* Allow the early environment to override the fdt address */
354 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
355 (uintptr_t)gd->fdt_blob);
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900356#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000357 return 0;
358}
359
360/* Get the top of usable RAM */
361__weak ulong board_get_usable_ram_top(ulong total_size)
362{
363 return gd->ram_top;
364}
365
366static int setup_dest_addr(void)
367{
368 debug("Monitor len: %08lX\n", gd->mon_len);
369 /*
370 * Ram is setup, size stored in gd !!
371 */
372 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
373#if defined(CONFIG_SYS_MEM_TOP_HIDE)
374 /*
375 * Subtract specified amount of memory to hide so that it won't
376 * get "touched" at all by U-Boot. By fixing up gd->ram_size
377 * the Linux kernel should now get passed the now "corrected"
378 * memory size and won't touch it either. This should work
379 * for arch/ppc and arch/powerpc. Only Linux board ports in
380 * arch/powerpc with bootwrapper support, that recalculate the
381 * memory size from the SDRAM controller setup will have to
382 * get fixed.
383 */
384 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
385#endif
386#ifdef CONFIG_SYS_SDRAM_BASE
387 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
388#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000389 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000390 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000391 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000392 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700393#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000394 /*
395 * We need to make sure the location we intend to put secondary core
396 * boot code is reserved and not used by any part of u-boot
397 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000398 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
399 gd->relocaddr = determine_mp_bootpg(NULL);
400 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000401 }
402#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000403 return 0;
404}
405
406#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
407static int reserve_logbuffer(void)
408{
409 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000410 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000411 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000412 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000413 return 0;
414}
415#endif
416
417#ifdef CONFIG_PRAM
418/* reserve protected RAM */
419static int reserve_pram(void)
420{
421 ulong reg;
422
423 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000424 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000425 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000426 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000427 return 0;
428}
429#endif /* CONFIG_PRAM */
430
431/* Round memory pointer down to next 4 kB limit */
432static int reserve_round_4k(void)
433{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000434 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000435 return 0;
436}
437
438#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
439 defined(CONFIG_ARM)
440static int reserve_mmu(void)
441{
442 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800443 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000444 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000445
446 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000447 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000448
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000449 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000450 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
451 gd->arch.tlb_addr + gd->arch.tlb_size);
452 return 0;
453}
454#endif
455
456#ifdef CONFIG_LCD
457static int reserve_lcd(void)
458{
459#ifdef CONFIG_FB_ADDR
460 gd->fb_base = CONFIG_FB_ADDR;
461#else
462 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000463 gd->relocaddr = lcd_setmem(gd->relocaddr);
464 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000465#endif /* CONFIG_FB_ADDR */
466 return 0;
467}
468#endif /* CONFIG_LCD */
469
Simon Glass71c52db2013-06-11 11:14:42 -0700470static int reserve_trace(void)
471{
472#ifdef CONFIG_TRACE
473 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
474 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
475 debug("Reserving %dk for trace data at: %08lx\n",
476 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
477#endif
478
479 return 0;
480}
481
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800482#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
483 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
484 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000485static int reserve_video(void)
486{
487 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000488 gd->relocaddr = video_setmem(gd->relocaddr);
489 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000490
491 return 0;
492}
493#endif
494
Simon Glass1938f4a2013-03-11 06:49:53 +0000495static int reserve_uboot(void)
496{
497 /*
498 * reserve memory for U-Boot code, data & bss
499 * round down to next 4 kB limit
500 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000501 gd->relocaddr -= gd->mon_len;
502 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000503#ifdef CONFIG_E500
504 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000505 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000506#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000507
508 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000509 gd->relocaddr);
510
511 gd->start_addr_sp = gd->relocaddr;
512
Simon Glass1938f4a2013-03-11 06:49:53 +0000513 return 0;
514}
515
Simon Glass8cae8a62013-03-05 14:39:45 +0000516#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000517/* reserve memory for malloc() area */
518static int reserve_malloc(void)
519{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000520 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000521 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000522 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000523 return 0;
524}
525
526/* (permanently) allocate a Board Info struct */
527static int reserve_board(void)
528{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800529 if (!gd->bd) {
530 gd->start_addr_sp -= sizeof(bd_t);
531 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
532 memset(gd->bd, '\0', sizeof(bd_t));
533 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
534 sizeof(bd_t), gd->start_addr_sp);
535 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000536 return 0;
537}
Simon Glass8cae8a62013-03-05 14:39:45 +0000538#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000539
540static int setup_machine(void)
541{
542#ifdef CONFIG_MACH_TYPE
543 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
544#endif
545 return 0;
546}
547
548static int reserve_global_data(void)
549{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000550 gd->start_addr_sp -= sizeof(gd_t);
551 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000552 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000553 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000554 return 0;
555}
556
557static int reserve_fdt(void)
558{
559 /*
560 * If the device tree is sitting immediate above our image then we
561 * must relocate it. If it is embedded in the data section, then it
562 * will be relocated with other data.
563 */
564 if (gd->fdt_blob) {
565 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
566
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000567 gd->start_addr_sp -= gd->fdt_size;
568 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000569 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000570 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000571 }
572
573 return 0;
574}
575
Andreas Bießmann68145d42015-02-06 23:06:45 +0100576int arch_reserve_stacks(void)
577{
578 return 0;
579}
580
Simon Glass1938f4a2013-03-11 06:49:53 +0000581static int reserve_stacks(void)
582{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100583 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000584 gd->start_addr_sp -= 16;
585 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000586
587 /*
Andreas Bießmann68145d42015-02-06 23:06:45 +0100588 * let the architecture specific code tailor gd->start_addr_sp and
589 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000590 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100591 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000592}
593
594static int display_new_sp(void)
595{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000596 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000597
598 return 0;
599}
600
Simon Glasse4fef6c2013-03-11 14:30:42 +0000601#ifdef CONFIG_PPC
602static int setup_board_part1(void)
603{
604 bd_t *bd = gd->bd;
605
606 /*
607 * Save local variables to board info struct
608 */
609
610 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
611 bd->bi_memsize = gd->ram_size; /* size in bytes */
612
613#ifdef CONFIG_SYS_SRAM_BASE
614 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
615 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
616#endif
617
Masahiro Yamada58dac322014-03-05 17:40:10 +0900618#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000619 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
620 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
621#endif
622#if defined(CONFIG_MPC5xxx)
623 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
624#endif
625#if defined(CONFIG_MPC83xx)
626 bd->bi_immrbar = CONFIG_SYS_IMMR;
627#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000628
629 return 0;
630}
631
632static int setup_board_part2(void)
633{
634 bd_t *bd = gd->bd;
635
636 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
637 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
638#if defined(CONFIG_CPM2)
639 bd->bi_cpmfreq = gd->arch.cpm_clk;
640 bd->bi_brgfreq = gd->arch.brg_clk;
641 bd->bi_sccfreq = gd->arch.scc_clk;
642 bd->bi_vco = gd->arch.vco_out;
643#endif /* CONFIG_CPM2 */
644#if defined(CONFIG_MPC512X)
645 bd->bi_ipsfreq = gd->arch.ips_clk;
646#endif /* CONFIG_MPC512X */
647#if defined(CONFIG_MPC5xxx)
648 bd->bi_ipbfreq = gd->arch.ipb_clk;
649 bd->bi_pcifreq = gd->pci_clk;
650#endif /* CONFIG_MPC5xxx */
651
652 return 0;
653}
654#endif
655
656#ifdef CONFIG_SYS_EXTBDINFO
657static int setup_board_extra(void)
658{
659 bd_t *bd = gd->bd;
660
661 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
662 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
663 sizeof(bd->bi_r_version));
664
665 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
666 bd->bi_plb_busfreq = gd->bus_clk;
667#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
668 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
669 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
670 bd->bi_pci_busfreq = get_PCI_freq();
671 bd->bi_opbfreq = get_OPB_freq();
672#elif defined(CONFIG_XILINX_405)
673 bd->bi_pci_busfreq = get_PCI_freq();
674#endif
675
676 return 0;
677}
678#endif
679
Simon Glass1938f4a2013-03-11 06:49:53 +0000680#ifdef CONFIG_POST
681static int init_post(void)
682{
683 post_bootmode_init();
684 post_run(NULL, POST_ROM | post_bootmode_get(0));
685
686 return 0;
687}
688#endif
689
Simon Glass1938f4a2013-03-11 06:49:53 +0000690static int setup_dram_config(void)
691{
692 /* Ram is board specific, so move it to board code ... */
693 dram_init_banksize();
694
695 return 0;
696}
697
698static int reloc_fdt(void)
699{
700 if (gd->new_fdt) {
701 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
702 gd->fdt_blob = gd->new_fdt;
703 }
704
705 return 0;
706}
707
708static int setup_reloc(void)
709{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800710#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000711 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800712#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000713 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
714
715 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000716 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000717 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
718 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000719
720 return 0;
721}
722
723/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700724#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000725
726static int jump_to_copy(void)
727{
Simon Glass48a33802013-03-05 14:39:52 +0000728 /*
729 * x86 is special, but in a nice way. It uses a trampoline which
730 * enables the dcache if possible.
731 *
732 * For now, other archs use relocate_code(), which is implemented
733 * similarly for all archs. When we do generic relocation, hopefully
734 * we can make all archs enable the dcache prior to relocation.
735 */
736#ifdef CONFIG_X86
737 /*
738 * SDRAM and console are now initialised. The final stack can now
739 * be setup in SDRAM. Code execution will continue in Flash, but
740 * with the stack in SDRAM and Global Data in temporary memory
741 * (CPU cache)
742 */
743 board_init_f_r_trampoline(gd->start_addr_sp);
744#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000745 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000746#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000747
748 return 0;
749}
750#endif
751
752/* Record the board_init_f() bootstage (after arch_cpu_init()) */
753static int mark_bootstage(void)
754{
755 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
756
757 return 0;
758}
759
Simon Glassd59476b2014-07-10 22:23:28 -0600760static int initf_malloc(void)
761{
762#ifdef CONFIG_SYS_MALLOC_F_LEN
763 assert(gd->malloc_base); /* Set up by crt0.S */
764 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
765 gd->malloc_ptr = 0;
766#endif
767
768 return 0;
769}
770
Simon Glassab7cd622014-07-23 06:55:04 -0600771static int initf_dm(void)
772{
773#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
774 int ret;
775
776 ret = dm_init_and_scan(true);
777 if (ret)
778 return ret;
779#endif
780
781 return 0;
782}
783
Simon Glass146251f2015-01-19 22:16:12 -0700784/* Architecture-specific memory reservation */
785__weak int reserve_arch(void)
786{
787 return 0;
788}
789
Simon Glass1938f4a2013-03-11 06:49:53 +0000790static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000791#ifdef CONFIG_SANDBOX
792 setup_ram_buf,
793#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000794 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700795 setup_fdt,
Kevin Hilmand2107182014-12-09 15:03:58 -0800796#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700797 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800798#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700799 initf_malloc,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000800#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
801 /* TODO: can this go into arch_cpu_init()? */
802 probecpu,
803#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000804 arch_cpu_init, /* basic arch cpu dependent setup */
805 mark_bootstage,
806#ifdef CONFIG_OF_CONTROL
807 fdtdec_check_fdt,
808#endif
Simon Glass3ea09532014-09-03 17:36:59 -0600809 initf_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000810#if defined(CONFIG_BOARD_EARLY_INIT_F)
811 board_early_init_f,
812#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000813 /* TODO: can any of this go into arch_cpu_init()? */
814#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
815 get_clocks, /* get CPU and bus clocks (etc.) */
816#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
817 && !defined(CONFIG_TQM885D)
818 adjust_sdram_tbs_8xx,
819#endif
820 /* TODO: can we rename this to timer_init()? */
821 init_timebase,
822#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800823#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000824 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000825#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000826#ifdef CONFIG_SYS_ALLOC_DPRAM
827#if !defined(CONFIG_CPM2)
828 dpram_init,
829#endif
830#endif
831#if defined(CONFIG_BOARD_POSTCLK_INIT)
832 board_postclk_init,
833#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000834#ifdef CONFIG_FSL_ESDHC
835 get_clocks,
836#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000837 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000838#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
839 /* get CPU and bus clocks according to the environment variable */
840 get_clocks_866,
841 /* adjust sdram refresh rate according to the new clock */
842 sdram_adjust_866,
843 init_timebase,
844#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000845 init_baud_rate, /* initialze baudrate settings */
846 serial_init, /* serial communications setup */
847 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000848#ifdef CONFIG_SANDBOX
849 sandbox_early_getopt_check,
850#endif
851#ifdef CONFIG_OF_CONTROL
852 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000853#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000854 display_options, /* say that we are here */
855 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900856#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000857 prt_8260_rsr,
858 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900859#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000860#if defined(CONFIG_MPC83xx)
861 prt_83xx_rsr,
862#endif
863#ifdef CONFIG_PPC
864 checkcpu,
865#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000866 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000867#if defined(CONFIG_MPC5xxx)
868 prt_mpc5xxx_clks,
869#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000870#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900871 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000872#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000873 INIT_FUNC_WATCHDOG_INIT
874#if defined(CONFIG_MISC_INIT_F)
875 misc_init_f,
876#endif
877 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100878#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000879 init_func_i2c,
880#endif
881#if defined(CONFIG_HARD_SPI)
882 init_func_spi,
883#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000884 announce_dram_init,
885 /* TODO: unify all these dram functions? */
Andreas Bießmanna752a8b2015-02-06 23:06:48 +0100886#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000887 dram_init, /* configure available RAM banks */
888#endif
Paul Burton3da7e5a2014-04-07 10:11:20 +0100889#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000890 init_func_ram,
891#endif
892#ifdef CONFIG_POST
893 post_init_f,
894#endif
895 INIT_FUNC_WATCHDOG_RESET
896#if defined(CONFIG_SYS_DRAM_TEST)
897 testdram,
898#endif /* CONFIG_SYS_DRAM_TEST */
899 INIT_FUNC_WATCHDOG_RESET
900
Simon Glass1938f4a2013-03-11 06:49:53 +0000901#ifdef CONFIG_POST
902 init_post,
903#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000904 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000905 /*
906 * Now that we have DRAM mapped and working, we can
907 * relocate the code and continue running from DRAM.
908 *
909 * Reserve memory at end of RAM for (top down in that order):
910 * - area that won't get touched by U-Boot and Linux (optional)
911 * - kernel log buffer
912 * - protected RAM
913 * - LCD framebuffer
914 * - monitor code
915 * - board info struct
916 */
917 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800918#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800919 /* Blackfin u-boot monitor should be on top of the ram */
920 reserve_uboot,
921#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000922#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
923 reserve_logbuffer,
924#endif
925#ifdef CONFIG_PRAM
926 reserve_pram,
927#endif
928 reserve_round_4k,
929#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
930 defined(CONFIG_ARM)
931 reserve_mmu,
932#endif
933#ifdef CONFIG_LCD
934 reserve_lcd,
935#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700936 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000937 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800938#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
939 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
940 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000941 reserve_video,
942#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800943#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000944 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800945#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000946#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000947 reserve_malloc,
948 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000949#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000950 setup_machine,
951 reserve_global_data,
952 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700953 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000954 reserve_stacks,
955 setup_dram_config,
956 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000957#ifdef CONFIG_PPC
958 setup_board_part1,
959 INIT_FUNC_WATCHDOG_RESET
960 setup_board_part2,
961#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000962 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000963#ifdef CONFIG_SYS_EXTBDINFO
964 setup_board_extra,
965#endif
966 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000967 reloc_fdt,
968 setup_reloc,
Simon Glass313aef32015-01-01 16:18:09 -0700969#ifdef CONFIG_X86
970 copy_uboot_to_ram,
971 clear_bss,
972 do_elf_reloc_fixups,
973#endif
Simon Glass808434c2013-11-10 10:26:59 -0700974#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000975 jump_to_copy,
976#endif
977 NULL,
978};
979
980void board_init_f(ulong boot_flags)
981{
York Sun2a1680e2014-05-02 17:28:04 -0700982#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
983 /*
984 * For some archtectures, global data is initialized and used before
985 * calling this function. The data should be preserved. For others,
986 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
987 * here to host global data until relocation.
988 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000989 gd_t data;
990
991 gd = &data;
992
David Fengcce6be72013-12-14 11:47:36 +0800993 /*
994 * Clear global data before it is accessed at debug print
995 * in initcall_run_list. Otherwise the debug print probably
996 * get the wrong vaule of gd->have_console.
997 */
David Fengcce6be72013-12-14 11:47:36 +0800998 zero_global_data();
999#endif
1000
Simon Glass1938f4a2013-03-11 06:49:53 +00001001 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001002 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001003
1004 if (initcall_run_list(init_sequence_f))
1005 hang();
1006
Simon Glass808434c2013-11-10 10:26:59 -07001007#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001008 /* NOTREACHED - jump_to_copy() does not return */
1009 hang();
1010#endif
1011}
1012
Simon Glass48a33802013-03-05 14:39:52 +00001013#ifdef CONFIG_X86
1014/*
1015 * For now this code is only used on x86.
1016 *
1017 * init_sequence_f_r is the list of init functions which are run when
1018 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1019 * The following limitations must be considered when implementing an
1020 * '_f_r' function:
1021 * - 'static' variables are read-only
1022 * - Global Data (gd->xxx) is read/write
1023 *
1024 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1025 * supported). It _should_, if possible, copy global data to RAM and
1026 * initialise the CPU caches (to speed up the relocation process)
1027 *
1028 * NOTE: At present only x86 uses this route, but it is intended that
1029 * all archs will move to this when generic relocation is implemented.
1030 */
1031static init_fnc_t init_sequence_f_r[] = {
1032 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +00001033
1034 NULL,
1035};
1036
1037void board_init_f_r(void)
1038{
1039 if (initcall_run_list(init_sequence_f_r))
1040 hang();
1041
1042 /*
1043 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1044 * Transfer execution from Flash to RAM by calculating the address
1045 * of the in-RAM copy of board_init_r() and calling it
1046 */
1047 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1048
1049 /* NOTREACHED - board_init_r() does not return */
1050 hang();
1051}
Simon Glass74d01862015-02-07 11:51:34 -07001052#else
1053ulong board_init_f_mem(ulong top)
1054{
1055 /* Leave space for the stack we are running with now */
1056 top -= 0x40;
1057
1058 top -= sizeof(struct global_data);
1059 top = ALIGN(top, 16);
1060 gd = (struct global_data *)top;
1061 memset((void *)gd, '\0', sizeof(*gd));
1062
1063#ifdef CONFIG_SYS_MALLOC_F_LEN
1064 top -= CONFIG_SYS_MALLOC_F_LEN;
1065 gd->malloc_base = top;
1066#endif
1067
1068 return top;
1069}
Simon Glass48a33802013-03-05 14:39:52 +00001070#endif /* CONFIG_X86 */