Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * vsc9953.h |
| 3 | * |
| 4 | * Driver for the Vitesse VSC9953 L2 Switch |
| 5 | * |
| 6 | * This software may be used and distributed according to the |
| 7 | * terms of the GNU Public License, Version 2, incorporated |
| 8 | * herein by reference. |
| 9 | * |
| 10 | * Copyright 2013 Freescale Semiconductor, Inc. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #ifndef _VSC9953_H_ |
| 15 | #define _VSC9953_H_ |
| 16 | |
| 17 | #include <config.h> |
| 18 | #include <miiphy.h> |
| 19 | #include <asm/types.h> |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 20 | |
| 21 | #define VSC9953_OFFSET (CONFIG_SYS_CCSRBAR_DEFAULT + 0x800000) |
| 22 | |
| 23 | #define VSC9953_SYS_OFFSET 0x010000 |
Codrin Ciubotariu | 9de0598 | 2015-07-24 16:55:26 +0300 | [diff] [blame^] | 24 | #define VSC9953_REW_OFFSET 0x030000 |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 25 | #define VSC9953_DEV_GMII_OFFSET 0x100000 |
| 26 | #define VSC9953_QSYS_OFFSET 0x200000 |
| 27 | #define VSC9953_ANA_OFFSET 0x280000 |
| 28 | #define VSC9953_DEVCPU_GCB 0x070000 |
| 29 | #define VSC9953_ES0 0x040000 |
| 30 | #define VSC9953_IS1 0x050000 |
| 31 | #define VSC9953_IS2 0x060000 |
| 32 | |
| 33 | #define T1040_SWITCH_GMII_DEV_OFFSET 0x010000 |
| 34 | #define VSC9953_PHY_REGS_OFFST 0x0000AC |
| 35 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 36 | /* Macros for vsc9953_chip_regs.soft_rst register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 37 | #define VSC9953_SOFT_SWC_RST_ENA 0x00000001 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 38 | |
| 39 | /* Macros for vsc9953_sys_sys.reset_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 40 | #define VSC9953_CORE_ENABLE 0x80 |
| 41 | #define VSC9953_MEM_ENABLE 0x40 |
| 42 | #define VSC9953_MEM_INIT 0x20 |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 43 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 44 | /* Macros for vsc9953_dev_gmii_mac_cfg_status.mac_ena_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 45 | #define VSC9953_MAC_ENA_CFG 0x00000011 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 46 | |
| 47 | /* Macros for vsc9953_dev_gmii_mac_cfg_status.mac_mode_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 48 | #define VSC9953_MAC_MODE_CFG 0x00000011 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 49 | |
| 50 | /* Macros for vsc9953_dev_gmii_mac_cfg_status.mac_ifg_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 51 | #define VSC9953_MAC_IFG_CFG 0x00000515 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 52 | |
| 53 | /* Macros for vsc9953_dev_gmii_mac_cfg_status.mac_hdx_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 54 | #define VSC9953_MAC_HDX_CFG 0x00001043 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 55 | |
| 56 | /* Macros for vsc9953_dev_gmii_mac_cfg_status.mac_maxlen_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 57 | #define VSC9953_MAC_MAX_LEN 0x000005ee |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 58 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 59 | /* Macros for vsc9953_dev_gmii_port_mode.clock_cfg register */ |
| 60 | #define VSC9953_CLOCK_CFG 0x00000001 |
| 61 | #define VSC9953_CLOCK_CFG_1000M 0x00000001 |
| 62 | |
| 63 | /* Macros for vsc9953_sys_sys.front_port_mode register */ |
| 64 | #define VSC9953_FRONT_PORT_MODE 0x00000000 |
| 65 | |
| 66 | /* Macros for vsc9953_ana_pfc.pfc_cfg register */ |
| 67 | #define VSC9953_PFC_FC 0x00000001 |
| 68 | #define VSC9953_PFC_FC_QSGMII 0x00000000 |
| 69 | |
| 70 | /* Macros for vsc9953_sys_pause_cfg.mac_fc_cfg register */ |
| 71 | #define VSC9953_MAC_FC_CFG 0x04700000 |
| 72 | #define VSC9953_MAC_FC_CFG_QSGMII 0x00700000 |
| 73 | |
| 74 | /* Macros for vsc9953_sys_pause_cfg.pause_cfg register */ |
| 75 | #define VSC9953_PAUSE_CFG 0x001ffffe |
| 76 | |
| 77 | /* Macros for vsc9953_sys_pause_cfgtot_tail_drop_lvl register */ |
| 78 | #define VSC9953_TOT_TAIL_DROP_LVL 0x000003ff |
| 79 | |
| 80 | /* Macros for vsc9953_vcap_core_cfg.vcap_mv_cfg register */ |
Codrin Ciubotariu | c439048 | 2015-07-24 16:52:44 +0300 | [diff] [blame] | 81 | #define VSC9953_VCAP_MV_CFG 0x0000ffff |
| 82 | #define VSC9953_VCAP_UPDATE_CTRL 0x01000004 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 83 | |
Codrin Ciubotariu | 9de0598 | 2015-07-24 16:55:26 +0300 | [diff] [blame^] | 84 | /* Macros for vsc9953_ana_port.vlan_cfg register */ |
| 85 | #define VSC9953_VLAN_CFG_AWARE_ENA 0x00100000 |
| 86 | #define VSC9953_VLAN_CFG_POP_CNT_MASK 0x000c0000 |
| 87 | #define VSC9953_VLAN_CFG_VID_MASK 0x00000fff |
| 88 | |
| 89 | /* Macros for vsc9953_rew_port.port_vlan_cfg register */ |
| 90 | #define VSC9953_PORT_VLAN_CFG_VID_MASK 0x00000fff |
| 91 | |
| 92 | /* Macros for vsc9953_ana_ana_tables.vlan_tidx register */ |
| 93 | #define VSC9953_ANA_TBL_VID_MASK 0x00000fff |
| 94 | |
| 95 | /* Macros for vsc9953_ana_ana_tables.vlan_access register */ |
| 96 | #define VSC9953_VLAN_PORT_MASK 0x00001ffc |
| 97 | #define VSC9953_VLAN_CMD_MASK 0x00000003 |
| 98 | #define VSC9953_VLAN_CMD_IDLE 0x00000000 |
| 99 | #define VSC9953_VLAN_CMD_READ 0x00000001 |
| 100 | #define VSC9953_VLAN_CMD_WRITE 0x00000002 |
| 101 | #define VSC9953_VLAN_CMD_INIT 0x00000003 |
| 102 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 103 | /* Macros for vsc9953_qsys_sys.switch_port_mode register */ |
Codrin Ciubotariu | fe91095 | 2015-07-24 16:52:46 +0300 | [diff] [blame] | 104 | #define VSC9953_PORT_ENA 0x00002000 |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 105 | |
Codrin Ciubotariu | 9de0598 | 2015-07-24 16:55:26 +0300 | [diff] [blame^] | 106 | /* Macros for vsc9953_ana_ana.adv_learn register */ |
| 107 | #define VSC9953_VLAN_CHK 0x00000400 |
| 108 | |
| 109 | /* Macros for vsc9953_rew_port.port_tag_cfg register */ |
| 110 | #define VSC9953_TAG_CFG_MASK 0x00000180 |
| 111 | #define VSC9953_TAG_CFG_NONE 0x00000000 |
| 112 | #define VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO 0x00000080 |
| 113 | #define VSC9953_TAG_CFG_ALL_BUT_ZERO 0x00000100 |
| 114 | #define VSC9953_TAG_CFG_ALL 0x00000180 |
| 115 | |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 116 | #define VSC9953_MAX_PORTS 10 |
| 117 | #define VSC9953_PORT_CHECK(port) \ |
| 118 | (((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1) |
| 119 | #define VSC9953_INTERNAL_PORT_CHECK(port) ( \ |
| 120 | ( \ |
| 121 | (port) < VSC9953_MAX_PORTS - 2 || (port) >= VSC9953_MAX_PORTS \ |
| 122 | ) ? 0 : 1 \ |
| 123 | ) |
Codrin Ciubotariu | 9de0598 | 2015-07-24 16:55:26 +0300 | [diff] [blame^] | 124 | #define VSC9953_MAX_VLAN 4096 |
| 125 | #define VSC9953_VLAN_CHECK(vid) \ |
| 126 | (((vid) < 0 || (vid) >= VSC9953_MAX_VLAN) ? 0 : 1) |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 127 | |
| 128 | #define DEFAULT_VSC9953_MDIO_NAME "VSC9953_MDIO0" |
| 129 | |
| 130 | #define MIIMIND_OPR_PEND 0x00000004 |
| 131 | |
| 132 | struct vsc9953_mdio_info { |
| 133 | struct vsc9953_mii_mng *regs; |
| 134 | char *name; |
| 135 | }; |
| 136 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 137 | /* VSC9953 ANA structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 138 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 139 | struct vsc9953_ana_port { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 140 | u32 vlan_cfg; |
| 141 | u32 drop_cfg; |
| 142 | u32 qos_cfg; |
| 143 | u32 vcap_cfg; |
| 144 | u32 vcap_s1_key_cfg[3]; |
| 145 | u32 vcap_s2_cfg; |
| 146 | u32 qos_pcp_dei_map_cfg[16]; |
| 147 | u32 cpu_fwd_cfg; |
| 148 | u32 cpu_fwd_bpdu_cfg; |
| 149 | u32 cpu_fwd_garp_cfg; |
| 150 | u32 cpu_fwd_ccm_cfg; |
| 151 | u32 port_cfg; |
| 152 | u32 pol_cfg; |
| 153 | u32 reserved[34]; |
| 154 | }; |
| 155 | |
| 156 | struct vsc9953_ana_pol { |
| 157 | u32 pol_pir_cfg; |
| 158 | u32 pol_cir_cfg; |
| 159 | u32 pol_mode_cfg; |
| 160 | u32 pol_pir_state; |
| 161 | u32 pol_cir_state; |
| 162 | u32 reserved1[3]; |
| 163 | }; |
| 164 | |
| 165 | struct vsc9953_ana_ana_tables { |
| 166 | u32 entry_lim[11]; |
| 167 | u32 an_moved; |
| 168 | u32 mach_data; |
| 169 | u32 macl_data; |
| 170 | u32 mac_access; |
| 171 | u32 mact_indx; |
| 172 | u32 vlan_access; |
| 173 | u32 vlan_tidx; |
| 174 | }; |
| 175 | |
| 176 | struct vsc9953_ana_ana { |
| 177 | u32 adv_learn; |
| 178 | u32 vlan_mask; |
Codrin Ciubotariu | 440873d | 2015-07-24 16:55:24 +0300 | [diff] [blame] | 179 | u32 reserved; |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 180 | u32 anag_efil; |
| 181 | u32 an_events; |
| 182 | u32 storm_limit_burst; |
| 183 | u32 storm_limit_cfg[4]; |
| 184 | u32 isolated_prts; |
| 185 | u32 community_ports; |
| 186 | u32 auto_age; |
| 187 | u32 mac_options; |
| 188 | u32 learn_disc; |
| 189 | u32 agen_ctrl; |
| 190 | u32 mirror_ports; |
| 191 | u32 emirror_ports; |
| 192 | u32 flooding; |
| 193 | u32 flooding_ipmc; |
| 194 | u32 sflow_cfg[11]; |
| 195 | u32 port_mode[12]; |
| 196 | }; |
| 197 | |
| 198 | struct vsc9953_ana_pgid { |
| 199 | u32 port_grp_id[91]; |
| 200 | }; |
| 201 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 202 | struct vsc9953_ana_pfc { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 203 | u32 pfc_cfg; |
| 204 | u32 reserved1[15]; |
| 205 | }; |
| 206 | |
| 207 | struct vsc9953_ana_pol_misc { |
| 208 | u32 pol_flowc[10]; |
| 209 | u32 reserved1[17]; |
| 210 | u32 pol_hyst; |
| 211 | }; |
| 212 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 213 | struct vsc9953_ana_common { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 214 | u32 aggr_cfg; |
| 215 | u32 cpuq_cfg; |
| 216 | u32 cpuq_8021_cfg; |
| 217 | u32 dscp_cfg; |
| 218 | u32 dscp_rewr_cfg; |
| 219 | u32 vcap_rng_type_cfg; |
| 220 | u32 vcap_rng_val_cfg; |
| 221 | u32 discard_cfg; |
| 222 | u32 fid_cfg; |
| 223 | }; |
| 224 | |
| 225 | struct vsc9953_analyzer { |
| 226 | struct vsc9953_ana_port port[11]; |
| 227 | u32 reserved1[9536]; |
| 228 | struct vsc9953_ana_pol pol[164]; |
| 229 | struct vsc9953_ana_ana_tables ana_tables; |
| 230 | u32 reserved2[14]; |
| 231 | struct vsc9953_ana_ana ana; |
| 232 | u32 reserved3[22]; |
| 233 | struct vsc9953_ana_pgid port_id_tbl; |
| 234 | u32 reserved4[549]; |
| 235 | struct vsc9953_ana_pfc pfc[10]; |
| 236 | struct vsc9953_ana_pol_misc pol_misc; |
| 237 | u32 reserved5[196]; |
| 238 | struct vsc9953_ana_common common; |
| 239 | }; |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 240 | /* END VSC9953 ANA structure t*/ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 241 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 242 | /* VSC9953 DEV_GMII structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 243 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 244 | struct vsc9953_dev_gmii_port_mode { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 245 | u32 clock_cfg; |
| 246 | u32 port_misc; |
| 247 | u32 reserved1; |
| 248 | u32 eee_cfg; |
| 249 | }; |
| 250 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 251 | struct vsc9953_dev_gmii_mac_cfg_status { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 252 | u32 mac_ena_cfg; |
| 253 | u32 mac_mode_cfg; |
| 254 | u32 mac_maxlen_cfg; |
| 255 | u32 mac_tags_cfg; |
| 256 | u32 mac_adv_chk_cfg; |
| 257 | u32 mac_ifg_cfg; |
| 258 | u32 mac_hdx_cfg; |
| 259 | u32 mac_fc_mac_low_cfg; |
| 260 | u32 mac_fc_mac_high_cfg; |
| 261 | u32 mac_sticky; |
| 262 | }; |
| 263 | |
| 264 | struct vsc9953_dev_gmii { |
| 265 | struct vsc9953_dev_gmii_port_mode port_mode; |
| 266 | struct vsc9953_dev_gmii_mac_cfg_status mac_cfg_status; |
| 267 | }; |
| 268 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 269 | /* END VSC9953 DEV_GMII structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 270 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 271 | /* VSC9953 QSYS structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 272 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 273 | struct vsc9953_qsys_hsch { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 274 | u32 cir_cfg; |
| 275 | u32 reserved1; |
| 276 | u32 se_cfg; |
| 277 | u32 se_dwrr_cfg[8]; |
| 278 | u32 cir_state; |
| 279 | u32 reserved2[20]; |
| 280 | }; |
| 281 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 282 | struct vsc9953_qsys_sys { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 283 | u32 port_mode[12]; |
| 284 | u32 switch_port_mode[11]; |
| 285 | u32 stat_cnt_cfg; |
| 286 | u32 eee_cfg[10]; |
| 287 | u32 eee_thrs; |
| 288 | u32 igr_no_sharing; |
| 289 | u32 egr_no_sharing; |
| 290 | u32 sw_status[11]; |
| 291 | u32 ext_cpu_cfg; |
| 292 | u32 cpu_group_map; |
| 293 | u32 reserved1[23]; |
| 294 | }; |
| 295 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 296 | struct vsc9953_qsys_qos_cfg { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 297 | u32 red_profile[16]; |
| 298 | u32 res_qos_mode; |
| 299 | }; |
| 300 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 301 | struct vsc9953_qsys_drop_cfg { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 302 | u32 egr_drop_mode; |
| 303 | }; |
| 304 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 305 | struct vsc9953_qsys_mmgt { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 306 | u32 eq_cntrl; |
| 307 | u32 reserved1; |
| 308 | }; |
| 309 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 310 | struct vsc9953_qsys_hsch_misc { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 311 | u32 hsch_misc_cfg; |
| 312 | u32 reserved1[546]; |
| 313 | }; |
| 314 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 315 | struct vsc9953_qsys_res_ctrl { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 316 | u32 res_cfg; |
| 317 | u32 res_stat; |
| 318 | |
| 319 | }; |
| 320 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 321 | struct vsc9953_qsys_reg { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 322 | struct vsc9953_qsys_hsch hsch[108]; |
| 323 | struct vsc9953_qsys_sys sys; |
| 324 | struct vsc9953_qsys_qos_cfg qos_cfg; |
| 325 | struct vsc9953_qsys_drop_cfg drop_cfg; |
| 326 | struct vsc9953_qsys_mmgt mmgt; |
| 327 | struct vsc9953_qsys_hsch_misc hsch_misc; |
| 328 | struct vsc9953_qsys_res_ctrl res_ctrl[1024]; |
| 329 | }; |
| 330 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 331 | /* END VSC9953 QSYS structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 332 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 333 | /* VSC9953 SYS structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 334 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 335 | struct vsc9953_sys_stat { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 336 | u32 rx_cntrs[64]; |
| 337 | u32 tx_cntrs[64]; |
| 338 | u32 drop_cntrs[64]; |
| 339 | u32 reserved1[6]; |
| 340 | }; |
| 341 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 342 | struct vsc9953_sys_sys { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 343 | u32 reset_cfg; |
| 344 | u32 reserved1; |
| 345 | u32 vlan_etype_cfg; |
| 346 | u32 port_mode[12]; |
| 347 | u32 front_port_mode[10]; |
| 348 | u32 frame_aging; |
| 349 | u32 stat_cfg; |
| 350 | u32 reserved2[50]; |
| 351 | }; |
| 352 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 353 | struct vsc9953_sys_pause_cfg { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 354 | u32 pause_cfg[11]; |
| 355 | u32 pause_tot_cfg; |
| 356 | u32 tail_drop_level[11]; |
| 357 | u32 tot_tail_drop_lvl; |
| 358 | u32 mac_fc_cfg[10]; |
| 359 | }; |
| 360 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 361 | struct vsc9953_sys_mmgt { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 362 | u16 free_cnt; |
| 363 | }; |
| 364 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 365 | struct vsc9953_system_reg { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 366 | struct vsc9953_sys_stat stat; |
| 367 | struct vsc9953_sys_sys sys; |
| 368 | struct vsc9953_sys_pause_cfg pause_cfg; |
| 369 | struct vsc9953_sys_mmgt mmgt; |
| 370 | }; |
| 371 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 372 | /* END VSC9953 SYS structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 373 | |
Codrin Ciubotariu | 9de0598 | 2015-07-24 16:55:26 +0300 | [diff] [blame^] | 374 | /* VSC9953 REW structure */ |
| 375 | |
| 376 | struct vsc9953_rew_port { |
| 377 | u32 port_vlan_cfg; |
| 378 | u32 port_tag_cfg; |
| 379 | u32 port_port_cfg; |
| 380 | u32 port_dscp_cfg; |
| 381 | u32 port_pcp_dei_qos_map_cfg[16]; |
| 382 | u32 reserved[12]; |
| 383 | }; |
| 384 | |
| 385 | struct vsc9953_rew_common { |
| 386 | u32 reserve[4]; |
| 387 | u32 dscp_remap_dp1_cfg[64]; |
| 388 | u32 dscp_remap_cfg[64]; |
| 389 | }; |
| 390 | |
| 391 | struct vsc9953_rew_reg { |
| 392 | struct vsc9953_rew_port port[12]; |
| 393 | struct vsc9953_rew_common common; |
| 394 | }; |
| 395 | |
| 396 | /* END VSC9953 REW structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 397 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 398 | /* VSC9953 DEVCPU_GCB structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 399 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 400 | struct vsc9953_chip_regs { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 401 | u32 chipd_id; |
| 402 | u32 gpr; |
| 403 | u32 soft_rst; |
| 404 | }; |
| 405 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 406 | struct vsc9953_gpio { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 407 | u32 gpio_out_set[10]; |
| 408 | u32 gpio_out_clr[10]; |
| 409 | u32 gpio_out[10]; |
| 410 | u32 gpio_in[10]; |
| 411 | }; |
| 412 | |
| 413 | struct vsc9953_mii_mng { |
| 414 | u32 miimstatus; |
| 415 | u32 reserved1; |
| 416 | u32 miimcmd; |
| 417 | u32 miimdata; |
| 418 | u32 miimcfg; |
| 419 | u32 miimscan_0; |
| 420 | u32 miimscan_1; |
| 421 | u32 miiscan_lst_rslts; |
| 422 | u32 miiscan_lst_rslts_valid; |
| 423 | }; |
| 424 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 425 | struct vsc9953_mii_read_scan { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 426 | u32 mii_scan_results_sticky[2]; |
| 427 | }; |
| 428 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 429 | struct vsc9953_devcpu_gcb { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 430 | struct vsc9953_chip_regs chip_regs; |
| 431 | struct vsc9953_gpio gpio; |
| 432 | struct vsc9953_mii_mng mii_mng[2]; |
| 433 | struct vsc9953_mii_read_scan mii_read_scan; |
| 434 | }; |
| 435 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 436 | /* END VSC9953 DEVCPU_GCB structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 437 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 438 | /* VSC9953 IS* structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 439 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 440 | struct vsc9953_vcap_core_cfg { |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 441 | u32 vcap_update_ctrl; |
| 442 | u32 vcap_mv_cfg; |
| 443 | }; |
| 444 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 445 | struct vsc9953_vcap { |
| 446 | struct vsc9953_vcap_core_cfg vcap_core_cfg; |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 447 | }; |
| 448 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 449 | /* END VSC9953 IS* structure */ |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 450 | |
| 451 | #define VSC9953_PORT_INFO_INITIALIZER(idx) \ |
| 452 | { \ |
| 453 | .enabled = 0, \ |
| 454 | .phyaddr = 0, \ |
| 455 | .index = idx, \ |
| 456 | .phy_regs = NULL, \ |
| 457 | .enet_if = PHY_INTERFACE_MODE_NONE, \ |
| 458 | .bus = NULL, \ |
| 459 | .phydev = NULL, \ |
| 460 | } |
| 461 | |
| 462 | /* Structure to describe a VSC9953 port */ |
| 463 | struct vsc9953_port_info { |
| 464 | u8 enabled; |
| 465 | u8 phyaddr; |
| 466 | int index; |
| 467 | void *phy_regs; |
| 468 | phy_interface_t enet_if; |
| 469 | struct mii_dev *bus; |
| 470 | struct phy_device *phydev; |
| 471 | }; |
| 472 | |
| 473 | /* Structure to describe a VSC9953 switch */ |
| 474 | struct vsc9953_info { |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 475 | struct vsc9953_port_info port[VSC9953_MAX_PORTS]; |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 476 | }; |
| 477 | |
| 478 | void vsc9953_init(bd_t *bis); |
| 479 | |
Codrin Ciubotariu | 3cc8cff | 2015-07-24 16:52:45 +0300 | [diff] [blame] | 480 | void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus); |
| 481 | void vsc9953_port_info_set_phy_address(int port_no, int address); |
| 482 | void vsc9953_port_enable(int port_no); |
| 483 | void vsc9953_port_disable(int port_no); |
| 484 | void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int); |
Codrin Ciubotariu | 6706b11 | 2015-01-12 14:08:33 +0200 | [diff] [blame] | 485 | |
| 486 | #endif /* _VSC9953_H_ */ |