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Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +01001/* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010021#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
22
23/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020024#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010025
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010026/*
27 * Serial console configuration
28 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020029#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010030
31/* Partitions */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010032
33/*
34 * Supported commands
35 */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010036#define CONFIG_CMD_REGINFO
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010037#define CONFIG_CMD_DIAG
38#define CONFIG_CMD_IRQ
39
40/*
41 * Autobooting
42 */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010043
44#define CONFIG_PREBOOT "echo;" \
45 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
46 "echo"
47
48#undef CONFIG_BOOTARGS
49
50#define CONFIG_EXTRA_ENV_SETTINGS \
51 "netdev=eth0\0" \
52 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
53 "nfsroot=${serverip}:${rootpath}\0" \
54 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
55 "addip=setenv bootargs ${bootargs} " \
56 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
57 ":${hostname}:${netdev}:off panic=1\0" \
58 "flash_nfs=run nfsargs addip;" \
59 "bootm ${kernel_addr}\0" \
60 "flash_self=run ramargs addip;" \
61 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
62 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
63 "scratch=40200000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000064 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010065 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
66 ""
67
68#define CONFIG_NETMASK 255.255.255.0
69#define CONFIG_GATEWAYIP 192.168.0.1
70#define CONFIG_SERVERIP 192.168.0.20
71#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +000072#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010073#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000074#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010075
76#define CONFIG_BOOTCOMMAND "run flash_self"
77
78/* Memory MAP
79 *
80 * Flash:
81 * |--------------------------------|
82 * | 0x00000000 Text & Data & BSS | *
83 * | for Monitor | *
84 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
85 * | UNUSED / Growth | * 256kb
86 * |--------------------------------|
87 * | 0x00050000 Base custom area | *
88 * | kernel / FS | *
89 * | | * Rest of Flash
90 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
91 * | END-0x00008000 Environment | * 32kb
92 * |--------------------------------|
93 *
94 *
95 *
96 * Main Memory:
97 * |--------------------------------|
98 * | UNUSED / scratch area |
99 * | |
100 * | |
101 * | |
102 * | |
103 * |--------------------------------|
104 * | Monitor .Text / .DATA / .BSS | * 256kb
105 * | Relocated! | *
106 * |--------------------------------|
107 * | Monitor Malloc | * 128kb (contains relocated environment)
108 * |--------------------------------|
109 * | Monitor/kernel STACK | * 64kb
110 * |--------------------------------|
111 * | Page Table for MMU systems | * 2k
112 * |--------------------------------|
113 * | PROM Code accessed from Linux | * 6kb-128b
114 * |--------------------------------|
115 * | Global data (avail from kernel)| * 128b
116 * |--------------------------------|
117 *
118 */
119
120/*
121 * Flash configuration (8,16 or 32 MB)
122 * TEXT base always at 0xFFF00000
123 * ENV_ADDR always at 0xFFF40000
124 * FLASH_BASE at 0xFC000000 for 64 MB
125 * 0xFE000000 for 32 MB
126 * 0xFF000000 for 16 MB
127 * 0xFF800000 for 8 MB
128 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_FLASH_BASE 0x00000000
130#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100131
132#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
134#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100135
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
137#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
138#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
139#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
140#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100141
142/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200144#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100146/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100148/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100150
151/*
152 * Environment settings
153 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200154/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200155#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200156/* CONFIG_ENV_ADDR need to be at sector boundary */
157#define CONFIG_ENV_SIZE 0x8000
158#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100160#define CONFIG_ENV_OVERWRITE 1
161
162/*
163 * Memory map
164 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_SDRAM_BASE 0x40000000
166#define CONFIG_SYS_SDRAM_SIZE 0x4000000
167#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100168
169/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#undef CONFIG_SYS_SRAM_BASE
171#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100172
173/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
175#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
176#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100177
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200178#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100179
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200180#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100182
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
184#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100185
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200186#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
188# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100189#endif
190
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
192#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
193#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100194
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
196#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100197
198/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
200#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100201
202/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200203#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100204
205/*
206 * Ethernet configuration
207 */
208#define CONFIG_GRETH 1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100209
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100210#define CONFIG_PHY_ADDR 0x00
211
212/*
213 * Miscellaneous configurable options
214 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100216#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200217#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100218#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100220#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
222#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
223#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100224
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200225#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
226#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100227
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100229
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100230/*
231 * Various low-level settings
232 */
233
234/*-----------------------------------------------------------------------
235 * USB stuff
236 *-----------------------------------------------------------------------
237 */
238#define CONFIG_USB_CLOCK 0x0001BBBB
239#define CONFIG_USB_CONFIG 0x00005000
240
241/***** Gaisler GRLIB IP-Cores Config ********/
242
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100244
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100245/* No SDRAM Configuration */
246#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
247
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100248/* See, GRLIB Docs (grip.pdf) on how to set up
249 * These the memory controller registers.
250 */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100251#define CONFIG_SYS_GRLIB_ESA_MCTRL1
252#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
253#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
254#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100255
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100256/* GRLIB FT-MCTRL configuration */
257#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
258#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
259#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
260#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100261
262/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100263#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100264
265/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100266#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100267
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100268/* default kernel command line */
269#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
270
271#endif /* __CONFIG_H */