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Wenyou Yang9e5935c2016-07-20 17:55:12 +08001config CLK_AT91
2 bool "AT91 clock drivers"
3 depends on CLK
4 help
5 This option is used to enable the AT91 clock driver.
6 The driver supports the AT91 clock generator, including
7 the oscillators and PLLs, such as main clock, slow clock,
8 PLLA, UTMI PLL. Clocks can also be a source clock of other
9 clocks a tree structure, such as master clock, usb device
10 clock, matrix clock and generic clock.
11 Devices can use a common clock API to request a particular
12 clock, enable it and get its rate.
13
14config AT91_UTMI
15 bool "Support UTMI PLL Clock"
16 depends on CLK_AT91
17 help
18 This option is used to enable the AT91 UTMI PLL clock
19 driver. It is the clock provider of USB, and UPLLCK is the
20 output of 480 MHz UTMI PLL, The souce clock of the UTMI
21 PLL is the main clock, so the main clock must select the
22 fast crystal oscillator to meet the frequency accuracy
23 required by USB.
24
25config AT91_H32MX
26 bool "Support H32MX 32-bit Matrix Clock"
27 depends on CLK_AT91
28 help
29 This option is used to enable the AT91 H32MX matrixes
30 clock driver. There are H64MX and H32MX matrixes clocks,
31 H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit
32 matrix clock is to be configured as MCK if MCK does not
33 exceed 83 MHz, else it is to be configured as MCK/2.
34
35config AT91_GENERIC_CLK
36 bool "Support Generic Clock"
37 depends on CLK_AT91
38 help
39 This option is used to enable the AT91 generic clock
40 driver. Some peripherals may need a second clock source
41 that may be different from the system clock. This second
42 clock is the generic clock (GCLK) and is managed by
43 the PMC via PMC_PCR register.