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wdenk6f213472003-08-29 22:00:43 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * High Level Configuration Options
31 * (easy to change)
32 */
33#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34#define CONFIG_OMAP 1 /* in a TI OMAP core */
35#define CONFIG_OMAP1610 1 /* which is in a 1610 */
36#define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
wdenka1f4a3d2004-07-11 22:19:26 +000037#define CONFIG_MACH_OMAP_INNOVATOR /* Select board mach-type */
wdenk6f213472003-08-29 22:00:43 +000038
39/* input clock of PLL */
40/* the OMAP1610 Innovator has 12MHz input clock */
41#define CONFIG_SYS_CLK_FREQ 12000000
42
43#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44
45#define CONFIG_MISC_INIT_R
46
47#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48#define CONFIG_SETUP_MEMORY_TAGS 1
49
50/*
51 * Size of malloc() pool
52 */
53#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
wdenka8c7c702003-12-06 19:49:23 +000054#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenk6f213472003-08-29 22:00:43 +000055
56/*
57 * Hardware drivers
58 */
59/*
60*/
61#define CONFIG_DRIVER_LAN91C96
62#define CONFIG_LAN91C96_BASE 0x04000300
63#define CONFIG_LAN91C96_EXT_PHY
64
65/*
66 * NS16550 Configuration
67 */
68#define CFG_NS16550
69#define CFG_NS16550_SERIAL
70#define CFG_NS16550_REG_SIZE (-4)
wdenka8c7c702003-12-06 19:49:23 +000071#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
72#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
wdenk6f213472003-08-29 22:00:43 +000073
74/*
75 * select serial console configuration
76 */
wdenka8c7c702003-12-06 19:49:23 +000077#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 Innovator */
wdenk6f213472003-08-29 22:00:43 +000078
79/* allow to overwrite serial and ethaddr */
80#define CONFIG_ENV_OVERWRITE
81#define CONFIG_CONS_INDEX 1
82#define CONFIG_BAUDRATE 115200
83#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
84
85#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
86#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
87
88/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
89#include <cmd_confdefs.h>
90#include <configs/omap1510.h>
91
92#define CONFIG_BOOTDELAY 3
93#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
94 root=/dev/nfs rw nfsroot=157.87.82.48:\
95 /home/a0875451/mwd/myfs/target ip=dhcp"
96#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
97#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
98#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
99#define CONFIG_BOOTFILE "uImage" /* file to load */
100
101#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
102#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
103#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
104#endif
105
106/*
107 * Miscellaneous configurable options
108 */
109#define CFG_LONGHELP /* undef to save memory */
110#define CFG_PROMPT "OMAP1610 Innovator # " /* Monitor Command Prompt */
111#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
112/* Print Buffer Size */
113#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
114#define CFG_MAXARGS 16 /* max number of command args */
115#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
116
117#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
118#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
119
120#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
121
122#define CFG_LOAD_ADDR 0x10000000 /* default load address */
123
wdenk42d1f032003-10-15 23:53:47 +0000124/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
wdenk6f213472003-08-29 22:00:43 +0000125 * DPLL1. This time is further subdivided by a local divisor.
126 */
127#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
128#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
129#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
130
131/*-----------------------------------------------------------------------
132 * Stack sizes
133 *
134 * The stack sizes are set up in start.S using the settings below
135 */
136#define CONFIG_STACKSIZE (128*1024) /* regular stack */
137#ifdef CONFIG_USE_IRQ
138#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
139#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
140#endif
141
142/*-----------------------------------------------------------------------
143 * Physical Memory Map
144 */
wdenk3ff02c22004-06-09 15:25:53 +0000145#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
146#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
wdenk6f213472003-08-29 22:00:43 +0000147#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
148
wdenk3ff02c22004-06-09 15:25:53 +0000149#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
150#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
wdenk6f213472003-08-29 22:00:43 +0000151
wdenk3ff02c22004-06-09 15:25:53 +0000152#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
wdenkca0e7742004-06-09 15:37:23 +0000153
wdenk3ff02c22004-06-09 15:25:53 +0000154#ifndef __ASSEMBLY__
155extern unsigned long omap_flash_base; /* set in flash__init */
156#endif
157#define CFG_FLASH_BASE omap_flash_base
158
159#elif defined(CONFIG_CS0_BOOT)
160
161#define CFG_FLASH_BASE PHYS_FLASH_1_BM0
162
163#else
164
165#define CFG_FLASH_BASE PHYS_FLASH_1_BM1
166
167#endif
wdenk6f213472003-08-29 22:00:43 +0000168
169/*-----------------------------------------------------------------------
170 * FLASH and environment organization
171 */
172#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
173#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
174#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
175/* addr of environment */
176#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
177
178/* timeout values are in ticks */
179#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
180#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
181
182#define CFG_ENV_IS_IN_FLASH 1
183#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
184#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
185
186#endif /* __CONFIG_H */