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wdenk324f6cf2002-10-07 21:13:39 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
wdenk228f29a2002-12-08 09:53:23 +000022 *
23 * Be sure to mark tests to be run before relocation as such with the
24 * CFG_POST_PREREL flag so that logging is done correctly if the
25 * logbuffer support is enabled.
wdenk324f6cf2002-10-07 21:13:39 +000026 */
27
28#include <common.h>
29
30#ifdef CONFIG_POST
31
32#include <post.h>
33
34extern int cache_post_test (int flags);
35extern int watchdog_post_test (int flags);
36extern int i2c_post_test (int flags);
37extern int rtc_post_test (int flags);
38extern int memory_post_test (int flags);
39extern int cpu_post_test (int flags);
Igor Lisitsina11e0692007-03-28 19:06:19 +040040extern int fpu_post_test (int flags);
wdenk324f6cf2002-10-07 21:13:39 +000041extern int uart_post_test (int flags);
42extern int ether_post_test (int flags);
43extern int spi_post_test (int flags);
44extern int usb_post_test (int flags);
45extern int spr_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000046extern int sysmon_post_test (int flags);
wdenk5a8c51c2004-04-15 21:16:42 +000047extern int dsp_post_test (int flags);
wdenk79fa88f2004-06-07 23:46:25 +000048extern int codec_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000049
50extern int sysmon_init_f (void);
51
52extern void sysmon_reloc (void);
53
wdenk324f6cf2002-10-07 21:13:39 +000054
55struct post_test post_list[] =
56{
57#if CONFIG_POST & CFG_POST_CACHE
58 {
wdenk8bde7f72003-06-27 21:31:46 +000059 "Cache test",
60 "cache",
61 "This test verifies the CPU cache operation.",
62 POST_RAM | POST_ALWAYS,
63 &cache_post_test,
64 NULL,
65 NULL,
wdenk228f29a2002-12-08 09:53:23 +000066 CFG_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000067 },
68#endif
69#if CONFIG_POST & CFG_POST_WATCHDOG
70 {
wdenk8bde7f72003-06-27 21:31:46 +000071 "Watchdog timer test",
72 "watchdog",
73 "This test checks the watchdog timer.",
wdenk8564acf2003-07-14 22:13:32 +000074 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
wdenk8bde7f72003-06-27 21:31:46 +000075 &watchdog_post_test,
76 NULL,
77 NULL,
wdenk228f29a2002-12-08 09:53:23 +000078 CFG_POST_WATCHDOG
wdenk324f6cf2002-10-07 21:13:39 +000079 },
80#endif
81#if CONFIG_POST & CFG_POST_I2C
82 {
wdenk8bde7f72003-06-27 21:31:46 +000083 "I2C test",
84 "i2c",
85 "This test verifies the I2C operation.",
86 POST_RAM | POST_ALWAYS,
87 &i2c_post_test,
88 NULL,
89 NULL,
wdenk228f29a2002-12-08 09:53:23 +000090 CFG_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +000091 },
92#endif
93#if CONFIG_POST & CFG_POST_RTC
94 {
wdenk8bde7f72003-06-27 21:31:46 +000095 "RTC test",
96 "rtc",
97 "This test verifies the RTC operation.",
wdenk8564acf2003-07-14 22:13:32 +000098 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +000099 &rtc_post_test,
100 NULL,
101 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000102 CFG_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000103 },
104#endif
105#if CONFIG_POST & CFG_POST_MEMORY
106 {
wdenk8bde7f72003-06-27 21:31:46 +0000107 "Memory test",
108 "memory",
109 "This test checks RAM.",
wdenk8564acf2003-07-14 22:13:32 +0000110 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
wdenk8bde7f72003-06-27 21:31:46 +0000111 &memory_post_test,
112 NULL,
113 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000114 CFG_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000115 },
116#endif
117#if CONFIG_POST & CFG_POST_CPU
118 {
wdenk8bde7f72003-06-27 21:31:46 +0000119 "CPU test",
120 "cpu",
121 "This test verifies the arithmetic logic unit of"
122 " CPU.",
123 POST_RAM | POST_ALWAYS,
124 &cpu_post_test,
125 NULL,
126 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000127 CFG_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000128 },
129#endif
Igor Lisitsina11e0692007-03-28 19:06:19 +0400130#if CONFIG_POST & CFG_POST_FPU
131 {
132 "FPU test",
133 "fpu",
134 "This test verifies the arithmetic logic unit of"
135 " FPU.",
136 POST_RAM | POST_ALWAYS,
137 &fpu_post_test,
138 NULL,
139 NULL,
140 CFG_POST_FPU
141 },
142#endif
wdenk324f6cf2002-10-07 21:13:39 +0000143#if CONFIG_POST & CFG_POST_UART
144 {
wdenk8bde7f72003-06-27 21:31:46 +0000145 "UART test",
146 "uart",
147 "This test verifies the UART operation.",
wdenk8564acf2003-07-14 22:13:32 +0000148 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000149 &uart_post_test,
150 NULL,
151 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000152 CFG_POST_UART
wdenk324f6cf2002-10-07 21:13:39 +0000153 },
154#endif
155#if CONFIG_POST & CFG_POST_ETHER
156 {
wdenk8bde7f72003-06-27 21:31:46 +0000157 "ETHERNET test",
158 "ethernet",
159 "This test verifies the ETHERNET operation.",
160 POST_RAM | POST_ALWAYS | POST_MANUAL,
161 &ether_post_test,
162 NULL,
163 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000164 CFG_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000165 },
166#endif
167#if CONFIG_POST & CFG_POST_SPI
168 {
wdenk8bde7f72003-06-27 21:31:46 +0000169 "SPI test",
170 "spi",
171 "This test verifies the SPI operation.",
172 POST_RAM | POST_ALWAYS | POST_MANUAL,
173 &spi_post_test,
174 NULL,
175 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000176 CFG_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000177 },
178#endif
179#if CONFIG_POST & CFG_POST_USB
180 {
wdenk8bde7f72003-06-27 21:31:46 +0000181 "USB test",
182 "usb",
183 "This test verifies the USB operation.",
184 POST_RAM | POST_ALWAYS | POST_MANUAL,
185 &usb_post_test,
186 NULL,
187 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000188 CFG_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000189 },
190#endif
191#if CONFIG_POST & CFG_POST_SPR
192 {
wdenk8bde7f72003-06-27 21:31:46 +0000193 "SPR test",
194 "spr",
195 "This test checks SPR contents.",
196 POST_ROM | POST_ALWAYS | POST_PREREL,
197 &spr_post_test,
198 NULL,
199 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000200 CFG_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000201 },
202#endif
wdenk4532cb62003-04-27 22:52:51 +0000203#if CONFIG_POST & CFG_POST_SYSMON
204 {
wdenk8bde7f72003-06-27 21:31:46 +0000205 "SYSMON test",
206 "sysmon",
207 "This test monitors system hardware.",
208 POST_RAM | POST_ALWAYS,
209 &sysmon_post_test,
210 &sysmon_init_f,
211 &sysmon_reloc,
wdenk4532cb62003-04-27 22:52:51 +0000212 CFG_POST_SYSMON
213 },
214#endif
wdenk5a8c51c2004-04-15 21:16:42 +0000215#if CONFIG_POST & CFG_POST_DSP
216 {
217 "DSP test",
218 "dsp",
219 "This test checks any connected DSP(s).",
220 POST_RAM | POST_MANUAL,
221 &dsp_post_test,
222 NULL,
223 NULL,
224 CFG_POST_DSP
225 },
226#endif
wdenk79fa88f2004-06-07 23:46:25 +0000227#if CONFIG_POST & CFG_POST_DSP
228 {
229 "CODEC test",
230 "codec",
231 "This test checks any connected codec(s).",
232 POST_RAM | POST_MANUAL,
233 &codec_post_test,
234 NULL,
235 NULL,
236 CFG_POST_CODEC
237 },
238#endif
wdenk324f6cf2002-10-07 21:13:39 +0000239};
240
241unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
242
243#endif /* CONFIG_POST */