blob: 7f493a8e8fd639041a2acf719c77abe8fb441038 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +09001menu "ARM architecture"
2 depends on ARM
3
4config SYS_ARCH
Masahiro Yamadadd840582014-07-30 14:08:14 +09005 default "arm"
6
Masahiro Yamada016a9542014-09-14 03:01:51 +09007config ARM64
8 bool
Masahiro Yamadabb6b1422016-07-25 19:56:03 +09009 select PHYS_64BIT
Tom Rini067716b2016-08-22 08:22:17 -040010 select SYS_CACHE_SHIFT_6
Masahiro Yamada016a9542014-09-14 03:01:51 +090011
Stephen Warren49e93872017-11-02 18:11:27 -060012if ARM64
13config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
Edgar E. Iglesias11f4fbf2020-09-09 19:07:24 +020018 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
Robert P. J. Daye852b302019-12-25 06:34:07 -050020 information that is embedded in the binary to support U-Boot
Stephen Warren49e93872017-11-02 18:11:27 -060021 relocating itself to the top-of-RAM later during execution.
Stephen Warrene6c90442017-12-19 18:30:36 -070022
Masahiro Yamada382de4a2019-06-26 13:51:46 +090023config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
Andre Przywaraf5cb6c32020-09-30 17:39:18 +010025 default n if ARCH_QEMU
Andre Przywara12650e42020-09-30 17:39:15 +010026 default y if POSITION_INDEPENDENT
Stephen Warrene6c90442017-12-19 18:30:36 -070027 help
28 U-Boot typically uses a hard-coded value for the stack pointer
Masahiro Yamada382de4a2019-06-26 13:51:46 +090029 before relocation. Enable this option to instead calculate the
Stephen Warrene6c90442017-12-19 18:30:36 -070030 initial SP at run-time. This is useful to avoid hard-coding addresses
Robert P. J. Daye852b302019-12-25 06:34:07 -050031 into U-Boot, so that it can be loaded and executed at arbitrary
Masahiro Yamada382de4a2019-06-26 13:51:46 +090032 addresses and thus avoid using arbitrary addresses at runtime.
33
34 If this option is enabled, the early stack pointer is set to
35 &_bss_start with a offset value added. The offset is specified by
36 SYS_INIT_SP_BSS_OFFSET.
37
38config SYS_INIT_SP_BSS_OFFSET
39 int "Early stack offset from the .bss base address"
40 depends on INIT_SP_RELATIVE
41 default 524288
42 help
43 This option's value is the offset added to &_bss_start in order to
Stephen Warrene6c90442017-12-19 18:30:36 -070044 calculate the stack pointer. This offset should be large enough so
45 that the early malloc region, global data (gd), and early stack usage
46 do not overlap any appended DTB.
Stephen Warren8163faf2018-01-03 14:31:51 -070047
48config LINUX_KERNEL_IMAGE_HEADER
49 bool
50 help
51 Place a Linux kernel image header at the start of the U-Boot binary.
52 The format of the header is described in the Linux kernel source at
53 Documentation/arm64/booting.txt. This feature is useful since the
54 image header reports the amount of memory (BSS and similar) that
55 U-Boot needs to use, but which isn't part of the binary.
56
57if LINUX_KERNEL_IMAGE_HEADER
58config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 hex
60 help
61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
Robert P. J. Daye852b302019-12-25 06:34:07 -050062 TEXT_OFFSET value written to the Linux kernel image header.
Stephen Warren8163faf2018-01-03 14:31:51 -070063endif
Stephen Warren49e93872017-11-02 18:11:27 -060064endif
65
Bharat Kumar Reddy Gooty0bc43562019-12-16 09:09:43 -080066config GIC_V3_ITS
67 bool "ARM GICV3 ITS"
Rayagonda Kokatanur2ae7adc2020-07-26 22:37:33 +053068 select REGMAP
69 select SYSCON
Wasim Khan504f8642021-03-08 16:48:14 +010070 select IRQ
Bharat Kumar Reddy Gooty0bc43562019-12-16 09:09:43 -080071 help
72 ARM GICV3 Interrupt translation service (ITS).
73 Basic support for programming locality specific peripheral
74 interrupts (LPI) configuration tables and enable LPI tables.
75 LPI configuration table can be used by u-boot or Linux.
76 ARM GICV3 has limitation, once the LPI table is enabled, LPI
77 configuration table can not be re-programmed, unless GICV3 reset.
78
Stephen Warren49e93872017-11-02 18:11:27 -060079config STATIC_RELA
80 bool
Andre Przywaraeabc0902020-09-30 17:39:13 +010081 default y if ARM64
Stephen Warren49e93872017-11-02 18:11:27 -060082
Lokesh Vutla37217f02016-03-24 16:02:00 +053083config DMA_ADDR_T_64BIT
84 bool
85 default y if ARM64
86
Georges Savoundararadj2e07c242014-10-28 23:16:09 +010087config HAS_VBAR
Tom Rinie009bfa2016-08-22 08:22:18 -040088 bool
Georges Savoundararadj2e07c242014-10-28 23:16:09 +010089
Albert ARIBAUD62e92072015-10-23 18:06:40 +020090config HAS_THUMB2
Tom Rinie009bfa2016-08-22 08:22:18 -040091 bool
Albert ARIBAUD62e92072015-10-23 18:06:40 +020092
Masami Hiramatsu7a672052021-06-04 18:43:55 +090093config GPIO_EXTRA_HEADER
94 bool
95
Phil Edworthy111a6af2017-06-01 07:33:28 +010096# Used for compatibility with asm files copied from the kernel
97config ARM_ASM_UNIFIED
98 bool
99 default y
100
101# Used for compatibility with asm files copied from the kernel
102config THUMB2_KERNEL
103 bool
104
Trevor Woernera0aba8a2019-05-03 09:40:59 -0400105config SYS_ICACHE_OFF
106 bool "Do not enable icache"
107 default n
108 help
109 Do not enable instruction cache in U-Boot.
110
Trevor Woerner10015022019-05-03 09:41:00 -0400111config SPL_SYS_ICACHE_OFF
112 bool "Do not enable icache in SPL"
113 depends on SPL
114 default SYS_ICACHE_OFF
115 help
116 Do not enable instruction cache in SPL.
117
Trevor Woernera0aba8a2019-05-03 09:40:59 -0400118config SYS_DCACHE_OFF
119 bool "Do not enable dcache"
120 default n
121 help
122 Do not enable data cache in U-Boot.
123
Trevor Woerner10015022019-05-03 09:41:00 -0400124config SPL_SYS_DCACHE_OFF
125 bool "Do not enable dcache in SPL"
126 depends on SPL
127 default SYS_DCACHE_OFF
128 help
129 Do not enable data cache in SPL.
130
Lokesh Vutlaf4bcd762018-04-26 18:21:28 +0530131config SYS_ARM_CACHE_CP15
132 bool "CP15 based cache enabling support"
133 help
134 Select this if your processor suports enabling caches by using
135 CP15 registers.
136
Lokesh Vutla7240b802018-04-26 18:21:27 +0530137config SYS_ARM_MMU
138 bool "MMU-based Paged Memory Management Support"
Lokesh Vutlaf4bcd762018-04-26 18:21:28 +0530139 select SYS_ARM_CACHE_CP15
Lokesh Vutla7240b802018-04-26 18:21:27 +0530140 help
141 Select if you want MMU-based virtualised addressing space
Robert P. J. Daye852b302019-12-25 06:34:07 -0500142 support via paged memory management.
Lokesh Vutla7240b802018-04-26 18:21:27 +0530143
Lokesh Vutlaf2ef2042018-04-26 18:21:30 +0530144config SYS_ARM_MPU
145 bool 'Use the ARM v7 PMSA Compliant MPU'
146 help
147 Some ARM systems without an MMU have instead a Memory Protection
148 Unit (MPU) that defines the type and permissions for regions of
149 memory.
150 If your CPU has an MPU then you should choose 'y' here unless you
151 know that you do not want to use the MPU.
152
Tom Rini8dda2e22017-03-07 07:13:42 -0500153# If set, the workarounds for these ARM errata are applied early during U-Boot
154# startup. Note that in general these options force the workarounds to be
155# applied; no CPU-type/version detection exists, unlike the similar options in
156# the Linux kernel. Do not set these options unless they apply! Also note that
Robert P. J. Daye852b302019-12-25 06:34:07 -0500157# the following can be machine-specific errata. These do have ability to
158# provide rudimentary version and machine-specific checks, but expect no
Tom Rini8dda2e22017-03-07 07:13:42 -0500159# product checks:
160# CONFIG_ARM_ERRATA_430973
161# CONFIG_ARM_ERRATA_454179
162# CONFIG_ARM_ERRATA_621766
163# CONFIG_ARM_ERRATA_798870
164# CONFIG_ARM_ERRATA_801819
Nishanth Menon7b37a9c2018-06-12 15:24:08 -0500165# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
Nishanth Menonc2ca3fd2018-06-12 15:24:09 -0500166# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
Nishanth Menon7b37a9c2018-06-12 15:24:08 -0500167
Tom Rini8dda2e22017-03-07 07:13:42 -0500168config ARM_ERRATA_430973
169 bool
170
171config ARM_ERRATA_454179
172 bool
173
174config ARM_ERRATA_621766
175 bool
176
177config ARM_ERRATA_716044
178 bool
179
Siarhei Siamashka19a75b82017-03-06 03:16:53 +0200180config ARM_ERRATA_725233
181 bool
182
Tom Rini8dda2e22017-03-07 07:13:42 -0500183config ARM_ERRATA_742230
184 bool
185
186config ARM_ERRATA_743622
187 bool
188
189config ARM_ERRATA_751472
190 bool
191
192config ARM_ERRATA_761320
193 bool
194
195config ARM_ERRATA_773022
196 bool
197
198config ARM_ERRATA_774769
199 bool
200
201config ARM_ERRATA_794072
202 bool
203
204config ARM_ERRATA_798870
205 bool
206
207config ARM_ERRATA_801819
208 bool
209
210config ARM_ERRATA_826974
211 bool
212
213config ARM_ERRATA_828024
214 bool
215
216config ARM_ERRATA_829520
217 bool
218
219config ARM_ERRATA_833069
220 bool
221
222config ARM_ERRATA_833471
223 bool
224
Peng Fan11d94312017-08-08 13:34:52 +0800225config ARM_ERRATA_845369
Michal Simek6e7bdde2018-07-23 15:55:12 +0200226 bool
Peng Fan11d94312017-08-08 13:34:52 +0800227
Nisal Menuka87763502017-04-26 16:18:01 -0500228config ARM_ERRATA_852421
229 bool
230
231config ARM_ERRATA_852423
232 bool
233
Alison Wangab0ab542017-12-28 13:00:55 +0800234config ARM_ERRATA_855873
235 bool
236
Nishanth Menon7b37a9c2018-06-12 15:24:08 -0500237config ARM_CORTEX_A8_CVE_2017_5715
238 bool
239
Nishanth Menonc2ca3fd2018-06-12 15:24:09 -0500240config ARM_CORTEX_A15_CVE_2017_5715
241 bool
242
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100243config CPU_ARM720T
Tom Rinie009bfa2016-08-22 08:22:18 -0400244 bool
Tom Rini067716b2016-08-22 08:22:17 -0400245 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530246 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100247
248config CPU_ARM920T
Tom Rinie009bfa2016-08-22 08:22:18 -0400249 bool
Tom Rini067716b2016-08-22 08:22:17 -0400250 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530251 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100252
253config CPU_ARM926EJS
Tom Rinie009bfa2016-08-22 08:22:18 -0400254 bool
Tom Rini067716b2016-08-22 08:22:17 -0400255 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530256 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100257
258config CPU_ARM946ES
Tom Rinie009bfa2016-08-22 08:22:18 -0400259 bool
Tom Rini067716b2016-08-22 08:22:17 -0400260 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530261 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100262
263config CPU_ARM1136
Tom Rinie009bfa2016-08-22 08:22:18 -0400264 bool
Tom Rini067716b2016-08-22 08:22:17 -0400265 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530266 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100267
268config CPU_ARM1176
Tom Rinie009bfa2016-08-22 08:22:18 -0400269 bool
270 select HAS_VBAR
Tom Rini067716b2016-08-22 08:22:17 -0400271 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530272 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100273
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530274config CPU_V7A
Tom Rinie009bfa2016-08-22 08:22:18 -0400275 bool
Tom Rinie009bfa2016-08-22 08:22:18 -0400276 select HAS_THUMB2
Michal Simek5ed063d2018-07-23 15:55:13 +0200277 select HAS_VBAR
Tom Rini067716b2016-08-22 08:22:17 -0400278 select SYS_CACHE_SHIFT_6
Lokesh Vutla7240b802018-04-26 18:21:27 +0530279 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100280
rev13@wp.pl12d8a722015-03-01 12:44:39 +0100281config CPU_V7M
282 bool
Tom Rinie009bfa2016-08-22 08:22:18 -0400283 select HAS_THUMB2
Lokesh Vutlaf2ef2042018-04-26 18:21:30 +0530284 select SYS_ARM_MPU
Michal Simek5ed063d2018-07-23 15:55:13 +0200285 select SYS_CACHE_SHIFT_5
Tom Riniea37f0b2018-05-07 20:46:52 -0400286 select SYS_THUMB_BUILD
Michal Simek5ed063d2018-07-23 15:55:13 +0200287 select THUMB2_KERNEL
rev13@wp.pl12d8a722015-03-01 12:44:39 +0100288
Michal Simek4bbd6b12018-04-26 18:21:29 +0530289config CPU_V7R
290 bool
291 select HAS_THUMB2
Lokesh Vutlaf2ef2042018-04-26 18:21:30 +0530292 select SYS_ARM_CACHE_CP15
Michal Simek5ed063d2018-07-23 15:55:13 +0200293 select SYS_ARM_MPU
294 select SYS_CACHE_SHIFT_6
Michal Simek4bbd6b12018-04-26 18:21:29 +0530295
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100296config CPU_PXA
Tom Rinie009bfa2016-08-22 08:22:18 -0400297 bool
Tom Rini067716b2016-08-22 08:22:17 -0400298 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530299 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100300
301config CPU_SA1100
Tom Rinie009bfa2016-08-22 08:22:18 -0400302 bool
Tom Rini067716b2016-08-22 08:22:17 -0400303 select SYS_CACHE_SHIFT_5
Lokesh Vutla7240b802018-04-26 18:21:27 +0530304 imply SYS_ARM_MMU
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100305
306config SYS_CPU
Tom Rinie009bfa2016-08-22 08:22:18 -0400307 default "arm720t" if CPU_ARM720T
308 default "arm920t" if CPU_ARM920T
309 default "arm926ejs" if CPU_ARM926EJS
310 default "arm946es" if CPU_ARM946ES
311 default "arm1136" if CPU_ARM1136
312 default "arm1176" if CPU_ARM1176
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530313 default "armv7" if CPU_V7A
Michal Simek4bbd6b12018-04-26 18:21:29 +0530314 default "armv7" if CPU_V7R
Tom Rinie009bfa2016-08-22 08:22:18 -0400315 default "armv7m" if CPU_V7M
316 default "pxa" if CPU_PXA
317 default "sa1100" if CPU_SA1100
Masahiro Yamada01541ee2014-11-06 11:39:27 +0900318 default "armv8" if ARM64
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100319
Marek Vasut66020a62016-05-26 18:01:36 +0200320config SYS_ARM_ARCH
321 int
322 default 4 if CPU_ARM720T
323 default 4 if CPU_ARM920T
324 default 5 if CPU_ARM926EJS
325 default 5 if CPU_ARM946ES
326 default 6 if CPU_ARM1136
327 default 6 if CPU_ARM1176
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530328 default 7 if CPU_V7A
Marek Vasut66020a62016-05-26 18:01:36 +0200329 default 7 if CPU_V7M
Michal Simek4bbd6b12018-04-26 18:21:29 +0530330 default 7 if CPU_V7R
Marek Vasut66020a62016-05-26 18:01:36 +0200331 default 5 if CPU_PXA
332 default 4 if CPU_SA1100
333 default 8 if ARM64
334
Tom Rini067716b2016-08-22 08:22:17 -0400335config SYS_CACHE_SHIFT_5
336 bool
337
338config SYS_CACHE_SHIFT_6
339 bool
340
341config SYS_CACHE_SHIFT_7
342 bool
343
344config SYS_CACHELINE_SIZE
345 int
346 default 128 if SYS_CACHE_SHIFT_7
347 default 64 if SYS_CACHE_SHIFT_6
348 default 32 if SYS_CACHE_SHIFT_5
349
Patrick Delaunayf8dc7f22020-04-10 16:02:02 +0200350choice
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
Tom Rinida426462021-02-20 20:05:57 -0500353 CPU_PXA || RZA1
Patrick Delaunayf8dc7f22020-04-10 16:02:02 +0200354 default SYS_ARM_CACHE_WRITEBACK
355
356config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
358 help
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
361 cleaned.
362
363config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
365 help
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
368
369config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
371 help
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
375 write is performed.
376endchoice
377
Adam Ford1bf33012019-08-14 08:29:25 -0500378config ARCH_CPU_INIT
379 bool "Enable ARCH_CPU_INIT"
380 help
Robert P. J. Daye852b302019-12-25 06:34:07 -0500381 Some architectures require a call to arch_cpu_init().
Adam Ford1bf33012019-08-14 08:29:25 -0500382 Say Y here to enable it
383
Andre Przywara7842b6a2018-04-12 04:24:46 +0300384config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530386 depends on CPU_V7A || ARM64
Andre Przywara7842b6a2018-04-12 04:24:46 +0300387 default y if ARM64
388 help
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500391 It is mandatory for ARMv8 implementation and widely available
Andre Przywara7842b6a2018-04-12 04:24:46 +0300392 on ARMv7 systems.
393
Masahiro Yamadac54bcf62017-04-14 11:10:23 +0900394config ARM_SMCCC
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530396 depends on CPU_V7A || ARM64
Masahiro Yamada573a3812017-04-14 11:10:24 +0900397 select ARM_PSCI_FW
Masahiro Yamadac54bcf62017-04-14 11:10:23 +0900398 help
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
402
Linus Walleijf91afc42015-01-23 11:50:53 +0100403config SEMIHOSTING
404 bool "support boot from semihosting"
405 help
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
409
Tom Rini3a649402017-03-18 09:01:44 -0400410config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
412 depends on !ARM64
413 help
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
418
419config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
Adam Ford05705562019-08-13 14:32:30 -0500422 depends on !ARM64 && SPL
Tom Rini3a649402017-03-18 09:01:44 -0400423 help
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
428
Kever Yang1e32c512019-04-02 20:41:20 +0800429config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
433 help
Robert P. J. Daye852b302019-12-25 06:34:07 -0500434 Use this flag to build TPL using the Thumb instruction set for
Kever Yang1e32c512019-04-02 20:41:20 +0800435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
438
439
Peng Fanf3e9bec2015-08-19 15:48:57 +0800440config SYS_L2CACHE_OFF
441 bool "L2cache off"
442 help
Robert P. J. Daye852b302019-12-25 06:34:07 -0500443 If SoC does not support L2CACHE or one does not want to enable
Peng Fanf3e9bec2015-08-19 15:48:57 +0800444 L2CACHE, choose this option.
445
Andre Przywaracdaa6332016-05-31 10:45:06 -0700446config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
448 help
449 If the SoC's BOOT0 requires a header area filled with (magic)
Simon Goldschmidt7d531e82018-02-13 13:18:00 +0100450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
Andre Przywaracdaa6332016-05-31 10:45:06 -0700452
Andre Przywara85db5832017-02-16 01:20:21 +0000453config ARM_CORTEX_CPU_IS_UP
454 bool
455 default n
456
Fabio Estevambe725912016-12-15 19:30:40 -0200457config USE_ARCH_MEMCPY
458 bool "Use an assembly optimized implementation of memcpy"
Tom Rini40d55342017-01-12 13:16:02 -0500459 default y
460 depends on !ARM64
461 help
462 Enable the generation of an optimized version of memcpy.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500463 Such an implementation may be faster under some conditions
Tom Rini40d55342017-01-12 13:16:02 -0500464 but may increase the binary size.
465
466config SPL_USE_ARCH_MEMCPY
Andy Yanf8136e62017-06-28 16:27:37 +0800467 bool "Use an assembly optimized implementation of memcpy for SPL"
Tom Rini40d55342017-01-12 13:16:02 -0500468 default y if USE_ARCH_MEMCPY
Adam Ford05705562019-08-13 14:32:30 -0500469 depends on !ARM64 && SPL
Fabio Estevambe725912016-12-15 19:30:40 -0200470 help
471 Enable the generation of an optimized version of memcpy.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500472 Such an implementation may be faster under some conditions
Fabio Estevambe725912016-12-15 19:30:40 -0200473 but may increase the binary size.
474
Kever Yang1e32c512019-04-02 20:41:20 +0800475config TPL_USE_ARCH_MEMCPY
476 bool "Use an assembly optimized implementation of memcpy for TPL"
477 default y if USE_ARCH_MEMCPY
Adam Ford05705562019-08-13 14:32:30 -0500478 depends on !ARM64 && TPL
Kever Yang1e32c512019-04-02 20:41:20 +0800479 help
480 Enable the generation of an optimized version of memcpy.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500481 Such an implementation may be faster under some conditions
Kever Yang1e32c512019-04-02 20:41:20 +0800482 but may increase the binary size.
483
Fabio Estevambe725912016-12-15 19:30:40 -0200484config USE_ARCH_MEMSET
485 bool "Use an assembly optimized implementation of memset"
Tom Rini40d55342017-01-12 13:16:02 -0500486 default y
487 depends on !ARM64
488 help
489 Enable the generation of an optimized version of memset.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500490 Such an implementation may be faster under some conditions
Tom Rini40d55342017-01-12 13:16:02 -0500491 but may increase the binary size.
492
493config SPL_USE_ARCH_MEMSET
Andy Yanf8136e62017-06-28 16:27:37 +0800494 bool "Use an assembly optimized implementation of memset for SPL"
Tom Rini40d55342017-01-12 13:16:02 -0500495 default y if USE_ARCH_MEMSET
Adam Ford05705562019-08-13 14:32:30 -0500496 depends on !ARM64 && SPL
Fabio Estevambe725912016-12-15 19:30:40 -0200497 help
498 Enable the generation of an optimized version of memset.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500499 Such an implementation may be faster under some conditions
Fabio Estevambe725912016-12-15 19:30:40 -0200500 but may increase the binary size.
501
Kever Yang1e32c512019-04-02 20:41:20 +0800502config TPL_USE_ARCH_MEMSET
503 bool "Use an assembly optimized implementation of memset for TPL"
504 default y if USE_ARCH_MEMSET
Adam Ford05705562019-08-13 14:32:30 -0500505 depends on !ARM64 && TPL
Kever Yang1e32c512019-04-02 20:41:20 +0800506 help
507 Enable the generation of an optimized version of memset.
Robert P. J. Daye852b302019-12-25 06:34:07 -0500508 Such an implementation may be faster under some conditions
Kever Yang1e32c512019-04-02 20:41:20 +0800509 but may increase the binary size.
510
Alison Wangec6617c2016-11-10 10:49:03 +0800511config ARM64_SUPPORT_AARCH32
512 bool "ARM64 system support AArch32 execution state"
Adam Ford05705562019-08-13 14:32:30 -0500513 depends on ARM64
514 default y if !TARGET_THUNDERX_88XX
Alison Wangec6617c2016-11-10 10:49:03 +0800515 help
516 This ARM64 system supports AArch32 execution state.
517
Masahiro Yamadadd840582014-07-30 14:08:14 +0900518choice
519 prompt "Target select"
Simon Glassb928e652015-08-30 19:19:30 -0600520 default TARGET_HIKEY
Masahiro Yamadadd840582014-07-30 14:08:14 +0900521
Masahiro Yamada4614b892015-02-20 17:04:01 +0900522config ARCH_AT91
523 bool "Atmel AT91"
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900524 select GPIO_EXTRA_HEADER
Tom Rinif58e9462018-05-10 07:15:52 -0400525 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
Gregory CLEMENTc7c120c2020-06-05 10:43:36 +0200526 select SPL_SEPARATE_BSS if SPL
Masahiro Yamadadd840582014-07-30 14:08:14 +0900527
Masahiro Yamadadd840582014-07-30 14:08:14 +0900528config TARGET_ASPENITE
529 bool "Support aspenite"
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100530 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900531 select GPIO_EXTRA_HEADER
Masahiro Yamadadd840582014-07-30 14:08:14 +0900532
Masahiro Yamada3491ba62014-08-31 07:11:01 +0900533config ARCH_DAVINCI
534 bool "TI DaVinci"
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100535 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900536 select GPIO_EXTRA_HEADER
Lukasz Majewski56c40462020-06-04 23:11:53 +0800537 select SPL_DM_SPI if SPL
Simon Glass15dc63d2017-08-04 16:34:43 -0600538 imply CMD_SAVES
Masahiro Yamada3491ba62014-08-31 07:11:01 +0900539 help
540 Support for TI's DaVinci platform.
Masahiro Yamadadd840582014-07-30 14:08:14 +0900541
Trevor Woernerbb0fb4c2020-05-06 08:02:40 -0400542config ARCH_KIRKWOOD
Masahiro Yamada47539e22014-08-31 07:10:59 +0900543 bool "Marvell Kirkwood"
Simon Glass45856012017-01-23 13:31:21 -0700544 select ARCH_MISC_INIT
Michal Simek5ed063d2018-07-23 15:55:13 +0200545 select BOARD_EARLY_INIT_F
546 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900547 select GPIO_EXTRA_HEADER
Masahiro Yamadadd840582014-07-30 14:08:14 +0900548
Stefan Roesec3d89142015-08-25 13:18:38 +0200549config ARCH_MVEBU
Stefan Roese21b29fc2016-05-25 08:13:45 +0200550 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
Stefan Roese9cffb232015-09-01 11:27:52 +0200551 select DM
Stefan Roesee3b9c982015-11-19 07:46:15 +0100552 select DM_ETH
Stefan Roese1d51ea12015-09-02 08:41:41 +0200553 select DM_SERIAL
Stefan Roese09a54c02015-11-20 13:51:57 +0100554 select DM_SPI
555 select DM_SPI_FLASH
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900556 select GPIO_EXTRA_HEADER
Lukasz Majewski56c40462020-06-04 23:11:53 +0800557 select SPL_DM_SPI if SPL
558 select SPL_DM_SPI_FLASH if SPL
Michal Simek5ed063d2018-07-23 15:55:13 +0200559 select OF_CONTROL
560 select OF_SEPARATE
Adam Fordf1b1f772018-04-15 13:51:26 -0400561 select SPI
Michal Simek08a00cb2018-07-23 15:55:14 +0200562 imply CMD_DM
Stefan Roesea4884832014-10-22 12:13:19 +0200563
Trevor Woernerb16a3312020-05-06 08:02:38 -0400564config ARCH_ORION5X
Masahiro Yamada22f2be72014-08-31 07:11:06 +0900565 bool "Marvell Orion"
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100566 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900567 select GPIO_EXTRA_HEADER
Masahiro Yamadadd840582014-07-30 14:08:14 +0900568
Vikas Manocha9fa32b12014-11-18 10:42:22 -0800569config TARGET_STV0991
570 bool "Support stv0991"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530571 select CPU_V7A
Masahiro Yamadacac0ca72015-03-31 12:48:01 +0900572 select DM
573 select DM_SERIAL
Vikas Manochae67abca2015-07-02 18:29:41 -0700574 select DM_SPI
575 select DM_SPI_FLASH
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900576 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +0200577 select PL01X_SERIAL
Adam Fordf1b1f772018-04-15 13:51:26 -0400578 select SPI
Vikas Manochae67abca2015-07-02 18:29:41 -0700579 select SPI_FLASH
Michal Simek08a00cb2018-07-23 15:55:14 +0200580 imply CMD_DM
Vikas Manocha9fa32b12014-11-18 10:42:22 -0800581
Masahiro Yamadadd840582014-07-30 14:08:14 +0900582config TARGET_FLEA3
583 bool "Support flea3"
Georges Savoundararadj2e07c242014-10-28 23:16:09 +0100584 select CPU_ARM1136
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900585 select GPIO_EXTRA_HEADER
Masahiro Yamadadd840582014-07-30 14:08:14 +0900586
Masahiro Yamadaddf6bd42015-03-19 19:42:56 +0900587config ARCH_BCM283X
588 bool "Broadcom BCM283X family"
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900589 select DM
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900590 select DM_GPIO
Michal Simek5ed063d2018-07-23 15:55:13 +0200591 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900592 select GPIO_EXTRA_HEADER
Fabian Vogt76709092016-09-26 14:26:51 +0200593 select OF_CONTROL
Alexander Grafcf2c7782018-01-25 12:05:52 +0100594 select PL01X_SERIAL
Alexander Grafae5326a2018-01-29 13:57:20 +0100595 select SERIAL_SEARCH_ALL
Michal Simek08a00cb2018-07-23 15:55:14 +0200596 imply CMD_DM
Tom Rini91d27a12017-06-02 11:03:50 -0400597 imply FAT_WRITE
Stephen Warren46414292015-02-16 12:16:15 -0700598
Philippe Reynesea1a7de2019-01-31 18:57:35 +0100599config ARCH_BCM63158
600 bool "Broadcom BCM63158 family"
601 select DM
602 select OF_CONTROL
603 imply CMD_DM
604
Philippe Reynes6454e952020-01-07 20:14:10 +0100605config ARCH_BCM68360
606 bool "Broadcom BCM68360 family"
607 select DM
608 select OF_CONTROL
609 imply CMD_DM
610
Philippe Reynes40b59b02018-10-11 18:31:58 +0200611config ARCH_BCM6858
612 bool "Broadcom BCM6858 family"
613 select DM
614 select OF_CONTROL
615 imply CMD_DM
616
Thomas Fitzsimmons894c3ad2018-06-08 17:59:45 -0400617config ARCH_BCMSTB
618 bool "Broadcom BCM7XXX family"
619 select CPU_V7A
620 select DM
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900621 select GPIO_EXTRA_HEADER
Thomas Fitzsimmons894c3ad2018-06-08 17:59:45 -0400622 select OF_CONTROL
623 select OF_PRIOR_STAGE
Michal Simek08a00cb2018-07-23 15:55:14 +0200624 imply CMD_DM
Thomas Fitzsimmons894c3ad2018-06-08 17:59:45 -0400625 help
626 This enables support for Broadcom ARM-based set-top box
627 chipsets, including the 7445 family of chips.
628
Steve Raeabb16782014-11-11 11:32:18 -0800629config TARGET_BCMCYGNUS
630 bool "Support bcmcygnus"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530631 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900632 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +0200633 imply BCM_SF2_ETH
634 imply BCM_SF2_ETH_GMAC
Simon Glass551c3932017-05-17 03:25:25 -0600635 imply CMD_HASH
Michal Simek5ed063d2018-07-23 15:55:13 +0200636 imply CRC32_VERIFY
Tom Rini91d27a12017-06-02 11:03:50 -0400637 imply FAT_WRITE
Daniel Thompson221a9492017-05-19 17:26:58 +0100638 imply HASH_VERIFY
Suji Velupillaic89782d2017-07-10 14:05:41 -0700639 imply NETDEVICES
Steve Rae9dec5272014-08-11 13:58:26 -0700640
Jon Mason274bced2017-03-17 12:12:14 -0400641config TARGET_BCMNS2
642 bool "Support Broadcom Northstar2"
643 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900644 select GPIO_EXTRA_HEADER
Jon Mason274bced2017-03-17 12:12:14 -0400645 help
646 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
647 ARMv8 Cortex-A57 processors targeting a broad range of networking
Robert P. J. Daye852b302019-12-25 06:34:07 -0500648 applications.
Jon Mason274bced2017-03-17 12:12:14 -0400649
Rayagonda Kokatanur291635a2020-07-15 22:48:55 +0530650config TARGET_BCMNS3
651 bool "Support Broadcom NS3"
652 select ARM64
653 select BOARD_LATE_INIT
654 help
655 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
656 ARMv8 Cortex-A72 processors targeting a broad range of networking
657 applications.
658
Masahiro Yamada72df68c2014-08-31 07:11:00 +0900659config ARCH_EXYNOS
660 bool "Samsung EXYNOS"
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900661 select DM
Michal Simek5ed063d2018-07-23 15:55:13 +0200662 select DM_GPIO
Simon Glassfc47cf92016-11-23 06:34:40 -0700663 select DM_I2C
Michal Simek5ed063d2018-07-23 15:55:13 +0200664 select DM_KEYBOARD
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900665 select DM_SERIAL
666 select DM_SPI
Michal Simek5ed063d2018-07-23 15:55:13 +0200667 select DM_SPI_FLASH
Adam Fordf1b1f772018-04-15 13:51:26 -0400668 select SPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900669 select GPIO_EXTRA_HEADER
Guillaume GARDETc96d9032018-11-20 14:15:13 +0100670 imply SYS_THUMB_BUILD
Michal Simek08a00cb2018-07-23 15:55:14 +0200671 imply CMD_DM
Tom Rini91d27a12017-06-02 11:03:50 -0400672 imply FAT_WRITE
Masahiro Yamadadd840582014-07-30 14:08:14 +0900673
Simon Glass311757b2014-10-07 22:01:50 -0600674config ARCH_S5PC1XX
675 bool "Samsung S5PC1XX"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530676 select CPU_V7A
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900677 select DM
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900678 select DM_GPIO
Simon Glass08848e92016-11-23 06:34:41 -0700679 select DM_I2C
Michal Simek5ed063d2018-07-23 15:55:13 +0200680 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900681 select GPIO_EXTRA_HEADER
Michal Simek08a00cb2018-07-23 15:55:14 +0200682 imply CMD_DM
Simon Glass311757b2014-10-07 22:01:50 -0600683
Masahiro Yamadaef2b6942014-08-31 07:11:07 +0900684config ARCH_HIGHBANK
685 bool "Calxeda Highbank"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530686 select CPU_V7A
Andre Przywara109552d2021-04-12 01:04:51 +0100687 select PL01X_SERIAL
688 select DM
689 select DM_SERIAL
690 select OF_CONTROL
691 select OF_BOARD
692 select CLK
693 select CLK_CCF
694 select AHCI
Andre Przywaradebb07b2021-04-12 01:04:52 +0100695 select DM_ETH
Andre Przywara1238d012021-04-12 01:04:54 +0100696 select PHYS_64BIT
Masahiro Yamadadd840582014-07-30 14:08:14 +0900697
Masahiro Yamada5cbbd9b2015-04-21 21:59:36 +0900698config ARCH_INTEGRATOR
699 bool "ARM Ltd. Integrator family"
Linus Walleij3f394e72015-07-27 11:22:48 +0200700 select DM
701 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900702 select GPIO_EXTRA_HEADER
Alexander Grafcf2c7782018-01-25 12:05:52 +0100703 select PL01X_SERIAL
Michal Simek08a00cb2018-07-23 15:55:14 +0200704 imply CMD_DM
Masahiro Yamada5cbbd9b2015-04-21 21:59:36 +0900705
Robert Markoe479a7d2020-07-06 10:37:54 +0200706config ARCH_IPQ40XX
707 bool "Qualcomm IPQ40xx SoCs"
708 select CPU_V7A
709 select DM
710 select DM_GPIO
711 select DM_SERIAL
Robert Marko496a3aa2020-09-10 16:00:03 +0200712 select DM_RESET
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900713 select GPIO_EXTRA_HEADER
Robert Marko6ef099b2020-09-10 16:00:01 +0200714 select MSM_SMEM
Robert Markoe479a7d2020-07-06 10:37:54 +0200715 select PINCTRL
716 select CLK
Robert Marko6ef099b2020-09-10 16:00:01 +0200717 select SMEM
Robert Markoe479a7d2020-07-06 10:37:54 +0200718 select OF_CONTROL
719 imply CMD_DM
720
Masahiro Yamadac338f092014-08-31 07:11:05 +0900721config ARCH_KEYSTONE
722 bool "TI Keystone"
Michal Simek5ed063d2018-07-23 15:55:13 +0200723 select CMD_POWEROFF
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530724 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900725 select GPIO_EXTRA_HEADER
Masahiro Yamada02627352014-10-20 17:45:56 +0900726 select SUPPORT_SPL
Andre Przywara7842b6a2018-04-12 04:24:46 +0300727 select SYS_ARCH_TIMER
Michal Simek5ed063d2018-07-23 15:55:13 +0200728 select SYS_THUMB_BUILD
Tom Rinid56b4b12017-07-22 18:36:16 -0400729 imply CMD_MTDPARTS
Simon Glass15dc63d2017-08-04 16:34:43 -0600730 imply CMD_SAVES
Michal Simek5ed063d2018-07-23 15:55:13 +0200731 imply FIT
Masahiro Yamadadd840582014-07-30 14:08:14 +0900732
Lokesh Vutla586bde92018-08-27 15:57:08 +0530733config ARCH_K3
734 bool "Texas Instruments' K3 Architecture"
735 select SPL
736 select SUPPORT_SPL
737 select FIT
738
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900739config ARCH_OMAP2PLUS
740 bool "TI OMAP2+"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530741 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900742 select GPIO_EXTRA_HEADER
Ley Foon Tan0680f1b2017-05-03 17:13:32 +0800743 select SPL_BOARD_INIT if SPL
Tom Riniff6c3122017-09-17 11:44:49 -0400744 select SPL_STACK_R if SPL
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900745 select SUPPORT_SPL
Dario Binacchi92cc4e12020-12-30 00:06:29 +0100746 imply TI_SYSC if DM && OF_CONTROL
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900747 imply FIT
748
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200749config ARCH_MESON
750 bool "Amlogic Meson"
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900751 select GPIO_EXTRA_HEADER
Masahiro Yamada7325f6c2018-04-25 18:47:52 +0900752 imply DISTRO_DEFAULTS
Heinrich Schuchardt6da749d2020-04-05 12:20:23 +0200753 imply DM_RNG
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200754 help
755 Support for the Meson SoC family developed by Amlogic Inc.,
756 targeted at media players and tablet computers. We currently
757 support the S905 (GXBaby) 64-bit SoC.
758
Ryder Leecbd2fba2018-11-15 10:07:52 +0800759config ARCH_MEDIATEK
760 bool "MediaTek SoCs"
Ryder Leecbd2fba2018-11-15 10:07:52 +0800761 select DM
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900762 select GPIO_EXTRA_HEADER
Ryder Leecbd2fba2018-11-15 10:07:52 +0800763 select OF_CONTROL
764 select SPL_DM if SPL
765 select SPL_LIBCOMMON_SUPPORT if SPL
766 select SPL_LIBGENERIC_SUPPORT if SPL
767 select SPL_OF_CONTROL if SPL
768 select SUPPORT_SPL
769 help
770 Support for the MediaTek SoCs family developed by MediaTek Inc.
771 Please refer to doc/README.mediatek for more information.
772
Vladimir Zapolskiyee54dfe2018-09-17 21:43:03 +0300773config ARCH_LPC32XX
774 bool "NXP LPC32xx platform"
775 select CPU_ARM926EJS
776 select DM
777 select DM_GPIO
778 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900779 select GPIO_EXTRA_HEADER
Vladimir Zapolskiyee54dfe2018-09-17 21:43:03 +0300780 select SPL_DM if SPL
781 select SUPPORT_SPL
782 imply CMD_DM
783
Peng Fanb2b8b9b2018-10-18 14:28:08 +0200784config ARCH_IMX8
785 bool "NXP i.MX8 platform"
786 select ARM64
787 select DM
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900788 select GPIO_EXTRA_HEADER
Peng Fanb2b8b9b2018-10-18 14:28:08 +0200789 select OF_CONTROL
Ye Li9a273852019-07-12 09:33:52 +0000790 select ENABLE_ARM_SOC_BOOT0_HOOK
Peng Fanb2b8b9b2018-10-18 14:28:08 +0200791
Peng Fancd357ad2018-11-20 10:19:25 +0000792config ARCH_IMX8M
Peng Fan7a7391f2018-01-10 13:20:19 +0800793 bool "NXP i.MX8M platform"
794 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900795 select GPIO_EXTRA_HEADER
Aymen Sghaier940d36d2021-03-25 17:30:25 +0800796 select SYS_FSL_HAS_SEC if IMX_HAB
797 select SYS_FSL_SEC_COMPAT_4
798 select SYS_FSL_SEC_LE
Peng Fan7a7391f2018-01-10 13:20:19 +0800799 select DM
800 select SUPPORT_SPL
Michal Simek08a00cb2018-07-23 15:55:14 +0200801 imply CMD_DM
Peng Fan7a7391f2018-01-10 13:20:19 +0800802
Giulio Benetti77eb9a92020-01-10 15:51:47 +0100803config ARCH_IMXRT
804 bool "NXP i.MXRT platform"
805 select CPU_V7M
806 select DM
807 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900808 select GPIO_EXTRA_HEADER
Giulio Benetti77eb9a92020-01-10 15:51:47 +0100809 select SUPPORT_SPL
810 imply CMD_DM
811
Stefan Agnerc5343d42018-02-06 09:44:34 +0100812config ARCH_MX23
813 bool "NXP i.MX23 family"
814 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900815 select GPIO_EXTRA_HEADER
Stefan Agnerc5343d42018-02-06 09:44:34 +0100816 select PL011_SERIAL
817 select SUPPORT_SPL
818
Fabio Estevam07df6972017-11-03 13:40:08 -0200819config ARCH_MX25
820 bool "NXP MX25"
821 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900822 select GPIO_EXTRA_HEADER
Adam Ford8bbff6a2018-02-04 09:32:43 -0600823 imply MXC_GPIO
Fabio Estevam07df6972017-11-03 13:40:08 -0200824
Stefan Agner25c5b4e2018-02-06 09:44:35 +0100825config ARCH_MX28
826 bool "NXP i.MX28 family"
827 select CPU_ARM926EJS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900828 select GPIO_EXTRA_HEADER
Stefan Agner25c5b4e2018-02-06 09:44:35 +0100829 select PL011_SERIAL
830 select SUPPORT_SPL
831
Magnus Lilja3159ec62018-05-11 14:06:54 +0200832config ARCH_MX31
833 bool "NXP i.MX31 family"
834 select CPU_ARM1136
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900835 select GPIO_EXTRA_HEADER
Magnus Lilja3159ec62018-05-11 14:06:54 +0200836
Peng Fane90a08d2017-02-22 16:21:39 +0800837config ARCH_MX7ULP
Michal Simek6e7bdde2018-07-23 15:55:12 +0200838 bool "NXP MX7ULP"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530839 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900840 select GPIO_EXTRA_HEADER
Franck LENORMANDb5438002021-03-25 17:30:23 +0800841 select SYS_FSL_HAS_SEC if IMX_HAB
842 select SYS_FSL_SEC_COMPAT_4
843 select SYS_FSL_SEC_LE
Peng Fane90a08d2017-02-22 16:21:39 +0800844 select ROM_UNIFIED_SECTIONS
Adam Ford8bbff6a2018-02-04 09:32:43 -0600845 imply MXC_GPIO
Tom Rini44ad4962019-12-03 09:28:03 -0500846 imply SYS_THUMB_BUILD
Peng Fane90a08d2017-02-22 16:21:39 +0800847
Adrian Alonso1a8150d2015-09-03 11:49:28 -0500848config ARCH_MX7
849 bool "Freescale MX7"
Michal Simek5ed063d2018-07-23 15:55:13 +0200850 select ARCH_MISC_INIT
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530851 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900852 select GPIO_EXTRA_HEADER
Stefano Babicd714a752019-09-20 08:47:53 +0200853 select SYS_FSL_HAS_SEC if IMX_HAB
York Sun2c2e2c92016-12-28 08:43:30 -0800854 select SYS_FSL_SEC_COMPAT_4
York Sun90b80382016-12-28 08:43:31 -0800855 select SYS_FSL_SEC_LE
Marek Vasut72041602020-05-22 01:13:00 +0200856 imply BOARD_EARLY_INIT_F
Adam Ford8bbff6a2018-02-04 09:32:43 -0600857 imply MXC_GPIO
Tom Rini44ad4962019-12-03 09:28:03 -0500858 imply SYS_THUMB_BUILD
Adrian Alonso1a8150d2015-09-03 11:49:28 -0500859
Boris BREZILLON89ebc822015-03-04 13:13:03 +0100860config ARCH_MX6
861 bool "Freescale MX6"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530862 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900863 select GPIO_EXTRA_HEADER
Heinrich Schuchardt90865612020-06-26 19:57:55 +0200864 select SYS_FSL_HAS_SEC
York Sun2c2e2c92016-12-28 08:43:30 -0800865 select SYS_FSL_SEC_COMPAT_4
York Sun90b80382016-12-28 08:43:31 -0800866 select SYS_FSL_SEC_LE
Adam Ford8bbff6a2018-02-04 09:32:43 -0600867 imply MXC_GPIO
Tom Rini44ad4962019-12-03 09:28:03 -0500868 imply SYS_THUMB_BUILD
Boris BREZILLON89ebc822015-03-04 13:13:03 +0100869
Philipp Tomsichb5299932017-08-03 23:23:55 +0200870if ARCH_MX6
871config SPL_LDSCRIPT
Michal Simek6e7bdde2018-07-23 15:55:12 +0200872 default "arch/arm/mach-omap2/u-boot-spl.lds"
Philipp Tomsichb5299932017-08-03 23:23:55 +0200873endif
874
Andrej Rosano424ee3d2015-04-08 18:56:29 +0200875config ARCH_MX5
876 bool "Freescale MX5"
Simon Glassa5d67542017-01-23 13:31:20 -0700877 select BOARD_EARLY_INIT_F
Michal Simek5ed063d2018-07-23 15:55:13 +0200878 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900879 select GPIO_EXTRA_HEADER
Adam Ford8bbff6a2018-02-04 09:32:43 -0600880 imply MXC_GPIO
Andrej Rosano424ee3d2015-04-08 18:56:29 +0200881
Stefan Bosch95e9a8e2020-07-10 19:07:26 +0200882config ARCH_NEXELL
883 bool "Nexell S5P4418/S5P6818 SoC"
884 select ENABLE_ARM_SOC_BOOT0_HOOK
885 select DM
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900886 select GPIO_EXTRA_HEADER
Stefan Bosch95e9a8e2020-07-10 19:07:26 +0200887
Manivannan Sadhasivam97775d22018-06-14 23:38:31 +0530888config ARCH_OWL
889 bool "Actions Semi OWL SoCs"
Manivannan Sadhasivam97775d22018-06-14 23:38:31 +0530890 select DM
Amit Singh Tomarcd2baaf2020-05-09 19:55:14 +0530891 select DM_ETH
Manivannan Sadhasivam97775d22018-06-14 23:38:31 +0530892 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900893 select GPIO_EXTRA_HEADER
Amit Singh Tomarb1a6bb32020-04-19 19:28:25 +0530894 select OWL_SERIAL
Amit Singh Tomar8b520ac2020-04-19 19:28:30 +0530895 select CLK
896 select CLK_OWL
Manivannan Sadhasivam97775d22018-06-14 23:38:31 +0530897 select OF_CONTROL
Tom Rini36c2f022020-05-01 10:52:11 -0400898 select SYS_RELOC_GD_ENV_ADDR
Michal Simek08a00cb2018-07-23 15:55:14 +0200899 imply CMD_DM
Manivannan Sadhasivam97775d22018-06-14 23:38:31 +0530900
Tuomas Tynkkynen32f11822017-09-19 23:18:07 +0300901config ARCH_QEMU
902 bool "QEMU Virtual Platform"
Tuomas Tynkkynen32f11822017-09-19 23:18:07 +0300903 select DM
904 select DM_SERIAL
905 select OF_CONTROL
Alexander Grafcf2c7782018-01-25 12:05:52 +0100906 select PL01X_SERIAL
Michal Simek08a00cb2018-07-23 15:55:14 +0200907 imply CMD_DM
Heinrich Schuchardt684710d2020-09-19 07:55:35 +0200908 imply DM_RNG
AKASHI Takahiroa47c1b52018-09-14 17:06:54 +0900909 imply DM_RTC
910 imply RTC_PL031
Tuomas Tynkkynen32f11822017-09-19 23:18:07 +0300911
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +0900912config ARCH_RMOBILE
Masahiro Yamadaf40b9892014-08-31 07:10:57 +0900913 bool "Renesas ARM SoCs"
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +0900914 select DM
915 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900916 select GPIO_EXTRA_HEADER
Biju Das5157b012020-09-22 13:06:49 +0100917 imply BOARD_EARLY_INIT_F
Michal Simek08a00cb2018-07-23 15:55:14 +0200918 imply CMD_DM
Tom Rini91d27a12017-06-02 11:03:50 -0400919 imply FAT_WRITE
Tom Rini3a649402017-03-18 09:01:44 -0400920 imply SYS_THUMB_BUILD
Marek Vasut00e4b572018-12-03 13:28:25 +0100921 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
Masahiro Yamadadd840582014-07-30 14:08:14 +0900922
Mateusz Kulikowski08592132016-03-31 23:12:32 +0200923config ARCH_SNAPDRAGON
924 bool "Qualcomm Snapdragon SoCs"
925 select ARM64
926 select DM
927 select DM_GPIO
928 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900929 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +0200930 select MSM_SMEM
Mateusz Kulikowski08592132016-03-31 23:12:32 +0200931 select OF_CONTROL
932 select OF_SEPARATE
Ramon Fried654dd4a2018-07-02 02:57:56 +0300933 select SMEM
Michal Simek5ed063d2018-07-23 15:55:13 +0200934 select SPMI
Michal Simek08a00cb2018-07-23 15:55:14 +0200935 imply CMD_DM
Mateusz Kulikowski08592132016-03-31 23:12:32 +0200936
Masahiro Yamada7865f4b2015-04-21 20:38:20 +0900937config ARCH_SOCFPGA
938 bool "Altera SOCFPGA family"
Simon Glassa4211922017-01-23 13:31:19 -0700939 select ARCH_EARLY_INIT_R
Marek Vasutd6a61da2018-08-13 20:06:46 +0200940 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
Siew Chin Lim9a5bbdf2021-03-01 20:04:10 +0800941 select ARM64 if TARGET_SOCFPGA_SOC64
Ley Foon Tana6847292018-05-24 00:17:32 +0800942 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
Marek Vasut48befc02018-05-11 22:25:59 +0200943 select DM
Marek Vasut73172752018-05-11 22:26:35 +0200944 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900945 select GPIO_EXTRA_HEADER
Ley Foon Tana6847292018-05-24 00:17:32 +0800946 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
Marek Vasut48befc02018-05-11 22:25:59 +0200947 select OF_CONTROL
Ley Foon Tan00057ee2018-07-13 13:40:23 +0800948 select SPL_DM_RESET if DM_RESET
Michal Simek5ed063d2018-07-23 15:55:13 +0200949 select SPL_DM_SERIAL
Marek Vasut48befc02018-05-11 22:25:59 +0200950 select SPL_LIBCOMMON_SUPPORT
Marek Vasut48befc02018-05-11 22:25:59 +0200951 select SPL_LIBGENERIC_SUPPORT
Marek Vasut48befc02018-05-11 22:25:59 +0200952 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
953 select SPL_OF_CONTROL
Siew Chin Lim9a5bbdf2021-03-01 20:04:10 +0800954 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
Marek Vasut48befc02018-05-11 22:25:59 +0200955 select SPL_SERIAL_SUPPORT
Simon Goldschmidtef72ba02019-07-15 21:47:55 +0200956 select SPL_SYSRESET
Marek Vasut48befc02018-05-11 22:25:59 +0200957 select SPL_WATCHDOG_SUPPORT
958 select SUPPORT_SPL
Marek Vasut73172752018-05-11 22:26:35 +0200959 select SYS_NS16550
Ley Foon Tana6847292018-05-24 00:17:32 +0800960 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
Simon Goldschmidtef72ba02019-07-15 21:47:55 +0200961 select SYSRESET
962 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
Siew Chin Lim9a5bbdf2021-03-01 20:04:10 +0800963 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
Michal Simek08a00cb2018-07-23 15:55:14 +0200964 imply CMD_DM
Tom Rinid56b4b12017-07-22 18:36:16 -0400965 imply CMD_MTDPARTS
Daniel Thompson221a9492017-05-19 17:26:58 +0100966 imply CRC32_VERIFY
Simon Goldschmidtfef4a542018-02-13 06:34:14 +0100967 imply DM_SPI
968 imply DM_SPI_FLASH
Tom Rini91d27a12017-06-02 11:03:50 -0400969 imply FAT_WRITE
Simon Goldschmidtaef44282019-04-09 21:02:05 +0200970 imply SPL
971 imply SPL_DM
Lukasz Majewski56c40462020-06-04 23:11:53 +0800972 imply SPL_DM_SPI
973 imply SPL_DM_SPI_FLASH
Simon Goldschmidta9024dc2018-11-29 21:17:08 +0100974 imply SPL_LIBDISK_SUPPORT
975 imply SPL_MMC_SUPPORT
Simon Goldschmidtfef4a542018-02-13 06:34:14 +0100976 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
Simon Goldschmidtf48db4e2018-10-30 20:21:49 +0100977 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
Simon Goldschmidta9024dc2018-11-29 21:17:08 +0100978 imply SPL_SPI_FLASH_SUPPORT
979 imply SPL_SPI_SUPPORT
Dinh Nguyenaaa64802019-04-23 16:55:06 -0500980 imply L2X0_CACHE
Masahiro Yamadadd840582014-07-30 14:08:14 +0900981
Ian Campbell2c7e3b92014-10-24 21:20:44 +0100982config ARCH_SUNXI
983 bool "Support sunxi (Allwinner) SoCs"
Masahiro Yamadad6a0c782017-10-17 13:42:44 +0900984 select BINMAN
Hans de Goede88bb8002016-04-03 09:41:44 +0200985 select CMD_GPIO
Hans de Goede0878a8a2016-05-15 13:51:58 +0200986 select CMD_MMC if MMC
Yann E. MORIN2997ee52016-10-31 22:33:40 +0100987 select CMD_USB if DISTRO_DEFAULTS
Jagan Tekie236ff02019-01-11 16:40:20 +0530988 select CLK
Hans de Goedeb6006ba2015-04-15 20:46:48 +0200989 select DM
Tom Rini45368822015-06-30 16:51:15 -0400990 select DM_ETH
Hans de Goede211d57a2015-12-21 20:22:00 +0100991 select DM_GPIO
992 select DM_KEYBOARD
Jagan Tekibb3362b2019-04-12 16:48:25 +0530993 select DM_MMC if MMC
994 select DM_SCSI if SCSI
Tom Rini45368822015-06-30 16:51:15 -0400995 select DM_SERIAL
Yann E. MORIN2997ee52016-10-31 22:33:40 +0100996 select DM_USB if DISTRO_DEFAULTS
Masami Hiramatsu7a672052021-06-04 18:43:55 +0900997 select GPIO_EXTRA_HEADER
Hans de Goeded75111a2016-03-22 22:51:52 +0100998 select OF_BOARD_SETUP
Hans de Goedeb6006ba2015-04-15 20:46:48 +0200999 select OF_CONTROL
1000 select OF_SEPARATE
Tom Rini6f6b7cf2018-03-06 19:02:27 -05001001 select SPECIFY_CONSOLE_INDEX
Tom Riniab43de82017-06-21 07:54:46 -04001002 select SPL_STACK_R if SPL
1003 select SPL_SYS_MALLOC_SIMPLE if SPL
Tom Rini3a649402017-03-18 09:01:44 -04001004 select SPL_SYS_THUMB_BUILD if !ARM64
Andre Przywara10cfbaa2019-06-23 15:09:46 +01001005 select SUNXI_GPIO
Michal Simek5ed063d2018-07-23 15:55:13 +02001006 select SYS_NS16550
Maxime Ripardce2e44d2017-10-19 11:49:29 +02001007 select SYS_THUMB_BUILD if !ARM64
Yann E. MORIN2997ee52016-10-31 22:33:40 +01001008 select USB if DISTRO_DEFAULTS
Yann E. MORIN2997ee52016-10-31 22:33:40 +01001009 select USB_KEYBOARD if DISTRO_DEFAULTS
Michal Simek5ed063d2018-07-23 15:55:13 +02001010 select USB_STORAGE if DISTRO_DEFAULTS
Simon Glass27084c02019-09-25 08:56:27 -06001011 select SPL_USE_TINY_PRINTF
Andre Przywara48313fe2020-02-20 17:51:14 +00001012 select USE_PREBOOT
1013 select SYS_RELOC_GD_ENV_ADDR
Andy Shevchenko92600ed2020-12-08 17:45:31 +02001014 imply BOARD_LATE_INIT
Michal Simek08a00cb2018-07-23 15:55:14 +02001015 imply CMD_DM
Maxime Riparda12fb0e2017-08-24 11:54:03 +02001016 imply CMD_GPT
Miquel Raynal88718be2019-10-03 19:50:03 +02001017 imply CMD_UBI if MTD_RAW_NAND
Masahiro Yamada7325f6c2018-04-25 18:47:52 +09001018 imply DISTRO_DEFAULTS
Tom Rini91d27a12017-06-02 11:03:50 -04001019 imply FAT_WRITE
Marek Vasut2f13cf32018-10-10 18:27:35 +02001020 imply FIT
Andre Heidereff264d2018-01-16 09:44:22 +01001021 imply OF_LIBFDT_OVERLAY
Masahiro Yamadaaf83a602017-04-28 19:42:19 +09001022 imply PRE_CONSOLE_BUFFER
1023 imply SPL_GPIO_SUPPORT
1024 imply SPL_LIBCOMMON_SUPPORT
Masahiro Yamadaaf83a602017-04-28 19:42:19 +09001025 imply SPL_LIBGENERIC_SUPPORT
Masahiro Yamada4aa2ba32017-05-09 20:31:39 +09001026 imply SPL_MMC_SUPPORT if MMC
Masahiro Yamadaaf83a602017-04-28 19:42:19 +09001027 imply SPL_POWER_SUPPORT
1028 imply SPL_SERIAL_SUPPORT
Maxime Ripard654b02b2017-09-07 10:46:24 +02001029 imply USB_GADGET
Chen-Yu Tsai8ebe4f42014-10-22 16:47:44 +08001030
Stephan Gerhold689088f2020-01-04 18:45:17 +01001031config ARCH_U8500
1032 bool "ST-Ericsson U8500 Series"
1033 select CPU_V7A
1034 select DM
1035 select DM_GPIO
1036 select DM_MMC if MMC
1037 select DM_SERIAL
1038 select DM_USB if USB
1039 select OF_CONTROL
1040 select SYSRESET
1041 select TIMER
1042 imply ARM_PL180_MMCI
1043 imply DM_RTC
1044 imply NOMADIK_MTU_TIMER
1045 imply PL01X_SERIAL
1046 imply RTC_PL031
1047 imply SYSRESET_SYSCON
1048
Michal Simekec48b6c2018-08-22 14:55:27 +02001049config ARCH_VERSAL
1050 bool "Support Xilinx Versal Platform"
1051 select ARM64
1052 select CLK
1053 select DM
Michal Simekfa797152019-01-15 08:52:46 +01001054 select DM_ETH if NET
1055 select DM_MMC if MMC
Michal Simekec48b6c2018-08-22 14:55:27 +02001056 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001057 select GPIO_EXTRA_HEADER
Michal Simekec48b6c2018-08-22 14:55:27 +02001058 select OF_CONTROL
Siva Durga Prasad Paladugubfd092f2019-01-31 17:28:14 +05301059 imply BOARD_LATE_INIT
Michal Simek62b96262020-07-28 12:45:47 +02001060 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
Michal Simekec48b6c2018-08-22 14:55:27 +02001061
Stefan Agner7966b432017-03-13 18:41:36 -07001062config ARCH_VF610
1063 bool "Freescale Vybrid"
Lokesh Vutlaacf15002018-04-26 18:21:26 +05301064 select CPU_V7A
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001065 select GPIO_EXTRA_HEADER
York Sunc01e4a12016-12-28 08:43:42 -08001066 select SYS_FSL_ERRATUM_ESDHC111
Tom Rinid56b4b12017-07-22 18:36:16 -04001067 imply CMD_MTDPARTS
Miquel Raynal88718be2019-10-03 19:50:03 +02001068 imply MTD_RAW_NAND
Masahiro Yamadadd840582014-07-30 14:08:14 +09001069
Masahiro Yamada5ca269a2015-03-16 16:43:24 +09001070config ARCH_ZYNQ
Michal Simekb8d44972017-11-23 08:25:41 +01001071 bool "Xilinx Zynq based platform"
Michal Simek5ed063d2018-07-23 15:55:13 +02001072 select CLK
1073 select CLK_ZYNQ
1074 select CPU_V7A
Masahiro Yamada8981f052015-03-31 12:47:55 +09001075 select DM
Michal Simekc4a142f2018-01-09 14:49:28 +01001076 select DM_ETH if NET
Michal Simekc4a142f2018-01-09 14:49:28 +01001077 select DM_MMC if MMC
Simon Glass42800ff2015-10-17 19:41:27 -06001078 select DM_SERIAL
Michal Simek5ed063d2018-07-23 15:55:13 +02001079 select DM_SPI
Jagan Teki9f7a4502015-06-27 00:51:32 +05301080 select DM_SPI_FLASH
Simon Glassdec49e82016-07-05 17:10:14 -06001081 select DM_USB if USB
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001082 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +02001083 select OF_CONTROL
Adam Fordf1b1f772018-04-15 13:51:26 -04001084 select SPI
Michal Simek5ed063d2018-07-23 15:55:13 +02001085 select SPL_BOARD_INIT if SPL
1086 select SPL_CLK if SPL
1087 select SPL_DM if SPL
Lukasz Majewski56c40462020-06-04 23:11:53 +08001088 select SPL_DM_SPI if SPL
1089 select SPL_DM_SPI_FLASH if SPL
Michal Simek5ed063d2018-07-23 15:55:13 +02001090 select SPL_OF_CONTROL if SPL
1091 select SPL_SEPARATE_BSS if SPL
1092 select SUPPORT_SPL
Michal Simek4aba5fb2018-01-17 10:56:22 -03001093 imply ARCH_EARLY_INIT_R
Michal Simek8eb55e12018-08-20 08:24:14 +02001094 imply BOARD_LATE_INIT
Michal Simek5ed063d2018-07-23 15:55:13 +02001095 imply CMD_CLK
Michal Simek08a00cb2018-07-23 15:55:14 +02001096 imply CMD_DM
Michal Simek5ed063d2018-07-23 15:55:13 +02001097 imply CMD_SPL
Michal Simek62b96262020-07-28 12:45:47 +02001098 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
Michal Simek5ed063d2018-07-23 15:55:13 +02001099 imply FAT_WRITE
Masahiro Yamadadd840582014-07-30 14:08:14 +09001100
Michal Simek1d6c54e2018-04-12 17:39:46 +02001101config ARCH_ZYNQMP_R5
1102 bool "Xilinx ZynqMP R5 based platform"
Michal Simek5ed063d2018-07-23 15:55:13 +02001103 select CLK
Michal Simek1d6c54e2018-04-12 17:39:46 +02001104 select CPU_V7R
Michal Simek1d6c54e2018-04-12 17:39:46 +02001105 select DM
Michal Simek6f96fb52019-01-15 09:06:46 +01001106 select DM_ETH if NET
1107 select DM_MMC if MMC
Michal Simek1d6c54e2018-04-12 17:39:46 +02001108 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001109 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +02001110 select OF_CONTROL
Michal Simek08a00cb2018-07-23 15:55:14 +02001111 imply CMD_DM
Jean-Jacques Hiblot687ab542018-11-29 10:52:42 +01001112 imply DM_USB_GADGET
Michal Simek1d6c54e2018-04-12 17:39:46 +02001113
Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +05301114config ARCH_ZYNQMP
Michal Simekb8d44972017-11-23 08:25:41 +01001115 bool "Xilinx ZynqMP based platform"
Michal Simek84c72042015-01-15 10:01:51 +01001116 select ARM64
Michal Simek1f297382016-07-14 15:07:54 +02001117 select CLK
Michal Simek5ed063d2018-07-23 15:55:13 +02001118 select DM
Michal Simekfb693102019-01-15 08:52:51 +01001119 select DM_ETH if NET
Ibai Erkiaga1327d162019-09-27 12:51:41 +02001120 select DM_MAILBOX
Michal Simekfb693102019-01-15 08:52:51 +01001121 select DM_MMC if MMC
Michal Simek5ed063d2018-07-23 15:55:13 +02001122 select DM_SERIAL
Michal Simek088f83e2019-01-15 10:50:39 +01001123 select DM_SPI if SPI
1124 select DM_SPI_FLASH if DM_SPI
Michal Simek5ed063d2018-07-23 15:55:13 +02001125 select DM_USB if USB
Ibai Erkiaga325a22d2019-09-27 11:37:04 +01001126 select FIRMWARE
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001127 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +02001128 select OF_CONTROL
Ley Foon Tan0680f1b2017-05-03 17:13:32 +08001129 select SPL_BOARD_INIT if SPL
Michal Simek2f039682017-12-01 15:13:36 +01001130 select SPL_CLK if SPL
Michal Simek6cb402f2020-08-19 10:30:39 +02001131 select SPL_DM if SPL
1132 select SPL_DM_SPI if SPI && SPL_DM
Lukasz Majewski56c40462020-06-04 23:11:53 +08001133 select SPL_DM_SPI_FLASH if SPL_DM_SPI
Ibai Erkiaga325a22d2019-09-27 11:37:04 +01001134 select SPL_DM_MAILBOX if SPL
1135 select SPL_FIRMWARE if SPL
Michal Simek850e7792018-11-23 09:01:44 +01001136 select SPL_SEPARATE_BSS if SPL
Michal Simek5ed063d2018-07-23 15:55:13 +02001137 select SUPPORT_SPL
Ibai Erkiaga1327d162019-09-27 12:51:41 +02001138 select ZYNQMP_IPI
Michal Simek8eb55e12018-08-20 08:24:14 +02001139 imply BOARD_LATE_INIT
Michal Simek08a00cb2018-07-23 15:55:14 +02001140 imply CMD_DM
Michal Simek62b96262020-07-28 12:45:47 +02001141 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
Tom Rini91d27a12017-06-02 11:03:50 -04001142 imply FAT_WRITE
Michal Simek22270ca032018-10-04 14:26:13 +02001143 imply MP
Jean-Jacques Hiblot687ab542018-11-29 10:52:42 +01001144 imply DM_USB_GADGET
Michal Simek84c72042015-01-15 10:01:51 +01001145
Trevor Woerner18138ab2020-05-06 08:02:41 -04001146config ARCH_TEGRA
Masahiro Yamadaddd960e2014-08-31 07:10:56 +09001147 bool "NVIDIA Tegra"
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001148 select GPIO_EXTRA_HEADER
Masahiro Yamada7325f6c2018-04-25 18:47:52 +09001149 imply DISTRO_DEFAULTS
Tom Rini91d27a12017-06-02 11:03:50 -04001150 imply FAT_WRITE
Masahiro Yamadadd840582014-07-30 14:08:14 +09001151
Linus Walleijf91afc42015-01-23 11:50:53 +01001152config TARGET_VEXPRESS64_AEMV8A
Masahiro Yamadadd840582014-07-30 14:08:14 +09001153 bool "Support vexpress_aemv8a"
Masahiro Yamada016a9542014-09-14 03:01:51 +09001154 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001155 select GPIO_EXTRA_HEADER
Alexander Grafcf2c7782018-01-25 12:05:52 +01001156 select PL01X_SERIAL
Masahiro Yamadadd840582014-07-30 14:08:14 +09001157
Linus Walleijf91afc42015-01-23 11:50:53 +01001158config TARGET_VEXPRESS64_BASE_FVP
1159 bool "Support Versatile Express ARMv8a FVP BASE model"
1160 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001161 select GPIO_EXTRA_HEADER
Alexander Grafcf2c7782018-01-25 12:05:52 +01001162 select PL01X_SERIAL
Michal Simek5ed063d2018-07-23 15:55:13 +02001163 select SEMIHOSTING
Linus Walleijf91afc42015-01-23 11:50:53 +01001164
Linus Walleijffc10372015-01-23 14:41:10 +01001165config TARGET_VEXPRESS64_JUNO
1166 bool "Support Versatile Express Juno Development Platform"
1167 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001168 select GPIO_EXTRA_HEADER
Alexander Grafcf2c7782018-01-25 12:05:52 +01001169 select PL01X_SERIAL
Andre Przywarab3270e92020-04-27 19:18:01 +01001170 select DM
1171 select OF_CONTROL
1172 select OF_BOARD
1173 select CLK
1174 select DM_SERIAL
Andre Przywarabe0d0962020-04-27 19:18:02 +01001175 select ARM_PSCI_FW
1176 select PSCI_RESET
Andre Przywaracc696e72020-06-11 12:03:18 +01001177 select DM_ETH
Andre Przywara56e403d2020-04-27 19:18:03 +01001178 select BLK
1179 select USB
1180 select DM_USB
Linus Walleijffc10372015-01-23 14:41:10 +01001181
Usama Arif565add12020-08-12 16:12:53 +01001182config TARGET_TOTAL_COMPUTE
1183 bool "Support Total Compute Platform"
1184 select ARM64
1185 select PL01X_SERIAL
1186 select DM
1187 select DM_SERIAL
1188 select DM_MMC
1189 select DM_GPIO
1190
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301191config TARGET_LS2080A_EMU
1192 bool "Support ls2080a_emu"
York Sunfb2bf8c2016-10-04 14:31:48 -07001193 select ARCH_LS2080A
Masahiro Yamada016a9542014-09-14 03:01:51 +09001194 select ARM64
Linus Walleij23b58772015-03-09 10:53:21 +01001195 select ARMV8_MULTIENTRY
Rajesh Bhagat32413122019-02-01 05:22:01 +00001196 select FSL_DDR_SYNC_REFRESH
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001197 select GPIO_EXTRA_HEADER
York Sun7288c2c2015-03-20 19:28:23 -07001198 help
Robert P. J. Daye852b302019-12-25 06:34:07 -05001199 Support for Freescale LS2080A_EMU platform.
1200 The LS2080A Development System (EMULATOR) is a pre-silicon
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301201 development platform that supports the QorIQ LS2080A
York Sun7288c2c2015-03-20 19:28:23 -07001202 Layerscape Architecture processor.
1203
Ashish Kumar77697762017-08-31 16:12:55 +05301204config TARGET_LS1088AQDS
1205 bool "Support ls1088aqds"
1206 select ARCH_LS1088A
1207 select ARM64
1208 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001209 select ARCH_SUPPORT_TFABOOT
Ashish Kumar77697762017-08-31 16:12:55 +05301210 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001211 select GPIO_EXTRA_HEADER
Ashish Kumar91fded62017-11-06 13:18:44 +05301212 select SUPPORT_SPL
Rajesh Bhagat32413122019-02-01 05:22:01 +00001213 select FSL_DDR_INTERACTIVE if !SD_BOOT
Ashish Kumar77697762017-08-31 16:12:55 +05301214 help
Robert P. J. Daye852b302019-12-25 06:34:07 -05001215 Support for NXP LS1088AQDS platform.
Ashish Kumar77697762017-08-31 16:12:55 +05301216 The LS1088A Development System (QDS) is a high-performance
1217 development platform that supports the QorIQ LS1088A
1218 Layerscape Architecture processor.
1219
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301220config TARGET_LS2080AQDS
1221 bool "Support ls2080aqds"
York Sunfb2bf8c2016-10-04 14:31:48 -07001222 select ARCH_LS2080A
York Sune2b65ea2015-03-20 19:28:24 -07001223 select ARM64
1224 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001225 select ARCH_SUPPORT_TFABOOT
Tom Rinie5ec4812017-01-22 19:43:11 -05001226 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001227 select GPIO_EXTRA_HEADER
Scott Wood32eda7c2015-03-24 13:25:03 -07001228 select SUPPORT_SPL
Simon Glassfedb4282017-06-14 21:28:21 -06001229 imply SCSI
Tuomas Tynkkynen9fd95ef2017-12-08 15:36:19 +02001230 imply SCSI_AHCI
Rajesh Bhagat32413122019-02-01 05:22:01 +00001231 select FSL_DDR_BIST
1232 select FSL_DDR_INTERACTIVE if !SPL
York Sune2b65ea2015-03-20 19:28:24 -07001233 help
Robert P. J. Daye852b302019-12-25 06:34:07 -05001234 Support for Freescale LS2080AQDS platform.
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301235 The LS2080A Development System (QDS) is a high-performance
1236 development platform that supports the QorIQ LS2080A
1237 Layerscape Architecture processor.
1238
1239config TARGET_LS2080ARDB
1240 bool "Support ls2080ardb"
York Sunfb2bf8c2016-10-04 14:31:48 -07001241 select ARCH_LS2080A
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301242 select ARM64
1243 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001244 select ARCH_SUPPORT_TFABOOT
Tom Rinie5ec4812017-01-22 19:43:11 -05001245 select BOARD_LATE_INIT
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301246 select SUPPORT_SPL
Rajesh Bhagat32413122019-02-01 05:22:01 +00001247 select FSL_DDR_BIST
1248 select FSL_DDR_INTERACTIVE if !SPL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001249 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001250 imply SCSI
Tuomas Tynkkynen9fd95ef2017-12-08 15:36:19 +02001251 imply SCSI_AHCI
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05301252 help
1253 Support for Freescale LS2080ARDB platform.
1254 The LS2080A Reference design board (RDB) is a high-performance
1255 development platform that supports the QorIQ LS2080A
York Sune2b65ea2015-03-20 19:28:24 -07001256 Layerscape Architecture processor.
1257
Priyanka Jain3049a582017-04-27 15:08:07 +05301258config TARGET_LS2081ARDB
1259 bool "Support ls2081ardb"
1260 select ARCH_LS2080A
1261 select ARM64
1262 select ARMV8_MULTIENTRY
1263 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001264 select GPIO_EXTRA_HEADER
Priyanka Jain3049a582017-04-27 15:08:07 +05301265 select SUPPORT_SPL
Priyanka Jain3049a582017-04-27 15:08:07 +05301266 help
1267 Support for Freescale LS2081ARDB platform.
1268 The LS2081A Reference design board (RDB) is a high-performance
1269 development platform that supports the QorIQ LS2081A/LS2041A
1270 Layerscape Architecture processor.
1271
Priyanka Jain58c3e622018-11-28 13:04:27 +00001272config TARGET_LX2160ARDB
1273 bool "Support lx2160ardb"
1274 select ARCH_LX2160A
Priyanka Jain58c3e622018-11-28 13:04:27 +00001275 select ARM64
1276 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001277 select ARCH_SUPPORT_TFABOOT
Priyanka Jain58c3e622018-11-28 13:04:27 +00001278 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001279 select GPIO_EXTRA_HEADER
Priyanka Jain58c3e622018-11-28 13:04:27 +00001280 help
1281 Support for NXP LX2160ARDB platform.
1282 The lx2160ardb (LX2160A Reference design board (RDB)
1283 is a high-performance development platform that supports the
1284 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1285
Pankaj Bansal1eba7232019-02-08 10:29:58 +00001286config TARGET_LX2160AQDS
1287 bool "Support lx2160aqds"
1288 select ARCH_LX2160A
Pankaj Bansal1eba7232019-02-08 10:29:58 +00001289 select ARM64
1290 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001291 select ARCH_SUPPORT_TFABOOT
Pankaj Bansal1eba7232019-02-08 10:29:58 +00001292 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001293 select GPIO_EXTRA_HEADER
Pankaj Bansal1eba7232019-02-08 10:29:58 +00001294 help
1295 Support for NXP LX2160AQDS platform.
1296 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1297 is a high-performance development platform that supports the
1298 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1299
Meenakshi Aggarwal9ed303d2020-12-04 20:17:28 +05301300config TARGET_LX2162AQDS
1301 bool "Support lx2162aqds"
1302 select ARCH_LX2162A
1303 select ARCH_MISC_INIT
1304 select ARM64
1305 select ARMV8_MULTIENTRY
1306 select ARCH_SUPPORT_TFABOOT
1307 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001308 select GPIO_EXTRA_HEADER
Meenakshi Aggarwal9ed303d2020-12-04 20:17:28 +05301309 help
1310 Support for NXP LX2162AQDS platform.
1311 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1312
Peter Griffin11ac2362015-07-30 18:55:23 +01001313config TARGET_HIKEY
1314 bool "Support HiKey 96boards Consumer Edition Platform"
1315 select ARM64
Peter Griffinefd7b602015-09-10 21:55:16 +01001316 select DM
1317 select DM_GPIO
Peter Griffin9c71bcd2015-09-10 21:55:17 +01001318 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001319 select GPIO_EXTRA_HEADER
Peter Griffincd593ed2016-04-20 17:13:59 +01001320 select OF_CONTROL
Alexander Grafcf2c7782018-01-25 12:05:52 +01001321 select PL01X_SERIAL
Tom Rini6f6b7cf2018-03-06 19:02:27 -05001322 select SPECIFY_CONSOLE_INDEX
Michal Simek08a00cb2018-07-23 15:55:14 +02001323 imply CMD_DM
Peter Griffin11ac2362015-07-30 18:55:23 +01001324 help
1325 Support for HiKey 96boards platform. It features a HI6220
1326 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1327
Manivannan Sadhasivamc62c7ef2019-08-02 20:40:09 +05301328config TARGET_HIKEY960
1329 bool "Support HiKey960 96boards Consumer Edition Platform"
1330 select ARM64
1331 select DM
1332 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001333 select GPIO_EXTRA_HEADER
Manivannan Sadhasivamc62c7ef2019-08-02 20:40:09 +05301334 select OF_CONTROL
1335 select PL01X_SERIAL
1336 imply CMD_DM
1337 help
1338 Support for HiKey960 96boards platform. It features a HI3660
1339 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1340
Jorge Ramirez-Ortizd7542542017-06-26 15:52:49 +02001341config TARGET_POPLAR
1342 bool "Support Poplar 96boards Enterprise Edition Platform"
1343 select ARM64
1344 select DM
Jorge Ramirez-Ortizd7542542017-06-26 15:52:49 +02001345 select DM_SERIAL
1346 select DM_USB
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001347 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +02001348 select OF_CONTROL
Alexander Grafcf2c7782018-01-25 12:05:52 +01001349 select PL01X_SERIAL
Michal Simek08a00cb2018-07-23 15:55:14 +02001350 imply CMD_DM
Jorge Ramirez-Ortizd7542542017-06-26 15:52:49 +02001351 help
1352 Support for Poplar 96boards EE platform. It features a HI3798cv200
1353 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1354 making it capable of running any commercial set-top solution based on
1355 Linux or Android.
1356
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05301357config TARGET_LS1012AQDS
1358 bool "Support ls1012aqds"
York Sun9533acf2016-09-26 08:09:26 -07001359 select ARCH_LS1012A
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05301360 select ARM64
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001361 select ARCH_SUPPORT_TFABOOT
Tom Rinie5ec4812017-01-22 19:43:11 -05001362 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001363 select GPIO_EXTRA_HEADER
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05301364 help
1365 Support for Freescale LS1012AQDS platform.
1366 The LS1012A Development System (QDS) is a high-performance
1367 development platform that supports the QorIQ LS1012A
1368 Layerscape Architecture processor.
1369
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05301370config TARGET_LS1012ARDB
1371 bool "Support ls1012ardb"
York Sun9533acf2016-09-26 08:09:26 -07001372 select ARCH_LS1012A
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05301373 select ARM64
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001374 select ARCH_SUPPORT_TFABOOT
Tom Rinie5ec4812017-01-22 19:43:11 -05001375 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001376 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001377 imply SCSI
Tuomas Tynkkynen9fd95ef2017-12-08 15:36:19 +02001378 imply SCSI_AHCI
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05301379 help
1380 Support for Freescale LS1012ARDB platform.
1381 The LS1012A Reference design board (RDB) is a high-performance
1382 development platform that supports the QorIQ LS1012A
1383 Layerscape Architecture processor.
1384
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +05301385config TARGET_LS1012A2G5RDB
1386 bool "Support ls1012a2g5rdb"
1387 select ARCH_LS1012A
1388 select ARM64
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001389 select ARCH_SUPPORT_TFABOOT
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +05301390 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001391 select GPIO_EXTRA_HEADER
Bhaskar Upadhayab0ce1872018-01-11 20:03:31 +05301392 imply SCSI
1393 help
1394 Support for Freescale LS1012A2G5RDB platform.
1395 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1396 development platform that supports the QorIQ LS1012A
1397 Layerscape Architecture processor.
1398
Bhaskar Upadhaya9629ccd2018-05-23 11:03:30 +05301399config TARGET_LS1012AFRWY
1400 bool "Support ls1012afrwy"
1401 select ARCH_LS1012A
1402 select ARM64
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001403 select ARCH_SUPPORT_TFABOOT
Michal Simek5ed063d2018-07-23 15:55:13 +02001404 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001405 select GPIO_EXTRA_HEADER
Bhaskar Upadhaya9629ccd2018-05-23 11:03:30 +05301406 imply SCSI
1407 imply SCSI_AHCI
1408 help
1409 Support for Freescale LS1012AFRWY platform.
1410 The LS1012A FRWY board (FRWY) is a high-performance
1411 development platform that supports the QorIQ LS1012A
1412 Layerscape Architecture processor.
1413
Prabhakar Kushwahaff78aa22016-06-03 18:41:36 +05301414config TARGET_LS1012AFRDM
1415 bool "Support ls1012afrdm"
York Sun9533acf2016-09-26 08:09:26 -07001416 select ARCH_LS1012A
Prabhakar Kushwahaff78aa22016-06-03 18:41:36 +05301417 select ARM64
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001418 select ARCH_SUPPORT_TFABOOT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001419 select GPIO_EXTRA_HEADER
Prabhakar Kushwahaff78aa22016-06-03 18:41:36 +05301420 help
1421 Support for Freescale LS1012AFRDM platform.
1422 The LS1012A Freedom board (FRDM) is a high-performance
1423 development platform that supports the QorIQ LS1012A
1424 Layerscape Architecture processor.
1425
Yuantian Tangf278a212019-04-10 16:43:35 +08001426config TARGET_LS1028AQDS
1427 bool "Support ls1028aqds"
1428 select ARCH_LS1028A
1429 select ARM64
1430 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001431 select ARCH_SUPPORT_TFABOOT
Yuantian Tangacf40f52019-07-02 16:16:22 +08001432 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001433 select GPIO_EXTRA_HEADER
Yuantian Tangf278a212019-04-10 16:43:35 +08001434 help
1435 Support for Freescale LS1028AQDS platform
1436 The LS1028A Development System (QDS) is a high-performance
1437 development platform that supports the QorIQ LS1028A
1438 Layerscape Architecture processor.
1439
Yuantian Tang353f36d2019-04-10 16:43:34 +08001440config TARGET_LS1028ARDB
1441 bool "Support ls1028ardb"
1442 select ARCH_LS1028A
1443 select ARM64
1444 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001445 select ARCH_SUPPORT_TFABOOT
Yuantian Tangc40ebf72020-03-09 14:10:07 +08001446 select BOARD_LATE_INIT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001447 select GPIO_EXTRA_HEADER
Yuantian Tang353f36d2019-04-10 16:43:34 +08001448 help
1449 Support for Freescale LS1028ARDB platform
1450 The LS1028A Development System (RDB) is a high-performance
1451 development platform that supports the QorIQ LS1028A
1452 Layerscape Architecture processor.
1453
Ashish Kumare84a3242017-08-31 16:12:54 +05301454config TARGET_LS1088ARDB
1455 bool "Support ls1088ardb"
1456 select ARCH_LS1088A
1457 select ARM64
1458 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001459 select ARCH_SUPPORT_TFABOOT
Ashish Kumare84a3242017-08-31 16:12:54 +05301460 select BOARD_LATE_INIT
Ashish Kumar099f4092017-11-06 13:18:43 +05301461 select SUPPORT_SPL
Rajesh Bhagat32413122019-02-01 05:22:01 +00001462 select FSL_DDR_INTERACTIVE if !SD_BOOT
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001463 select GPIO_EXTRA_HEADER
Ashish Kumare84a3242017-08-31 16:12:54 +05301464 help
1465 Support for NXP LS1088ARDB platform.
1466 The LS1088A Reference design board (RDB) is a high-performance
1467 development platform that supports the QorIQ LS1088A
1468 Layerscape Architecture processor.
1469
Wang Huan550e3dc2014-09-05 13:52:44 +08001470config TARGET_LS1021AQDS
Alison Wang0de15702014-12-03 16:18:09 +08001471 bool "Support ls1021aqds"
Michal Simek5ed063d2018-07-23 15:55:13 +02001472 select ARCH_LS1021A
1473 select ARCH_SUPPORT_PSCI
1474 select BOARD_EARLY_INIT_F
Tom Rinie5ec4812017-01-22 19:43:11 -05001475 select BOARD_LATE_INIT
Lokesh Vutlaacf15002018-04-26 18:21:26 +05301476 select CPU_V7A
Hongbo Zhangadee1d42016-09-21 18:31:04 +08001477 select CPU_V7_HAS_NONSEC
1478 select CPU_V7_HAS_VIRT
York Sun5e8bd7e2016-09-26 08:09:29 -07001479 select LS1_DEEP_SLEEP
Michal Simek5ed063d2018-07-23 15:55:13 +02001480 select SUPPORT_SPL
York Sund26e34c2016-12-28 08:43:40 -08001481 select SYS_FSL_DDR
Rajesh Bhagat32413122019-02-01 05:22:01 +00001482 select FSL_DDR_INTERACTIVE
Lukasz Majewski28964222020-06-04 23:11:52 +08001483 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001484 select GPIO_EXTRA_HEADER
Lukasz Majewski28964222020-06-04 23:11:52 +08001485 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
Simon Glassfedb4282017-06-14 21:28:21 -06001486 imply SCSI
Masahiro Yamada217f92b2016-08-30 16:22:22 +09001487
Wang Huanc8a7d9d2014-09-05 13:52:45 +08001488config TARGET_LS1021ATWR
Alison Wang0de15702014-12-03 16:18:09 +08001489 bool "Support ls1021atwr"
Michal Simek5ed063d2018-07-23 15:55:13 +02001490 select ARCH_LS1021A
1491 select ARCH_SUPPORT_PSCI
1492 select BOARD_EARLY_INIT_F
Tom Rinie5ec4812017-01-22 19:43:11 -05001493 select BOARD_LATE_INIT
Lokesh Vutlaacf15002018-04-26 18:21:26 +05301494 select CPU_V7A
Hongbo Zhangadee1d42016-09-21 18:31:04 +08001495 select CPU_V7_HAS_NONSEC
1496 select CPU_V7_HAS_VIRT
York Sun5e8bd7e2016-09-26 08:09:29 -07001497 select LS1_DEEP_SLEEP
Michal Simek5ed063d2018-07-23 15:55:13 +02001498 select SUPPORT_SPL
Lukasz Majewski28964222020-06-04 23:11:52 +08001499 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001500 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001501 imply SCSI
Wang Huanc8a7d9d2014-09-05 13:52:45 +08001502
Aleksandar Gerasimovski91ee5472021-02-22 18:18:11 +00001503config TARGET_PG_WCOM_SELI8
1504 bool "Support Hitachi-Powergrids SELI8 service unit card"
1505 select ARCH_LS1021A
1506 select ARCH_SUPPORT_PSCI
1507 select BOARD_EARLY_INIT_F
1508 select BOARD_LATE_INIT
1509 select CPU_V7A
1510 select CPU_V7_HAS_NONSEC
1511 select CPU_V7_HAS_VIRT
1512 select SYS_FSL_DDR
1513 select FSL_DDR_INTERACTIVE
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001514 select GPIO_EXTRA_HEADER
Aleksandar Gerasimovski91ee5472021-02-22 18:18:11 +00001515 select VENDOR_KM
1516 imply SCSI
1517 help
1518 Support for Hitachi-Powergrids SELI8 service unit card.
1519 SELI8 is a QorIQ LS1021a based service unit card used
1520 in XMC20 and FOX615 product families.
1521
Aleksandar Gerasimovskia7fd6fa2021-06-08 14:16:28 +00001522config TARGET_PG_WCOM_EXPU1
1523 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1524 select ARCH_LS1021A
1525 select ARCH_SUPPORT_PSCI
1526 select BOARD_EARLY_INIT_F
1527 select BOARD_LATE_INIT
1528 select CPU_V7A
1529 select CPU_V7_HAS_NONSEC
1530 select CPU_V7_HAS_VIRT
1531 select SYS_FSL_DDR
1532 select FSL_DDR_INTERACTIVE
1533 select VENDOR_KM
1534 imply SCSI
1535 help
1536 Support for Hitachi-Powergrids EXPU1 service unit card.
1537 EXPU1 is a QorIQ LS1021a based service unit card used
1538 in XMC20 and FOX615 product families.
1539
Jianchao Wang87821222019-07-19 00:30:01 +03001540config TARGET_LS1021ATSN
1541 bool "Support ls1021atsn"
1542 select ARCH_LS1021A
1543 select ARCH_SUPPORT_PSCI
1544 select BOARD_EARLY_INIT_F
1545 select BOARD_LATE_INIT
1546 select CPU_V7A
1547 select CPU_V7_HAS_NONSEC
1548 select CPU_V7_HAS_VIRT
1549 select LS1_DEEP_SLEEP
1550 select SUPPORT_SPL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001551 select GPIO_EXTRA_HEADER
Jianchao Wang87821222019-07-19 00:30:01 +03001552 imply SCSI
1553
Feng Li20c700f2016-11-03 14:15:17 +08001554config TARGET_LS1021AIOT
1555 bool "Support ls1021aiot"
Michal Simek5ed063d2018-07-23 15:55:13 +02001556 select ARCH_LS1021A
1557 select ARCH_SUPPORT_PSCI
Tom Rinie5ec4812017-01-22 19:43:11 -05001558 select BOARD_LATE_INIT
Lokesh Vutlaacf15002018-04-26 18:21:26 +05301559 select CPU_V7A
Feng Li20c700f2016-11-03 14:15:17 +08001560 select CPU_V7_HAS_NONSEC
1561 select CPU_V7_HAS_VIRT
1562 select SUPPORT_SPL
Lukasz Majewski28964222020-06-04 23:11:52 +08001563 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001564 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001565 imply SCSI
Feng Li20c700f2016-11-03 14:15:17 +08001566 help
1567 Support for Freescale LS1021AIOT platform.
1568 The LS1021A Freescale board (IOT) is a high-performance
1569 development platform that supports the QorIQ LS1021A
1570 Layerscape Architecture processor.
1571
Shaohui Xie02b5d2e2015-11-11 17:58:37 +08001572config TARGET_LS1043AQDS
1573 bool "Support ls1043aqds"
York Sun0a37cf82016-09-26 08:09:27 -07001574 select ARCH_LS1043A
Shaohui Xie02b5d2e2015-11-11 17:58:37 +08001575 select ARM64
1576 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001577 select ARCH_SUPPORT_TFABOOT
Michal Simek5ed063d2018-07-23 15:55:13 +02001578 select BOARD_EARLY_INIT_F
Tom Rinie5ec4812017-01-22 19:43:11 -05001579 select BOARD_LATE_INIT
Shaohui Xie02b5d2e2015-11-11 17:58:37 +08001580 select SUPPORT_SPL
Rajesh Bhagat32413122019-02-01 05:22:01 +00001581 select FSL_DDR_INTERACTIVE if !SPL
Lukasz Majewski044a66c2020-06-04 23:11:51 +08001582 select FSL_DSPI if !SPL_NO_DSPI
1583 select DM_SPI_FLASH if FSL_DSPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001584 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001585 imply SCSI
Peng Maf11e4922019-01-30 19:11:49 +08001586 imply SCSI_AHCI
Shaohui Xie02b5d2e2015-11-11 17:58:37 +08001587 help
1588 Support for Freescale LS1043AQDS platform.
1589
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08001590config TARGET_LS1043ARDB
1591 bool "Support ls1043ardb"
York Sun0a37cf82016-09-26 08:09:27 -07001592 select ARCH_LS1043A
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08001593 select ARM64
Hou Zhiqiang831c0682015-10-26 19:47:57 +08001594 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001595 select ARCH_SUPPORT_TFABOOT
Michal Simek5ed063d2018-07-23 15:55:13 +02001596 select BOARD_EARLY_INIT_F
Tom Rinie5ec4812017-01-22 19:43:11 -05001597 select BOARD_LATE_INIT
Gong Qianyu3ad44722015-10-26 19:47:53 +08001598 select SUPPORT_SPL
Lukasz Majewski044a66c2020-06-04 23:11:51 +08001599 select FSL_DSPI if !SPL_NO_DSPI
1600 select DM_SPI_FLASH if FSL_DSPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001601 select GPIO_EXTRA_HEADER
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08001602 help
1603 Support for Freescale LS1043ARDB platform.
1604
Shaohui Xie126fe702016-09-07 17:56:14 +08001605config TARGET_LS1046AQDS
1606 bool "Support ls1046aqds"
York Sunda28e582016-09-26 08:09:24 -07001607 select ARCH_LS1046A
Shaohui Xie126fe702016-09-07 17:56:14 +08001608 select ARM64
1609 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001610 select ARCH_SUPPORT_TFABOOT
Simon Glassa5d67542017-01-23 13:31:20 -07001611 select BOARD_EARLY_INIT_F
Michal Simek5ed063d2018-07-23 15:55:13 +02001612 select BOARD_LATE_INIT
1613 select DM_SPI_FLASH if DM_SPI
1614 select SUPPORT_SPL
Rajesh Bhagat32413122019-02-01 05:22:01 +00001615 select FSL_DDR_BIST if !SPL
1616 select FSL_DDR_INTERACTIVE if !SPL
1617 select FSL_DDR_INTERACTIVE if !SPL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001618 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001619 imply SCSI
Shaohui Xie126fe702016-09-07 17:56:14 +08001620 help
1621 Support for Freescale LS1046AQDS platform.
1622 The LS1046A Development System (QDS) is a high-performance
1623 development platform that supports the QorIQ LS1046A
1624 Layerscape Architecture processor.
1625
Mingkai Hudd029362016-09-07 18:47:28 +08001626config TARGET_LS1046ARDB
1627 bool "Support ls1046ardb"
York Sunda28e582016-09-26 08:09:24 -07001628 select ARCH_LS1046A
Mingkai Hudd029362016-09-07 18:47:28 +08001629 select ARM64
1630 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001631 select ARCH_SUPPORT_TFABOOT
Michal Simek5ed063d2018-07-23 15:55:13 +02001632 select BOARD_EARLY_INIT_F
Tom Rinie5ec4812017-01-22 19:43:11 -05001633 select BOARD_LATE_INIT
Mingkai Hudd029362016-09-07 18:47:28 +08001634 select DM_SPI_FLASH if DM_SPI
Hou Zhiqiangdccef2e2016-12-09 16:09:01 +08001635 select POWER_MC34VR500
Michal Simek5ed063d2018-07-23 15:55:13 +02001636 select SUPPORT_SPL
Rajesh Bhagat32413122019-02-01 05:22:01 +00001637 select FSL_DDR_BIST
1638 select FSL_DDR_INTERACTIVE if !SPL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001639 select GPIO_EXTRA_HEADER
Simon Glassfedb4282017-06-14 21:28:21 -06001640 imply SCSI
Mingkai Hudd029362016-09-07 18:47:28 +08001641 help
1642 Support for Freescale LS1046ARDB platform.
1643 The LS1046A Reference Design Board (RDB) is a high-performance
1644 development platform that supports the QorIQ LS1046A
1645 Layerscape Architecture processor.
1646
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +00001647config TARGET_LS1046AFRWY
1648 bool "Support ls1046afrwy"
1649 select ARCH_LS1046A
1650 select ARM64
1651 select ARMV8_MULTIENTRY
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001652 select ARCH_SUPPORT_TFABOOT
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +00001653 select BOARD_EARLY_INIT_F
1654 select BOARD_LATE_INIT
1655 select DM_SPI_FLASH if DM_SPI
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001656 select GPIO_EXTRA_HEADER
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +00001657 imply SCSI
1658 help
1659 Support for Freescale LS1046AFRWY platform.
1660 The LS1046A Freeway Board (FRWY) is a high-performance
1661 development platform that supports the QorIQ LS1046A
1662 Layerscape Architecture processor.
Masahiro Yamadadd840582014-07-30 14:08:14 +09001663
Michael Walle4ceb5c62020-10-15 23:08:57 +02001664config TARGET_SL28
1665 bool "Support sl28"
1666 select ARCH_LS1028A
1667 select ARM64
1668 select ARMV8_MULTIENTRY
1669 select SUPPORT_SPL
1670 select BINMAN
Michael Walle356a3382021-03-26 19:40:57 +01001671 select DM
1672 select DM_GPIO
1673 select DM_I2C
1674 select DM_MMC
1675 select DM_SPI_FLASH
1676 select DM_ETH
1677 select DM_MDIO
1678 select DM_PCI
1679 select DM_RNG
1680 select DM_RTC
1681 select DM_SCSI
Michael Walle6d1ab4a2021-03-26 19:40:58 +01001682 select DM_SERIAL
Michael Walle356a3382021-03-26 19:40:57 +01001683 select DM_SPI
1684 select DM_USB
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001685 select GPIO_EXTRA_HEADER
Michael Walle356a3382021-03-26 19:40:57 +01001686 select SPL_DM if SPL
1687 select SPL_DM_SPI if SPL
1688 select SPL_DM_SPI_FLASH if SPL
1689 select SPL_DM_I2C if SPL
1690 select SPL_DM_MMC if SPL
1691 select SPL_DM_SERIAL if SPL
Michael Walle4ceb5c62020-10-15 23:08:57 +02001692 help
1693 Support for Kontron SMARC-sAL28 board.
1694
Masahiro Yamadadd840582014-07-30 14:08:14 +09001695config TARGET_COLIBRI_PXA270
1696 bool "Support colibri_pxa270"
Georges Savoundararadj2e07c242014-10-28 23:16:09 +01001697 select CPU_PXA
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001698 select GPIO_EXTRA_HEADER
Masahiro Yamadadd840582014-07-30 14:08:14 +09001699
Masahiro Yamada66cba042014-10-03 19:21:07 +09001700config ARCH_UNIPHIER
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +09001701 bool "Socionext UniPhier SoCs"
Tom Rinie5ec4812017-01-22 19:43:11 -05001702 select BOARD_LATE_INIT
Masahiro Yamada4e819952015-03-31 12:47:54 +09001703 select DM
Masahiro Yamada15171262020-05-07 22:11:19 +09001704 select DM_ETH
Masahiro Yamadab800cbd2016-02-16 17:03:50 +09001705 select DM_GPIO
Masahiro Yamada4e819952015-03-31 12:47:54 +09001706 select DM_I2C
Masahiro Yamada4aceb3f2016-02-18 19:52:49 +09001707 select DM_MMC
Masahiro Yamada407b01b2020-01-30 22:07:59 +09001708 select DM_MTD
Masahiro Yamada4fb96c42016-10-08 13:25:31 +09001709 select DM_RESET
Masahiro Yamadab5550e42016-09-14 01:05:59 +09001710 select DM_SERIAL
Masahiro Yamada47a79f62016-09-14 01:06:00 +09001711 select DM_USB
Masahiro Yamada65fce762018-07-19 16:28:25 +09001712 select OF_BOARD_SETUP
Masahiro Yamadab5550e42016-09-14 01:05:59 +09001713 select OF_CONTROL
1714 select OF_LIBFDT
Masahiro Yamada27350c92016-09-17 03:33:01 +09001715 select PINCTRL
Ley Foon Tan0680f1b2017-05-03 17:13:32 +08001716 select SPL_BOARD_INIT if SPL
Masahiro Yamada561ca642017-01-21 18:05:22 +09001717 select SPL_DM if SPL
1718 select SPL_LIBCOMMON_SUPPORT if SPL
1719 select SPL_LIBGENERIC_SUPPORT if SPL
1720 select SPL_OF_CONTROL if SPL
1721 select SPL_PINCTRL if SPL
Masahiro Yamadab5550e42016-09-14 01:05:59 +09001722 select SUPPORT_SPL
Michal Simek08a00cb2018-07-23 15:55:14 +02001723 imply CMD_DM
Masahiro Yamada7ef5b1e2018-07-20 21:47:18 +09001724 imply DISTRO_DEFAULTS
Tom Rini91d27a12017-06-02 11:03:50 -04001725 imply FAT_WRITE
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +09001726 help
1727 Support for UniPhier SoC family developed by Socionext Inc.
1728 (formerly, System LSI Business Division of Panasonic Corporation)
Masahiro Yamada66cba042014-10-03 19:21:07 +09001729
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +09001730config ARCH_SYNQUACER
1731 bool "Socionext SynQuacer SoCs"
1732 select ARM64
1733 select DM
1734 select GIC_V3
1735 select PSCI_RESET
1736 select SYSRESET
1737 select SYSRESET_PSCI
1738 select OF_CONTROL
1739 help
1740 Support for SynQuacer SoC family developed by Socionext Inc.
1741 This SoC is used on 96boards EE DeveloperBox.
1742
Trevor Woerner71f63542020-05-06 08:02:42 -04001743config ARCH_STM32
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001744 bool "Support STMicroelectronics STM32 MCU with cortex M"
rev13@wp.pled09a552015-03-01 12:44:42 +01001745 select CPU_V7M
Kamil Lulko66562412015-12-01 09:08:19 +01001746 select DM
1747 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001748 select GPIO_EXTRA_HEADER
Michal Simek08a00cb2018-07-23 15:55:14 +02001749 imply CMD_DM
rev13@wp.pled09a552015-03-01 12:44:42 +01001750
Patrice Chotard94e9a4e2017-02-21 13:37:04 +01001751config ARCH_STI
1752 bool "Support STMicrolectronics SoCs"
Michal Simek5ed063d2018-07-23 15:55:13 +02001753 select BLK
Lokesh Vutlaacf15002018-04-26 18:21:26 +05301754 select CPU_V7A
Patrice Chotard214a17e2017-02-21 13:37:07 +01001755 select DM
Patrice Chotardeee20f82017-02-21 13:37:09 +01001756 select DM_MMC
Patrice Chotard584861f2017-03-22 10:54:03 +01001757 select DM_RESET
Michal Simek5ed063d2018-07-23 15:55:13 +02001758 select DM_SERIAL
Michal Simek08a00cb2018-07-23 15:55:14 +02001759 imply CMD_DM
Patrice Chotard94e9a4e2017-02-21 13:37:04 +01001760 help
1761 Support for STMicroelectronics STiH407/10 SoC family.
1762 This SoC is used on Linaro 96Board STiH410-B2260
1763
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001764config ARCH_STM32MP
1765 bool "Support STMicroelectronics STM32MP Socs with cortex A"
Patrick Delaunay08772f62018-03-20 10:54:53 +01001766 select ARCH_MISC_INIT
Patrick Delaunay654706b2020-04-01 09:07:33 +02001767 select ARCH_SUPPORT_TFABOOT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001768 select BOARD_LATE_INIT
1769 select CLK
1770 select DM
1771 select DM_GPIO
1772 select DM_RESET
1773 select DM_SERIAL
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001774 select GPIO_EXTRA_HEADER
Michal Simek5ed063d2018-07-23 15:55:13 +02001775 select MISC
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001776 select OF_CONTROL
1777 select OF_LIBFDT
Patrick Delaunay05d36932019-07-05 17:20:14 +02001778 select OF_SYSTEM_SETUP
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001779 select PINCTRL
1780 select REGMAP
1781 select SUPPORT_SPL
1782 select SYSCON
Patrick Delaunay86634a92018-03-20 14:15:06 +01001783 select SYSRESET
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001784 select SYS_THUMB_BUILD
Kever Yang09259fc2019-04-02 20:41:25 +08001785 imply SPL_SYSRESET
Michal Simek08a00cb2018-07-23 15:55:14 +02001786 imply CMD_DM
Patrick Delaunayc16cc4f2019-04-12 11:55:46 +02001787 imply CMD_POWEROFF
Patrick Delaunayf2193612019-07-30 19:16:28 +02001788 imply OF_LIBFDT_OVERLAY
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +01001789 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
Patrick Delaunayce3772c2019-04-18 17:32:38 +02001790 imply USE_PREBOOT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001791 help
1792 Support for STM32MP SoC family developed by STMicroelectronics,
1793 MPUs based on ARM cortex A core
Patrick Delaunayabf26782019-02-12 11:44:39 +01001794 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1795 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1796 chain.
1797 SPL is the unsecure FSBL for the basic boot chain.
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001798
Simon Glass2444dae2015-08-30 16:55:38 -06001799config ARCH_ROCKCHIP
1800 bool "Support Rockchip SoCs"
Simon Glassaa150382016-06-12 23:30:14 -06001801 select BLK
Kever Yang7a9c5742020-11-10 11:43:32 +08001802 select BINMAN if SPL_OPTEE
Simon Glass2444dae2015-08-30 16:55:38 -06001803 select DM
Simon Glassaa150382016-06-12 23:30:14 -06001804 select DM_GPIO
1805 select DM_I2C
1806 select DM_MMC
Michal Simek5ed063d2018-07-23 15:55:13 +02001807 select DM_PWM
1808 select DM_REGULATOR
Simon Glassaa150382016-06-12 23:30:14 -06001809 select DM_SERIAL
1810 select DM_SPI
1811 select DM_SPI_FLASH
MengDongyang892742d2016-08-24 12:02:18 +08001812 select DM_USB if USB
Philipp Tomsich14ad6eb2017-10-10 16:21:03 +02001813 select ENABLE_ARM_SOC_BOOT0_HOOK
Michal Simek5ed063d2018-07-23 15:55:13 +02001814 select OF_CONTROL
Adam Fordf1b1f772018-04-15 13:51:26 -04001815 select SPI
Michal Simek5ed063d2018-07-23 15:55:13 +02001816 select SPL_DM if SPL
Lukasz Majewski56c40462020-06-04 23:11:53 +08001817 select SPL_DM_SPI if SPL
1818 select SPL_DM_SPI_FLASH if SPL
Michal Simek5ed063d2018-07-23 15:55:13 +02001819 select SYS_MALLOC_F
1820 select SYS_THUMB_BUILD if !ARM64
1821 imply ADC
Michal Simek08a00cb2018-07-23 15:55:14 +02001822 imply CMD_DM
Kever Yangb0a569d2019-03-29 09:08:58 +08001823 imply DEBUG_UART_BOARD_INIT
Masahiro Yamada7325f6c2018-04-25 18:47:52 +09001824 imply DISTRO_DEFAULTS
Tom Rini91d27a12017-06-02 11:03:50 -04001825 imply FAT_WRITE
Philipp Tomsich8e8bccc2017-09-20 13:50:13 +02001826 imply SARADC_ROCKCHIP
Michal Simek5ed063d2018-07-23 15:55:13 +02001827 imply SPL_SYSRESET
Thomas Hebb64eff472019-11-15 08:48:57 -08001828 imply SPL_SYS_MALLOC_SIMPLE
Kever Yangc3c03312018-04-19 11:37:09 +08001829 imply SYS_NS16550
Michal Simek5ed063d2018-07-23 15:55:13 +02001830 imply TPL_SYSRESET
1831 imply USB_FUNCTION_FASTBOOT
Simon Glass2444dae2015-08-30 16:55:38 -06001832
Suneel Garapati03c22882019-10-19 18:37:55 -07001833config ARCH_OCTEONTX
1834 bool "Support OcteonTX SoCs"
Stefan Roese7a780742020-09-23 11:01:30 +02001835 select CLK
Suneel Garapati03c22882019-10-19 18:37:55 -07001836 select DM
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001837 select GPIO_EXTRA_HEADER
Suneel Garapati03c22882019-10-19 18:37:55 -07001838 select ARM64
1839 select OF_CONTROL
1840 select OF_LIVE
1841 select BOARD_LATE_INIT
1842 select SYS_CACHE_SHIFT_7
Suneel Garapati0a668f62019-10-19 18:47:37 -07001843
1844config ARCH_OCTEONTX2
1845 bool "Support OcteonTX2 SoCs"
Stefan Roese7a780742020-09-23 11:01:30 +02001846 select CLK
Suneel Garapati0a668f62019-10-19 18:47:37 -07001847 select DM
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001848 select GPIO_EXTRA_HEADER
Suneel Garapati0a668f62019-10-19 18:47:37 -07001849 select ARM64
1850 select OF_CONTROL
1851 select OF_LIVE
1852 select BOARD_LATE_INIT
1853 select SYS_CACHE_SHIFT_7
1854
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07001855config TARGET_THUNDERX_88XX
1856 bool "Support ThunderX 88xx"
Marek Vasutb4ba1692016-06-01 02:33:53 +02001857 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001858 select GPIO_EXTRA_HEADER
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07001859 select OF_CONTROL
Alexander Grafcf2c7782018-01-25 12:05:52 +01001860 select PL01X_SERIAL
Michal Simek5ed063d2018-07-23 15:55:13 +02001861 select SYS_CACHE_SHIFT_7
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07001862
maxims@google.com4697abe2017-01-18 13:44:55 -08001863config ARCH_ASPEED
1864 bool "Support Aspeed SoCs"
maxims@google.com4697abe2017-01-18 13:44:55 -08001865 select DM
Michal Simek5ed063d2018-07-23 15:55:13 +02001866 select OF_CONTROL
Michal Simek08a00cb2018-07-23 15:55:14 +02001867 imply CMD_DM
maxims@google.com4697abe2017-01-18 13:44:55 -08001868
liu haoe3aafef2019-10-31 07:51:08 +00001869config TARGET_DURIAN
1870 bool "Support Phytium Durian Platform"
1871 select ARM64
Masami Hiramatsu7a672052021-06-04 18:43:55 +09001872 select GPIO_EXTRA_HEADER
liu haoe3aafef2019-10-31 07:51:08 +00001873 help
1874 Support for durian platform.
1875 It has 2GB Sdram, uart and pcie.
1876
Alex Nemirovsky7d706a82020-01-30 12:34:59 -08001877config TARGET_PRESIDIO_ASIC
1878 bool "Support Cortina Presidio ASIC Platform"
1879 select ARM64
1880
Andrii Anisov770a8ee2020-08-06 12:42:47 +03001881config TARGET_XENGUEST_ARM64
1882 bool "Xen guest ARM64"
1883 select ARM64
1884 select XEN
1885 select OF_CONTROL
1886 select LINUX_KERNEL_IMAGE_HEADER
Peng Fan384d5cf2020-08-06 12:42:50 +03001887 select XEN_SERIAL
Oleksandr Andrushchenko60e49ff2020-08-06 12:42:53 +03001888 select SSCANF
Masahiro Yamadadd840582014-07-30 14:08:14 +09001889endchoice
1890
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001891config ARCH_SUPPORT_TFABOOT
1892 bool
1893
1894config TFABOOT
1895 bool "Support for booting from TF-A"
1896 depends on ARCH_SUPPORT_TFABOOT
1897 default n
1898 help
Andre Przywaracee2e022020-09-30 15:45:07 +01001899 Some platforms support the setup of secure registers (for instance
1900 for CPU errata handling) or provide secure services like PSCI.
1901 Those services could also be provided by other firmware parts
1902 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1903 does not need to (and cannot) execute this code.
1904 Enabling this option will make a U-Boot binary that is relying
1905 on other firmware layers to provide secure functionality.
AKASHI Takahiro6324d502019-07-03 10:44:39 +09001906
Andrew F. Davis5fbed8f2018-02-14 11:53:37 -06001907config TI_SECURE_DEVICE
1908 bool "HS Device Type Support"
Andrew F. Davis3a543a82019-04-12 12:54:45 -04001909 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
Andrew F. Davis5fbed8f2018-02-14 11:53:37 -06001910 help
1911 If a high secure (HS) device type is being used, this config
1912 must be set. This option impacts various aspects of the
1913 build system (to create signed boot images that can be
1914 authenticated) and the code. See the doc/README.ti-secure
1915 file for further details.
1916
Tom Rini9c4b0132019-03-19 07:14:37 -04001917if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1918config ISW_ENTRY_ADDR
1919 hex "Address in memory or XIP address of bootloader entry point"
1920 default 0x402F4000 if AM43XX
1921 default 0x402F0400 if AM33XX
1922 default 0x40301350 if OMAP54XX
1923 help
1924 After any reset, the boot ROM searches the boot media for a valid
1925 boot image. For non-XIP devices, the ROM then copies the image into
1926 internal memory. For all boot modes, after the ROM processes the
1927 boot image it eventually computes the entry point address depending
1928 on the device type (secure/non-secure), boot media (xip/non-xip) and
1929 image headers.
1930endif
1931
maxims@google.com4697abe2017-01-18 13:44:55 -08001932source "arch/arm/mach-aspeed/Kconfig"
1933
Masahiro Yamada4614b892015-02-20 17:04:01 +09001934source "arch/arm/mach-at91/Kconfig"
1935
Masahiro Yamadaddf6bd42015-03-19 19:42:56 +09001936source "arch/arm/mach-bcm283x/Kconfig"
Masahiro Yamada3491ba62014-08-31 07:11:01 +09001937
Thomas Fitzsimmons894c3ad2018-06-08 17:59:45 -04001938source "arch/arm/mach-bcmstb/Kconfig"
1939
Masahiro Yamadaddf6bd42015-03-19 19:42:56 +09001940source "arch/arm/mach-davinci/Kconfig"
Simon Glass34e609c2015-02-05 21:41:39 -07001941
Thomas Abraham77b55e82015-08-03 17:58:00 +05301942source "arch/arm/mach-exynos/Kconfig"
Masahiro Yamada72df68c2014-08-31 07:11:00 +09001943
Masahiro Yamada72a8ff42015-02-20 17:04:08 +09001944source "arch/arm/mach-highbank/Kconfig"
Masahiro Yamadaef2b6942014-08-31 07:11:07 +09001945
Masahiro Yamada5cbbd9b2015-04-21 21:59:36 +09001946source "arch/arm/mach-integrator/Kconfig"
1947
Robert Markoe479a7d2020-07-06 10:37:54 +02001948source "arch/arm/mach-ipq40xx/Kconfig"
1949
Lokesh Vutla586bde92018-08-27 15:57:08 +05301950source "arch/arm/mach-k3/Kconfig"
1951
Masahiro Yamada39a72342015-02-20 17:04:11 +09001952source "arch/arm/mach-keystone/Kconfig"
Masahiro Yamadac338f092014-08-31 07:11:05 +09001953
Masahiro Yamada56f86e32015-02-20 17:04:06 +09001954source "arch/arm/mach-kirkwood/Kconfig"
Masahiro Yamada47539e22014-08-31 07:10:59 +09001955
Trevor Woernerb3d9a8b2020-05-06 08:02:36 -04001956source "arch/arm/mach-lpc32xx/Kconfig"
Vladimir Zapolskiyee54dfe2018-09-17 21:43:03 +03001957
Stefan Roesec3d89142015-08-25 13:18:38 +02001958source "arch/arm/mach-mvebu/Kconfig"
1959
Suneel Garapati03c22882019-10-19 18:37:55 -07001960source "arch/arm/mach-octeontx/Kconfig"
Suneel Garapati0a668f62019-10-19 18:47:37 -07001961
1962source "arch/arm/mach-octeontx2/Kconfig"
1963
York Sun0a37cf82016-09-26 08:09:27 -07001964source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1965
Fabio Estevam07df6972017-11-03 13:40:08 -02001966source "arch/arm/mach-imx/mx2/Kconfig"
1967
Magnus Lilja3159ec62018-05-11 14:06:54 +02001968source "arch/arm/mach-imx/mx3/Kconfig"
1969
Peng Fan7a7391f2018-01-10 13:20:19 +08001970source "arch/arm/mach-imx/mx5/Kconfig"
Adrian Alonso1a8150d2015-09-03 11:49:28 -05001971
Stefano Babic552a8482017-06-29 10:16:06 +02001972source "arch/arm/mach-imx/mx6/Kconfig"
Boris BREZILLON89ebc822015-03-04 13:13:03 +01001973
Peng Fan7a7391f2018-01-10 13:20:19 +08001974source "arch/arm/mach-imx/mx7/Kconfig"
1975
1976source "arch/arm/mach-imx/mx7ulp/Kconfig"
1977
Peng Fanb2b8b9b2018-10-18 14:28:08 +02001978source "arch/arm/mach-imx/imx8/Kconfig"
1979
Peng Fancd357ad2018-11-20 10:19:25 +00001980source "arch/arm/mach-imx/imx8m/Kconfig"
Andrej Rosano424ee3d2015-04-08 18:56:29 +02001981
Giulio Benetti77eb9a92020-01-10 15:51:47 +01001982source "arch/arm/mach-imx/imxrt/Kconfig"
1983
Stefan Agnerc5343d42018-02-06 09:44:34 +01001984source "arch/arm/mach-imx/mxs/Kconfig"
1985
Tom Rini983e3702016-11-07 21:34:54 -05001986source "arch/arm/mach-omap2/Kconfig"
Madan Srinivas63847262016-05-19 19:10:43 -05001987
York Sunda28e582016-09-26 08:09:24 -07001988source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1989
Masahiro Yamada3e93b4e2015-02-20 17:04:09 +09001990source "arch/arm/mach-orion5x/Kconfig"
Masahiro Yamada22f2be72014-08-31 07:11:06 +09001991
Manivannan Sadhasivam97775d22018-06-14 23:38:31 +05301992source "arch/arm/mach-owl/Kconfig"
1993
Nobuhiro Iwamatsubadbb632015-10-09 16:40:09 +09001994source "arch/arm/mach-rmobile/Kconfig"
Masahiro Yamadaf40b9892014-08-31 07:10:57 +09001995
Beniamino Galvanibfcef282016-05-08 08:30:16 +02001996source "arch/arm/mach-meson/Kconfig"
1997
Ryder Leecbd2fba2018-11-15 10:07:52 +08001998source "arch/arm/mach-mediatek/Kconfig"
1999
Tuomas Tynkkynen32f11822017-09-19 23:18:07 +03002000source "arch/arm/mach-qemu/Kconfig"
2001
Simon Glass2444dae2015-08-30 16:55:38 -06002002source "arch/arm/mach-rockchip/Kconfig"
2003
Minkyu Kang225f5ee2015-11-20 15:24:57 +09002004source "arch/arm/mach-s5pc1xx/Kconfig"
Simon Glass311757b2014-10-07 22:01:50 -06002005
Mateusz Kulikowski08592132016-03-31 23:12:32 +02002006source "arch/arm/mach-snapdragon/Kconfig"
2007
Masahiro Yamada7865f4b2015-04-21 20:38:20 +09002008source "arch/arm/mach-socfpga/Kconfig"
2009
Patrice Chotard94e9a4e2017-02-21 13:37:04 +01002010source "arch/arm/mach-sti/Kconfig"
2011
Vikas Manocha0a61ee82016-01-15 17:49:06 -08002012source "arch/arm/mach-stm32/Kconfig"
2013
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01002014source "arch/arm/mach-stm32mp/Kconfig"
2015
Masahiro Yamada3abfd882017-04-28 19:42:18 +09002016source "arch/arm/mach-sunxi/Kconfig"
2017
Masahiro Yamada09f455d2015-02-20 17:04:04 +09002018source "arch/arm/mach-tegra/Kconfig"
Masahiro Yamadaddd960e2014-08-31 07:10:56 +09002019
Stephan Gerhold689088f2020-01-04 18:45:17 +01002020source "arch/arm/mach-u8500/Kconfig"
2021
Masahiro Yamada4c425572015-02-27 02:26:42 +09002022source "arch/arm/mach-uniphier/Kconfig"
Masahiro Yamada66cba042014-10-03 19:21:07 +09002023
Stefan Agner7966b432017-03-13 18:41:36 -07002024source "arch/arm/cpu/armv7/vf610/Kconfig"
2025
Masahiro Yamada0107f242015-03-16 16:43:22 +09002026source "arch/arm/mach-zynq/Kconfig"
Masahiro Yamadaddd960e2014-08-31 07:10:56 +09002027
Michal Simek274ccb52019-01-17 08:22:43 +01002028source "arch/arm/mach-zynqmp/Kconfig"
2029
Michal Simekec48b6c2018-08-22 14:55:27 +02002030source "arch/arm/mach-versal/Kconfig"
2031
Michal Simek1d6c54e2018-04-12 17:39:46 +02002032source "arch/arm/mach-zynqmp-r5/Kconfig"
2033
Hans de Goedeea624e12014-11-14 09:34:30 +01002034source "arch/arm/cpu/armv7/Kconfig"
2035
Linus Walleij23b58772015-03-09 10:53:21 +01002036source "arch/arm/cpu/armv8/Kconfig"
2037
Stefano Babic552a8482017-06-29 10:16:06 +02002038source "arch/arm/mach-imx/Kconfig"
Boris BREZILLONa05a6042015-03-04 13:13:04 +01002039
Stefan Bosch95e9a8e2020-07-10 19:07:26 +02002040source "arch/arm/mach-nexell/Kconfig"
2041
Usama Arif565add12020-08-12 16:12:53 +01002042source "board/armltd/total_compute/Kconfig"
2043
Heiko Schocherd8ccbe92016-06-07 08:31:25 +02002044source "board/bosch/shc/Kconfig"
Sjoerd Simons45123802019-02-25 15:33:00 +00002045source "board/bosch/guardian/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +09002046source "board/CarMediaLab/flea3/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +09002047source "board/Marvell/aspenite/Kconfig"
Suneel Garapati03c22882019-10-19 18:37:55 -07002048source "board/Marvell/octeontx/Kconfig"
Suneel Garapati0a668f62019-10-19 18:47:37 -07002049source "board/Marvell/octeontx2/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +09002050source "board/armltd/vexpress64/Kconfig"
Alex Nemirovsky7d706a82020-01-30 12:34:59 -08002051source "board/cortina/presidio-asic/Kconfig"
Philippe Reynesbe2fc082019-01-31 18:57:36 +01002052source "board/broadcom/bcm963158/Kconfig"
Philippe Reynes645b7ec2020-01-07 20:14:17 +01002053source "board/broadcom/bcm968360bg/Kconfig"
Philippe Reynes40b59b02018-10-11 18:31:58 +02002054source "board/broadcom/bcm968580xref/Kconfig"
Rayagonda Kokatanur291635a2020-07-15 22:48:55 +05302055source "board/broadcom/bcmns3/Kconfig"
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07002056source "board/cavium/thunderx/Kconfig"
Felix Brack85ab0452018-01-23 18:27:22 +01002057source "board/eets/pdu001/Kconfig"
Bin Meng6f332762018-10-15 02:21:18 -07002058source "board/emulation/qemu-arm/Kconfig"
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05302059source "board/freescale/ls2080aqds/Kconfig"
2060source "board/freescale/ls2080ardb/Kconfig"
Ashish Kumare84a3242017-08-31 16:12:54 +05302061source "board/freescale/ls1088a/Kconfig"
Yuantian Tang353f36d2019-04-10 16:43:34 +08002062source "board/freescale/ls1028a/Kconfig"
Wang Huan550e3dc2014-09-05 13:52:44 +08002063source "board/freescale/ls1021aqds/Kconfig"
Shaohui Xie02b5d2e2015-11-11 17:58:37 +08002064source "board/freescale/ls1043aqds/Kconfig"
Wang Huanc8a7d9d2014-09-05 13:52:45 +08002065source "board/freescale/ls1021atwr/Kconfig"
Jianchao Wang87821222019-07-19 00:30:01 +03002066source "board/freescale/ls1021atsn/Kconfig"
Feng Li20c700f2016-11-03 14:15:17 +08002067source "board/freescale/ls1021aiot/Kconfig"
Shaohui Xie126fe702016-09-07 17:56:14 +08002068source "board/freescale/ls1046aqds/Kconfig"
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08002069source "board/freescale/ls1043ardb/Kconfig"
Mingkai Hudd029362016-09-07 18:47:28 +08002070source "board/freescale/ls1046ardb/Kconfig"
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +00002071source "board/freescale/ls1046afrwy/Kconfig"
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05302072source "board/freescale/ls1012aqds/Kconfig"
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05302073source "board/freescale/ls1012ardb/Kconfig"
Prabhakar Kushwahaff78aa22016-06-03 18:41:36 +05302074source "board/freescale/ls1012afrdm/Kconfig"
Priyanka Jain58c3e622018-11-28 13:04:27 +00002075source "board/freescale/lx2160a/Kconfig"
Marcin Niestrojab38bf62017-01-25 09:53:08 +01002076source "board/grinn/chiliboard/Kconfig"
Tom Rini345243e2015-09-02 15:32:20 -04002077source "board/hisilicon/hikey/Kconfig"
Manivannan Sadhasivamc62c7ef2019-08-02 20:40:09 +05302078source "board/hisilicon/hikey960/Kconfig"
Jorge Ramirez-Ortizd7542542017-06-26 15:52:49 +02002079source "board/hisilicon/poplar/Kconfig"
Ladislav Michla96c08f2017-04-01 17:17:16 +02002080source "board/isee/igep003x/Kconfig"
Michael Walle4ceb5c62020-10-15 23:08:57 +02002081source "board/kontron/sl28/Kconfig"
Parthiban Nallathambi10e959a2020-07-27 16:48:41 +02002082source "board/myir/mys_6ulx/Kconfig"
Navin Sankar Velliangiria3a0bc82021-05-18 09:03:20 +05302083source "board/seeed/npi_imx6ull/Kconfig"
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +09002084source "board/socionext/developerbox/Kconfig"
Vikas Manocha9fa32b12014-11-18 10:42:22 -08002085source "board/st/stv0991/Kconfig"
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +02002086source "board/tcl/sl50/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +09002087source "board/toradex/colibri_pxa270/Kconfig"
Parthiban Nallathambid8d33b62019-04-18 00:04:09 +02002088source "board/variscite/dart_6ul/Kconfig"
Yegor Yefremov6ce89322015-05-29 19:27:29 +02002089source "board/vscom/baltos/Kconfig"
liu haoe3aafef2019-10-31 07:51:08 +00002090source "board/phytium/durian/Kconfig"
Andrii Anisov770a8ee2020-08-06 12:42:47 +03002091source "board/xen/xenguest_arm64/Kconfig"
Aleksandar Gerasimovski91ee5472021-02-22 18:18:11 +00002092source "board/keymile/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +09002093
Masahiro Yamada51b17d42014-09-01 11:06:34 +09002094source "arch/arm/Kconfig.debug"
2095
Masahiro Yamadadd840582014-07-30 14:08:14 +09002096endmenu
Philipp Tomsichb5299932017-08-03 23:23:55 +02002097
2098config SPL_LDSCRIPT
Michal Simek6e7bdde2018-07-23 15:55:12 +02002099 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2100 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
Philipp Tomsichb5299932017-08-03 23:23:55 +02002101 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64