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Lokesh Vutla00b34e92018-11-02 19:51:09 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-am654.dtsi"
9#include "k3-am654-base-board-u-boot.dtsi"
James Doublesind5e08fd2019-10-07 14:04:25 +053010#include "k3-am654-base-board-ddr4-1600MTs.dtsi"
Lokesh Vutla00b34e92018-11-02 19:51:09 +053011#include "k3-am654-ddr.dtsi"
12
13/ {
14 compatible = "ti,am654-evm", "ti,am654";
15 model = "Texas Instruments AM654 R5 Base Board";
16
17 aliases {
18 serial0 = &wkup_uart0;
Andreas Dannenberg20a22962019-08-15 15:55:30 -050019 serial1 = &mcu_uart0;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053020 serial2 = &main_uart0;
21 };
22
23 chosen {
24 stdout-path = "serial2:115200n8";
25 tick-timer = &timer1;
26 };
27
28 aliases {
29 remoteproc0 = &sysctrler;
30 remoteproc1 = &a53_0;
31 };
32
33 a53_0: a53@0 {
34 compatible = "ti,am654-rproc";
35 reg = <0x0 0x00a90000 0x0 0x10>;
Lokesh Vutla355be912019-06-07 19:24:47 +053036 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
37 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053038 resets = <&k3_reset 202 0>;
39 assigned-clocks = <&k3_clks 202 0>;
40 assigned-clock-rates = <800000000>;
41 ti,sci = <&dmsc>;
42 ti,sci-proc-id = <32>;
43 ti,sci-host-id = <10>;
44 u-boot,dm-spl;
45 };
46
47 vtt_supply: vtt_supply {
48 compatible = "regulator-gpio";
49 regulator-name = "vtt";
50 regulator-min-microvolt = <0>;
51 regulator-max-microvolt = <3300000>;
52 gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
53 states = <0 0x0 3300000 0x1>;
54 u-boot,dm-spl;
55 };
56};
57
58&cbass_main {
59 timer1: timer@40400000 {
60 compatible = "ti,omap5430-timer";
61 reg = <0x0 0x40400000 0x0 0x80>;
62 ti,timer-alwon;
63 clock-frequency = <25000000>;
64 u-boot,dm-pre-reloc;
65 };
66};
67
68&cbass_mcu {
69 mcu_secproxy: secproxy@28380000 {
70 compatible = "ti,am654-secure-proxy";
71 reg = <0x0 0x2a380000 0x0 0x80000>,
72 <0x0 0x2a400000 0x0 0x80000>,
73 <0x0 0x2a480000 0x0 0x80000>;
74 reg-names = "rt", "scfg", "target_data";
75 #mbox-cells = <1>;
76 u-boot,dm-spl;
77 };
78};
79
80&cbass_wakeup {
81 sysctrler: sysctrler {
82 compatible = "ti,am654-system-controller";
83 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
84 mbox-names = "tx", "rx";
85 u-boot,dm-spl;
86 };
87
88 wkup_gpio0: wkup_gpio0@42110000 {
89 compatible = "ti,k2g-gpio", "ti,keystone-gpio";
90 reg = <0x42110000 0x100>;
91 gpio-controller;
92 #gpio-cells = <2>;
93 ti,ngpio = <56>;
94 ti,davinci-gpio-unbanked = <0>;
95 clocks = <&k3_clks 59 0>;
96 clock-names = "gpio";
97 u-boot,dm-spl;
98 };
99
Keerthycfa6bd52019-10-24 15:00:54 +0530100 wkup_vtm0: wkup_vtm@42050000 {
101 compatible = "ti,am654-vtm", "ti,am654-avs";
102 reg = <0x42050000 0x25c>;
Lokesh Vutla57a088a2020-01-10 15:01:57 +0530103 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
Keerthycfa6bd52019-10-24 15:00:54 +0530104 #thermal-sensor-cells = <1>;
105 };
106
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530107 clk_200mhz: dummy_clock {
108 compatible = "fixed-clock";
109 #clock-cells = <0>;
110 clock-frequency = <200000000>;
111 u-boot,dm-spl;
112 };
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530113};
114
115&dmsc {
Andreas Dannenberg12df71c2019-04-25 12:27:02 -0500116 mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530117 mbox-names = "tx", "rx", "notify";
118 ti,host-id = <4>;
119 ti,secure-host;
120};
121
122&wkup_uart0 {
123 u-boot,dm-spl;
124 pinctrl-names = "default";
125 pinctrl-0 = <&wkup_uart0_pins_default>;
126 status = "okay";
127};
128
Andreas Dannenberg20a22962019-08-15 15:55:30 -0500129&mcu_uart0 {
130 u-boot,dm-spl;
131 pinctrl-names = "default";
132 pinctrl-0 = <&mcu_uart0_pins_default>;
133 clock-frequency = <48000000>;
134 status = "okay";
135};
136
Lokesh Vutla355be912019-06-07 19:24:47 +0530137&main_uart0 {
138 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
139};
140
Tero Kristo56adc662019-10-24 15:00:57 +0530141&wkup_vtm0 {
142 vdd-supply-3 = <&vdd_mpu>;
143 vdd-supply-4 = <&vdd_mpu>;
144 u-boot,dm-spl;
145};
146
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530147&wkup_pmx0 {
148 u-boot,dm-spl;
149 wkup_uart0_pins_default: wkup_uart0_pins_default {
150 pinctrl-single,pins = <
Andreas Dannenberg7202af92019-04-29 12:56:44 -0500151 AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
152 AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
153 AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
154 AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530155 >;
156 u-boot,dm-spl;
157 };
158
159 wkup_vtt_pins_default: wkup_vtt_pins_default {
160 pinctrl-single,pins = <
Andreas Dannenberg7202af92019-04-29 12:56:44 -0500161 AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530162 >;
163 u-boot,dm-spl;
164 };
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500165
Andreas Dannenberg20a22962019-08-15 15:55:30 -0500166 mcu_uart0_pins_default: mcu_uart0_pins_default {
167 pinctrl-single,pins = <
168 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
169 AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
170 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
171 AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
172 >;
173 u-boot,dm-spl;
174 };
175
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500176 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
177 pinctrl-single,pins = <
178 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
179 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
180 >;
181 };
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530182
183 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
184 pinctrl-single,pins = <
185 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
186 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
187 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
188 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
189 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
190 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
191 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
192 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
193 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
194 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
195 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
196 >;
197 };
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530198};
199
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530200&main_pmx0 {
201 u-boot,dm-spl;
202 main_mmc0_pins_default: main_mmc0_pins_default {
203 pinctrl-single,pins = <
204 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
205 AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
206 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
207 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
208 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
209 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
210 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
211 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
212 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
213 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
214 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
215 >;
216 };
217};
218
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530219&memorycontroller {
220 vtt-supply = <&vtt_supply>;
221 pinctrl-names = "default";
222 pinctrl-0 = <&wkup_vtt_pins_default>;
223};
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530224
225&sdhci0 {
226 clock-names = "clk_xin";
227 clocks = <&clk_200mhz>;
228 /delete-property/ power-domains;
229 ti,driver-strength-ohm = <50>;
230};
231
232&sdhci1 {
233 clock-names = "clk_xin";
234 clocks = <&clk_200mhz>;
235 /delete-property/ power-domains;
Faiz Abbasbbcfaad2019-06-11 00:43:36 +0530236 ti,driver-strength-ohm = <50>;
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530237};
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500238
239&wkup_i2c0 {
240 pinctrl-names = "default";
241 pinctrl-0 = <&wkup_i2c0_pins_default>;
242 clock-frequency = <400000>;
Tero Kristo4bbb3842019-10-24 15:00:55 +0530243 u-boot,dm-spl;
Tero Kristoc5f73d12019-10-24 15:00:56 +0530244
245 vdd_mpu: tps62363@60 {
246 compatible = "ti,tps62363";
247 reg = <0x60>;
248 regulator-name = "VDD_MPU";
249 regulator-min-microvolt = <500000>;
250 regulator-max-microvolt = <1770000>;
251 regulator-always-on;
252 regulator-boot-on;
253 ti,vsel0-state-high;
254 ti,vsel1-state-high;
255 u-boot,dm-spl;
256 };
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500257};
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530258
259&ospi0 {
260 pinctrl-names = "default";
261 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
262
263 reg = <0x0 0x47040000 0x0 0x100>,
264 <0x0 0x50000000 0x0 0x8000000>;
265
266 flash@0{
267 compatible = "jedec,spi-nor";
268 reg = <0x0>;
269 spi-tx-bus-width = <1>;
270 spi-rx-bus-width = <8>;
271 spi-max-frequency = <40000000>;
272 cdns,tshsl-ns = <60>;
273 cdns,tsd2d-ns = <60>;
274 cdns,tchsh-ns = <60>;
275 cdns,tslch-ns = <60>;
276 cdns,read-delay = <0>;
277 #address-cells = <1>;
278 #size-cells = <1>;
279 };
280};