blob: 7886f868f2ada38c294b76b71c2e47258b79c22e [file] [log] [blame]
Kumar Gala9f004092009-09-11 13:52:45 -05001/*
2 * Copyright 2009 Freescale Semiconductor, Inc
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#include <common.h>
21#include <asm/processor.h>
22#include <asm/mmu.h>
23#include <asm/fsl_law.h>
24
25DECLARE_GLOBAL_DATA_PTR;
26
27/* We run cpu_init_early_f in AS = 1 */
28void cpu_init_early_f(void)
29{
30 u32 mas0, mas1, mas2, mas3, mas7;
31 int i;
32
33 /* Pointer is writable since we allocated a register for it */
34 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
35
36 /*
37 * Clear initial global data
38 * we don't use memset so we can share this code with NAND_SPL
39 */
40 for (i = 0; i < sizeof(gd_t); i++)
41 ((char *)gd)[i] = 0;
42
43 mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(0);
44 mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_4K);
45 mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, MAS2_I|MAS2_G);
46 mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS, 0, MAS3_SW|MAS3_SR);
47 mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_PHYS);
48
49 write_tlb(mas0, mas1, mas2, mas3, mas7);
50
51 /* set up CCSR if we want it moved */
52#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
53 {
54 u32 temp;
55 volatile u32 *ccsr_virt =
56 (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000);
57
58 mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(1);
59 /* mas1 is the same as above */
60 mas2 = FSL_BOOKE_MAS2((u32)ccsr_virt, MAS2_I|MAS2_G);
61 mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0,
62 MAS3_SW|MAS3_SR);
63 mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_DEFAULT);
64
65 write_tlb(mas0, mas1, mas2, mas3, mas7);
66
67 temp = in_be32(ccsr_virt);
68 out_be32(ccsr_virt, CONFIG_SYS_CCSRBAR_PHYS >> 12);
69 temp = in_be32((volatile u32 *)CONFIG_SYS_CCSRBAR);
70 }
71#endif
72
73 init_laws();
74 invalidate_tlb(0);
75 init_tlbs();
76}