Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
Philip Oberfichtner | 1116888 | 2022-08-17 15:07:12 +0200 | [diff] [blame] | 2 | CONFIG_SYS_L2_PL310=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 3 | CONFIG_ARCH_SOCFPGA=y |
Tom Rini | 9802154 | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 4 | CONFIG_SYS_MALLOC_LEN=0x4000000 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 5 | CONFIG_SYS_MALLOC_F_LEN=0x800 |
Tom Rini | c960c0f | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 6 | CONFIG_ENV_SOURCE_FILE="socfpga_secu" |
Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 7 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 8 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 |
Holger Brunck | 3bcf9c0 | 2022-12-02 18:22:40 +0100 | [diff] [blame] | 9 | CONFIG_ENV_SIZE=0x2000 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 10 | CONFIG_ENV_OFFSET=0x100000 |
| 11 | CONFIG_DM_GPIO=y |
Tom Rini | 2bba780 | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 12 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" |
Tom Rini | c5a6e9f | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 13 | CONFIG_SPL_TEXT_BASE=0xFFFF0000 |
Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 14 | CONFIG_DM_RESET=y |
Simon Glass | 103c5f1 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 15 | # CONFIG_SPL_MMC is not set |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 16 | CONFIG_SPL_DRIVERS_MISC=y |
Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 17 | CONFIG_SPL_STACK=0x0 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 18 | CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y |
| 19 | CONFIG_ENV_OFFSET_REDUND=0x120000 |
| 20 | # CONFIG_SPL_LIBDISK_SUPPORT is not set |
Simon Glass | ea2ca7e | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 21 | # CONFIG_SPL_SPI is not set |
Tom Rini | d46e86d | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 22 | CONFIG_SYS_LOAD_ADDR=0x02000000 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 23 | CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" |
| 24 | CONFIG_FIT=y |
Tom Rini | c358af8 | 2023-03-27 13:39:17 -0400 | [diff] [blame] | 25 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | 69c8a81 | 2022-03-11 09:12:04 -0500 | [diff] [blame] | 26 | CONFIG_BOOT_RETRY=y |
| 27 | CONFIG_BOOT_RETRY_TIME=45 |
| 28 | CONFIG_RESET_TO_RETRY=y |
Tom Rini | 44a666a | 2020-06-16 19:06:12 -0400 | [diff] [blame] | 29 | CONFIG_USE_BOOTARGS=y |
Tom Rini | 970bf86 | 2021-11-10 09:11:40 -0500 | [diff] [blame] | 30 | CONFIG_BOOTCOMMAND="setenv bootcmd 'bridge enable; if test ${bootnum} = 'b'; then run _fpga_loadsafe; else if test ${bootcount} -eq 4; then echo 'Switching copy...'; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; run _fpga_loaduser; fi;echo 'Booting bank $bootnum' && run userload && run userboot;' && setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && saveenv && saveenv && boot;" |
Tom Rini | 0817daa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 31 | CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb" |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 32 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
| 33 | CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y |
| 34 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 35 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 36 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Tom Rini | 15b4aed | 2022-03-23 17:20:08 -0400 | [diff] [blame] | 37 | CONFIG_CLOCKS=y |
Tom Rini | 406257a | 2021-11-07 22:59:41 -0500 | [diff] [blame] | 38 | CONFIG_MISC_INIT_R=y |
Tom Rini | ca8a329 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 39 | CONFIG_SPL_PAD_TO=0x10000 |
Tom Rini | 9b5f9ae | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 40 | CONFIG_SPL_NO_BSS_LIMIT=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 41 | CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y |
Tom Rini | f113d7d | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 42 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 43 | # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set |
Tom Rini | f76750d | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 44 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 |
| 45 | # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 46 | CONFIG_SPL_MTD_SUPPORT=y |
Tom Rini | b340199 | 2022-06-10 23:03:09 -0400 | [diff] [blame] | 47 | CONFIG_SPL_NAND_SUPPORT=y |
Tom Rini | cf49358 | 2022-05-11 16:21:06 -0400 | [diff] [blame] | 48 | CONFIG_SYS_MAXARGS=32 |
Tom Rini | c45568c | 2022-06-25 19:29:46 -0400 | [diff] [blame] | 49 | CONFIG_SYS_BOOTM_LEN=0x4000000 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 50 | CONFIG_CMD_ASKENV=y |
| 51 | CONFIG_CMD_GREPENV=y |
| 52 | CONFIG_CMD_EEPROM=y |
Tom Rini | 88cd7d0 | 2021-08-17 17:59:45 -0400 | [diff] [blame] | 53 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
| 54 | CONFIG_SYS_EEPROM_SIZE=1024 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 55 | # CONFIG_CMD_FLASH is not set |
| 56 | CONFIG_CMD_GPIO=y |
| 57 | CONFIG_CMD_I2C=y |
| 58 | CONFIG_CMD_MMC=y |
| 59 | CONFIG_CMD_NAND_TRIMFFS=y |
| 60 | CONFIG_CMD_SPI=y |
| 61 | CONFIG_CMD_WDT=y |
| 62 | CONFIG_CMD_CACHE=y |
| 63 | CONFIG_MTDIDS_DEFAULT="nand0=denali-nand" |
| 64 | CONFIG_MTDPARTS_DEFAULT="mtdparts=denali-nand:512k(nand.4spl),512k(nand.uboot),128k(nand.env1),128k(nand.env2),0x1000000(nand.rec),0x3ee40000(nand.ubi),0x80000@0x3ff80000(nand.bbt)" |
| 65 | CONFIG_CMD_UBI=y |
| 66 | # CONFIG_CMD_UBIFS is not set |
| 67 | # CONFIG_ISO_PARTITION is not set |
| 68 | # CONFIG_EFI_PARTITION is not set |
Adam Ford | e91907a | 2020-07-03 06:48:56 -0500 | [diff] [blame] | 69 | CONFIG_ENV_OVERWRITE=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 70 | CONFIG_ENV_IS_IN_NAND=y |
| 71 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
Tom Rini | fdfb17b | 2022-02-25 11:19:48 -0500 | [diff] [blame] | 72 | CONFIG_USE_BOOTFILE=y |
| 73 | CONFIG_BOOTFILE="zImage" |
Tom Rini | 0817daa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 74 | CONFIG_VERSION_VARIABLE=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 75 | CONFIG_SPL_DM_SEQ_ALIAS=y |
Marek Vasut | 8876f89 | 2020-03-06 21:52:21 +0100 | [diff] [blame] | 76 | CONFIG_BOOTCOUNT_LIMIT=y |
| 77 | CONFIG_DM_BOOTCOUNT=y |
| 78 | CONFIG_DM_BOOTCOUNT_RTC=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 79 | CONFIG_DWAPB_GPIO=y |
| 80 | CONFIG_DM_I2C=y |
| 81 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 82 | CONFIG_DM_I2C_GPIO=y |
| 83 | CONFIG_MISC=y |
| 84 | CONFIG_I2C_EEPROM=y |
| 85 | CONFIG_SYS_I2C_EEPROM_ADDR=0x50 |
Tom Rini | 75fc79e | 2022-10-28 20:27:05 -0400 | [diff] [blame] | 86 | CONFIG_SYS_MMC_MAX_BLK_COUNT=256 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 87 | CONFIG_MMC_DW=y |
| 88 | CONFIG_MTD=y |
| 89 | CONFIG_DM_MTD=y |
| 90 | CONFIG_MTD_RAW_NAND=y |
| 91 | CONFIG_SYS_NAND_USE_FLASH_BBT=y |
| 92 | CONFIG_NAND_DENALI_DT=y |
Tom Rini | c0ad62c | 2021-09-22 14:50:34 -0400 | [diff] [blame] | 93 | CONFIG_SYS_NAND_ONFI_DETECTION=y |
Tom Rini | 871fd50 | 2021-09-22 14:50:38 -0400 | [diff] [blame] | 94 | CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y |
| 95 | CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 96 | CONFIG_SPL_NAND_DENALI=y |
Tom Rini | 32a8f80 | 2020-05-26 08:32:25 -0400 | [diff] [blame] | 97 | CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 98 | # CONFIG_DM_SPI_FLASH is not set |
| 99 | CONFIG_MTD_UBI_FASTMAP=y |
| 100 | CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 |
| 101 | CONFIG_MV88E6352_SWITCH=y |
| 102 | CONFIG_PHY_FIXED=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 103 | CONFIG_PHY_GIGE=y |
| 104 | CONFIG_ETH_DESIGNWARE=y |
| 105 | CONFIG_MII=y |
Marek Vasut | 8876f89 | 2020-03-06 21:52:21 +0100 | [diff] [blame] | 106 | CONFIG_DM_RTC=y |
| 107 | CONFIG_RTC_M41T62=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 108 | CONFIG_SPI=y |
| 109 | CONFIG_SPI_MEM=y |
| 110 | CONFIG_DESIGNWARE_SPI=y |
Tom Rini | 82edd73 | 2021-12-12 22:12:28 -0500 | [diff] [blame] | 111 | CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 112 | CONFIG_DESIGNWARE_WATCHDOG=y |
| 113 | CONFIG_WDT=y |
Tom Rini | 3b8dfc4 | 2022-11-16 13:10:38 -0500 | [diff] [blame] | 114 | CONFIG_SYS_TIMER_COUNTS_DOWN=y |
Holger Brunck | 468ba8d | 2020-02-19 19:55:14 +0100 | [diff] [blame] | 115 | # CONFIG_GZIP is not set |