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wdenkfe8c2802002-11-03 00:38:21 +00001/*
wdenk8655b6f2004-10-09 23:25:58 +00002 * MPC823 and PXA LCD Controller
wdenkfe8c2802002-11-03 00:38:21 +00003 *
4 * Modeled after video interface by Paolo Scaffardi
5 *
6 *
7 * (C) Copyright 2001
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk8655b6f2004-10-09 23:25:58 +000020 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenkfe8c2802002-11-03 00:38:21 +000021 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef _LCD_H_
30#define _LCD_H_
31
wdenk682011f2003-06-03 23:54:09 +000032extern char lcd_is_enabled;
33
wdenk8655b6f2004-10-09 23:25:58 +000034extern int lcd_line_length;
35extern int lcd_color_fg;
36extern int lcd_color_bg;
37
38/*
39 * Frame buffer memory information
40 */
41extern void *lcd_base; /* Start of framebuffer memory */
42extern void *lcd_console_address; /* Start of console buffer */
43
44extern short console_col;
45extern short console_row;
Alessandro Rubini61117222009-07-19 17:52:27 +020046extern struct vidinfo panel_info;
47
48extern void lcd_ctrl_init (void *lcdbase);
49extern void lcd_enable (void);
50
51/* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
52extern void lcd_setcolreg (ushort regno,
53 ushort red, ushort green, ushort blue);
54extern void lcd_initcolregs (void);
55
56/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
57extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
Anatolij Gustschinde3b49c2012-04-27 04:38:06 +000058extern int bmp_display(ulong addr, int x, int y);
wdenk8655b6f2004-10-09 23:25:58 +000059
Simon Glass9a8efc42012-10-30 13:40:18 +000060/**
61 * Set whether we need to flush the dcache when changing the LCD image. This
62 * defaults to off.
63 *
64 * @param flush non-zero to flush cache after update, 0 to skip
65 */
66void lcd_set_flush_dcache(int flush);
67
wdenk8655b6f2004-10-09 23:25:58 +000068#if defined CONFIG_MPC823
69/*
70 * LCD controller stucture for MPC823 CPU
71 */
72typedef struct vidinfo {
73 ushort vl_col; /* Number of columns (i.e. 640) */
74 ushort vl_row; /* Number of rows (i.e. 480) */
75 ushort vl_width; /* Width of display area in millimeters */
76 ushort vl_height; /* Height of display area in millimeters */
77
78 /* LCD configuration register */
79 u_char vl_clkp; /* Clock polarity */
80 u_char vl_oep; /* Output Enable polarity */
81 u_char vl_hsp; /* Horizontal Sync polarity */
82 u_char vl_vsp; /* Vertical Sync polarity */
83 u_char vl_dp; /* Data polarity */
84 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
85 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
86 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
87 u_char vl_clor; /* Color, 0 = mono, 1 = color */
88 u_char vl_tft; /* 0 = passive, 1 = TFT */
89
90 /* Horizontal control register. Timing from data sheet */
91 ushort vl_wbl; /* Wait between lines */
92
93 /* Vertical control register */
94 u_char vl_vpw; /* Vertical sync pulse width */
95 u_char vl_lcdac; /* LCD AC timing */
96 u_char vl_wbf; /* Wait between frames */
97} vidinfo_t;
98
Marek Vasutabc20ab2011-11-26 07:20:07 +010099#elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
100 defined CONFIG_CPU_MONAHANS
wdenk8655b6f2004-10-09 23:25:58 +0000101/*
102 * PXA LCD DMA descriptor
103 */
104struct pxafb_dma_descriptor {
105 u_long fdadr; /* Frame descriptor address register */
106 u_long fsadr; /* Frame source address register */
107 u_long fidr; /* Frame ID register */
108 u_long ldcmd; /* Command register */
109};
110
111/*
112 * PXA LCD info
113 */
114struct pxafb_info {
115
116 /* Misc registers */
117 u_long reg_lccr3;
118 u_long reg_lccr2;
119 u_long reg_lccr1;
120 u_long reg_lccr0;
121 u_long fdadr0;
122 u_long fdadr1;
123
124 /* DMA descriptors */
125 struct pxafb_dma_descriptor * dmadesc_fblow;
126 struct pxafb_dma_descriptor * dmadesc_fbhigh;
127 struct pxafb_dma_descriptor * dmadesc_palette;
128
129 u_long screen; /* physical address of frame buffer */
130 u_long palette; /* physical address of palette memory */
131 u_int palette_size;
132};
133
134/*
135 * LCD controller stucture for PXA CPU
136 */
137typedef struct vidinfo {
138 ushort vl_col; /* Number of columns (i.e. 640) */
139 ushort vl_row; /* Number of rows (i.e. 480) */
140 ushort vl_width; /* Width of display area in millimeters */
141 ushort vl_height; /* Height of display area in millimeters */
142
143 /* LCD configuration register */
144 u_char vl_clkp; /* Clock polarity */
145 u_char vl_oep; /* Output Enable polarity */
146 u_char vl_hsp; /* Horizontal Sync polarity */
147 u_char vl_vsp; /* Vertical Sync polarity */
148 u_char vl_dp; /* Data polarity */
149 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
150 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
151 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
152 u_char vl_clor; /* Color, 0 = mono, 1 = color */
153 u_char vl_tft; /* 0 = passive, 1 = TFT */
154
155 /* Horizontal control register. Timing from data sheet */
156 ushort vl_hpw; /* Horz sync pulse width */
157 u_char vl_blw; /* Wait before of line */
158 u_char vl_elw; /* Wait end of line */
159
160 /* Vertical control register. */
161 u_char vl_vpw; /* Vertical sync pulse width */
162 u_char vl_bfw; /* Wait before of frame */
163 u_char vl_efw; /* Wait end of frame */
164
165 /* PXA LCD controller params */
166 struct pxafb_info pxa;
167} vidinfo_t;
168
Bo Shenf6b690e2012-05-25 00:59:58 +0000169#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
Stelian Pop39cf4802008-05-09 21:57:18 +0200170
171typedef struct vidinfo {
Marek Vasut78459122011-10-24 23:41:00 +0000172 ushort vl_col; /* Number of columns (i.e. 640) */
173 ushort vl_row; /* Number of rows (i.e. 480) */
Stelian Pop39cf4802008-05-09 21:57:18 +0200174 u_long vl_clk; /* pixel clock in ps */
175
176 /* LCD configuration register */
177 u_long vl_sync; /* Horizontal / vertical sync */
178 u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
179 u_long vl_tft; /* 0 = passive, 1 = TFT */
Alexander Steincdfcedb2010-07-20 08:55:40 +0200180 u_long vl_cont_pol_low; /* contrast polarity is low */
Bo Shenf6b690e2012-05-25 00:59:58 +0000181 u_long vl_clk_pol; /* clock polarity */
Stelian Pop39cf4802008-05-09 21:57:18 +0200182
183 /* Horizontal control register. */
184 u_long vl_hsync_len; /* Length of horizontal sync */
185 u_long vl_left_margin; /* Time from sync to picture */
186 u_long vl_right_margin; /* Time from picture to sync */
187
188 /* Vertical control register. */
189 u_long vl_vsync_len; /* Length of vertical sync */
190 u_long vl_upper_margin; /* Time from sync to picture */
191 u_long vl_lower_margin; /* Time from picture to sync */
192
193 u_long mmio; /* Memory mapped registers */
194} vidinfo_t;
195
Donghwa Lee559a05c2012-04-05 19:36:15 +0000196#elif defined(CONFIG_EXYNOS_FB)
197
198enum {
199 FIMD_RGB_INTERFACE = 1,
200 FIMD_CPU_INTERFACE = 2,
201};
202
Donghwa Lee90464972012-05-09 19:23:46 +0000203enum exynos_fb_rgb_mode_t {
204 MODE_RGB_P = 0,
205 MODE_BGR_P = 1,
206 MODE_RGB_S = 2,
207 MODE_BGR_S = 3,
208};
209
Donghwa Lee559a05c2012-04-05 19:36:15 +0000210typedef struct vidinfo {
211 ushort vl_col; /* Number of columns (i.e. 640) */
212 ushort vl_row; /* Number of rows (i.e. 480) */
213 ushort vl_width; /* Width of display area in millimeters */
214 ushort vl_height; /* Height of display area in millimeters */
215
216 /* LCD configuration register */
217 u_char vl_freq; /* Frequency */
218 u_char vl_clkp; /* Clock polarity */
219 u_char vl_oep; /* Output Enable polarity */
220 u_char vl_hsp; /* Horizontal Sync polarity */
221 u_char vl_vsp; /* Vertical Sync polarity */
222 u_char vl_dp; /* Data polarity */
223 u_char vl_bpix; /* Bits per pixel */
224
225 /* Horizontal control register. Timing from data sheet */
226 u_char vl_hspw; /* Horz sync pulse width */
227 u_char vl_hfpd; /* Wait before of line */
228 u_char vl_hbpd; /* Wait end of line */
229
230 /* Vertical control register. */
231 u_char vl_vspw; /* Vertical sync pulse width */
232 u_char vl_vfpd; /* Wait before of frame */
233 u_char vl_vbpd; /* Wait end of frame */
234 u_char vl_cmd_allow_len; /* Wait end of frame */
235
236 void (*cfg_gpio)(void);
237 void (*backlight_on)(unsigned int onoff);
238 void (*reset_lcd)(void);
239 void (*lcd_power_on)(void);
240 void (*cfg_ldo)(void);
241 void (*enable_ldo)(unsigned int onoff);
242 void (*mipi_power)(void);
243 void (*backlight_reset)(void);
244
245 unsigned int win_id;
246 unsigned int init_delay;
247 unsigned int power_on_delay;
248 unsigned int reset_delay;
249 unsigned int interface_mode;
250 unsigned int mipi_enabled;
Donghwa Lee5addfcf2012-07-02 01:16:05 +0000251 unsigned int dp_enabled;
Donghwa Lee559a05c2012-04-05 19:36:15 +0000252 unsigned int cs_setup;
253 unsigned int wr_setup;
254 unsigned int wr_act;
255 unsigned int wr_hold;
Donghwa Lee90464972012-05-09 19:23:46 +0000256 unsigned int logo_on;
257 unsigned int logo_width;
258 unsigned int logo_height;
259 unsigned long logo_addr;
260 unsigned int rgb_mode;
261 unsigned int resolution;
Donghwa Lee559a05c2012-04-05 19:36:15 +0000262
263 /* parent clock name(MPLL, EPLL or VPLL) */
264 unsigned int pclk_name;
265 /* ratio value for source clock from parent clock. */
266 unsigned int sclk_div;
267
268 unsigned int dual_lcd_enabled;
269
270} vidinfo_t;
271
272void init_panel_info(vidinfo_t *vid);
273
Guennadi Liakhovetskib245e652009-02-06 10:37:53 +0100274#else
275
276typedef struct vidinfo {
277 ushort vl_col; /* Number of columns (i.e. 160) */
278 ushort vl_row; /* Number of rows (i.e. 100) */
279
280 u_char vl_bpix; /* Bits per pixel, 0 = 1 */
281
282 ushort *cmap; /* Pointer to the colormap */
283
284 void *priv; /* Pointer to driver-specific data */
285} vidinfo_t;
286
Marek Vasutabc20ab2011-11-26 07:20:07 +0100287#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
wdenk8655b6f2004-10-09 23:25:58 +0000288
Alessandro Rubini60e97412009-07-21 14:09:45 +0200289extern vidinfo_t panel_info;
290
wdenkfe8c2802002-11-03 00:38:21 +0000291/* Video functions */
292
wdenk8655b6f2004-10-09 23:25:58 +0000293#if defined(CONFIG_RBC823)
294void lcd_disable (void);
295#endif
296
297
wdenkc3f4d172004-06-25 23:35:58 +0000298/* int lcd_init (void *lcdbase); */
wdenkfe8c2802002-11-03 00:38:21 +0000299void lcd_putc (const char c);
300void lcd_puts (const char *s);
301void lcd_printf (const char *fmt, ...);
Che-Liang Chiou02110902011-10-20 23:07:03 +0000302void lcd_clear(void);
303int lcd_display_bitmap(ulong bmp_image, int x, int y);
wdenkfe8c2802002-11-03 00:38:21 +0000304
Vadim Bendebury395166c2012-09-28 15:11:13 +0000305/**
306 * Get the width of the LCD in pixels
307 *
308 * @return width of LCD in pixels
309 */
310int lcd_get_pixel_width(void);
311
312/**
313 * Get the height of the LCD in pixels
314 *
315 * @return height of LCD in pixels
316 */
317int lcd_get_pixel_height(void);
318
319/**
320 * Get the number of text lines/rows on the LCD
321 *
322 * @return number of rows
323 */
324int lcd_get_screen_rows(void);
325
326/**
327 * Get the number of text columns on the LCD
328 *
329 * @return number of columns
330 */
331int lcd_get_screen_columns(void);
332
333/**
334 * Set the position of the text cursor
335 *
336 * @param col Column to place cursor (0 = left side)
337 * @param row Row to place cursor (0 = top line)
338 */
339void lcd_position_cursor(unsigned col, unsigned row);
340
Haavard Skinnemoen6b59e032008-09-01 16:21:22 +0200341/* Allow boards to customize the information displayed */
342void lcd_show_board_info(void);
wdenk8655b6f2004-10-09 23:25:58 +0000343
Simon Glass676d3192012-10-17 13:24:54 +0000344/* Return the size of the LCD frame buffer, and the line length */
345int lcd_get_size(int *line_length);
346
wdenk8655b6f2004-10-09 23:25:58 +0000347/************************************************************************/
348/* ** BITMAP DISPLAY SUPPORT */
349/************************************************************************/
Jon Loeliger639221c2007-07-09 17:15:49 -0500350#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
wdenk8655b6f2004-10-09 23:25:58 +0000351# include <bmp_layout.h>
352# include <asm/byteorder.h>
Jon Loeliger639221c2007-07-09 17:15:49 -0500353#endif
wdenk8655b6f2004-10-09 23:25:58 +0000354
wdenk8655b6f2004-10-09 23:25:58 +0000355/*
356 * Information about displays we are using. This is for configuring
357 * the LCD controller and memory allocation. Someone has to know what
358 * is connected, as we can't autodetect anything.
359 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200360#define CONFIG_SYS_HIGH 0 /* Pins are active high */
361#define CONFIG_SYS_LOW 1 /* Pins are active low */
wdenk8655b6f2004-10-09 23:25:58 +0000362
363#define LCD_MONOCHROME 0
364#define LCD_COLOR2 1
365#define LCD_COLOR4 2
366#define LCD_COLOR8 3
367#define LCD_COLOR16 4
368
369/*----------------------------------------------------------------------*/
wdenk88804d12005-07-04 00:03:16 +0000370#if defined(CONFIG_LCD_INFO_BELOW_LOGO)
wdenk8655b6f2004-10-09 23:25:58 +0000371# define LCD_INFO_X 0
372# define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
373#elif defined(CONFIG_LCD_LOGO)
374# define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
375# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
376#else
377# define LCD_INFO_X (VIDEO_FONT_WIDTH)
378# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
379#endif
380
381/* Default to 8bpp if bit depth not specified */
382#ifndef LCD_BPP
383# define LCD_BPP LCD_COLOR8
384#endif
385#ifndef LCD_DF
386# define LCD_DF 1
387#endif
388
389/* Calculate nr. of bits per pixel and nr. of colors */
390#define NBITS(bit_code) (1 << (bit_code))
391#define NCOLORS(bit_code) (1 << NBITS(bit_code))
392
393/************************************************************************/
394/* ** CONSOLE CONSTANTS */
395/************************************************************************/
396#if LCD_BPP == LCD_MONOCHROME
397
398/*
399 * Simple black/white definitions
400 */
401# define CONSOLE_COLOR_BLACK 0
402# define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */
403
404#elif LCD_BPP == LCD_COLOR8
405
406/*
407 * 8bpp color definitions
408 */
409# define CONSOLE_COLOR_BLACK 0
410# define CONSOLE_COLOR_RED 1
411# define CONSOLE_COLOR_GREEN 2
412# define CONSOLE_COLOR_YELLOW 3
413# define CONSOLE_COLOR_BLUE 4
414# define CONSOLE_COLOR_MAGENTA 5
415# define CONSOLE_COLOR_CYAN 6
416# define CONSOLE_COLOR_GREY 14
417# define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
418
419#else
420
421/*
422 * 16bpp color definitions
423 */
424# define CONSOLE_COLOR_BLACK 0x0000
425# define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
426
427#endif /* color definitions */
428
wdenk8655b6f2004-10-09 23:25:58 +0000429/************************************************************************/
430#ifndef PAGE_SIZE
431# define PAGE_SIZE 4096
432#endif
433
434/************************************************************************/
435/* ** CONSOLE DEFINITIONS & FUNCTIONS */
436/************************************************************************/
wdenk88804d12005-07-04 00:03:16 +0000437#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
wdenk8655b6f2004-10-09 23:25:58 +0000438# define CONSOLE_ROWS ((panel_info.vl_row-BMP_LOGO_HEIGHT) \
439 / VIDEO_FONT_HEIGHT)
440#else
441# define CONSOLE_ROWS (panel_info.vl_row / VIDEO_FONT_HEIGHT)
442#endif
443
444#define CONSOLE_COLS (panel_info.vl_col / VIDEO_FONT_WIDTH)
445#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
446#define CONSOLE_ROW_FIRST (lcd_console_address)
447#define CONSOLE_ROW_SECOND (lcd_console_address + CONSOLE_ROW_SIZE)
448#define CONSOLE_ROW_LAST (lcd_console_address + CONSOLE_SIZE \
449 - CONSOLE_ROW_SIZE)
450#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
451#define CONSOLE_SCROLL_SIZE (CONSOLE_SIZE - CONSOLE_ROW_SIZE)
452
453#if LCD_BPP == LCD_MONOCHROME
454# define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \
455 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
Mark Jackson69f32e62009-07-21 11:18:44 +0100456#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
wdenk8655b6f2004-10-09 23:25:58 +0000457# define COLOR_MASK(c) (c)
458#else
459# error Unsupported LCD BPP.
460#endif
461
462/************************************************************************/
463
464#endif /* _LCD_H_ */