| Mario Six | a63e54a | 2018-08-09 14:51:16 +0200 | [diff] [blame] | 1 | menuconfig AXI |
| 2 | bool "AXI bus drivers" |
| 3 | help |
| 4 | Support AXI (Advanced eXtensible Interface) busses, a on-chip |
| 5 | interconnect specification for managing functional blocks in SoC |
| 6 | designs, which is also often used in designs involving FPGAs (e.g. |
| 7 | communication with IP cores in Xilinx FPGAs). |
| 8 | |
| 9 | These types of busses expose a virtual address space that can be |
| 10 | accessed using different address widths (8, 16, and 32 are supported |
| 11 | for now). |
| 12 | |
| 13 | Other similar bus architectures may be compatible as well. |
| Mario Six | 9fc8706 | 2018-08-09 14:51:17 +0200 | [diff] [blame^] | 14 | |
| 15 | if AXI |
| 16 | |
| 17 | config IHS_AXI |
| 18 | bool "Enable IHS AXI driver" |
| 19 | depends on DM |
| 20 | help |
| 21 | Support for gdsys Integrated Hardware Systems Advanced eXtensible |
| 22 | Interface (IHS AXI) bus on a gdsys IHS FPGA used to communicate with |
| 23 | IP cores in the FPGA (e.g. video transmitter cores). |
| 24 | |
| 25 | endif |