Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 8 | #include <dt-bindings/interrupt-router/intel-irq.h> |
| 9 | |
| 10 | /* ICH9 IRQ router has discrete PIRQ control registers */ |
| 11 | #undef PIRQE |
| 12 | #undef PIRQF |
| 13 | #undef PIRQG |
| 14 | #undef PIRQH |
| 15 | #define PIRQE 8 |
| 16 | #define PIRQF 9 |
| 17 | #define PIRQG 10 |
| 18 | #define PIRQH 11 |
| 19 | |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 20 | /include/ "skeleton.dtsi" |
| 21 | /include/ "serial.dtsi" |
Bin Meng | b6ff6ce | 2015-11-12 05:33:06 -0800 | [diff] [blame] | 22 | /include/ "keyboard.dtsi" |
Bin Meng | 93f8a31 | 2015-07-15 16:23:39 +0800 | [diff] [blame] | 23 | /include/ "rtc.dtsi" |
Bin Meng | 80af398 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 24 | /include/ "tsc_timer.dtsi" |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 25 | |
| 26 | / { |
Bin Meng | 683b09d | 2015-06-03 09:20:04 +0800 | [diff] [blame] | 27 | model = "QEMU x86 (Q35)"; |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 28 | compatible = "qemu,x86"; |
| 29 | |
| 30 | config { |
| 31 | silent_console = <0>; |
Bin Meng | f2653e8 | 2015-06-03 09:20:05 +0800 | [diff] [blame] | 32 | u-boot,no-apm-finalize; |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 33 | }; |
| 34 | |
| 35 | chosen { |
| 36 | stdout-path = "/serial"; |
| 37 | }; |
| 38 | |
Bin Meng | a8ebf28 | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 39 | cpus { |
| 40 | #address-cells = <1>; |
| 41 | #size-cells = <0>; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 42 | u-boot,dm-pre-reloc; |
Bin Meng | a8ebf28 | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 43 | |
| 44 | cpu@0 { |
| 45 | device_type = "cpu"; |
Miao Yan | 5a69405 | 2016-01-07 01:32:01 -0800 | [diff] [blame] | 46 | compatible = "cpu-qemu"; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 47 | u-boot,dm-pre-reloc; |
Bin Meng | a8ebf28 | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 48 | reg = <0>; |
| 49 | intel,apic-id = <0>; |
| 50 | }; |
| 51 | }; |
| 52 | |
Bin Meng | 80af398 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 53 | tsc-timer { |
| 54 | clock-frequency = <1000000000>; |
| 55 | }; |
| 56 | |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 57 | pci { |
| 58 | compatible = "pci-x86"; |
| 59 | #address-cells = <3>; |
| 60 | #size-cells = <2>; |
| 61 | u-boot,dm-pre-reloc; |
| 62 | ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 |
| 63 | 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 |
| 64 | 0x01000000 0x0 0x2000 0x2000 0 0xe000>; |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 65 | |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 66 | pch@1f,0 { |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 67 | reg = <0x0000f800 0 0 0 0>; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 68 | compatible = "intel,pch9"; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 69 | u-boot,dm-pre-reloc; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 70 | |
| 71 | irq-router { |
| 72 | compatible = "intel,irq-router"; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 73 | u-boot,dm-pre-reloc; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 74 | intel,pirq-config = "pci"; |
Bin Meng | ce8dd77 | 2016-05-07 07:46:15 -0700 | [diff] [blame] | 75 | intel,actl-8bit; |
| 76 | intel,actl-addr = <0x44>; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 77 | intel,pirq-link = <0x60 8>; |
| 78 | intel,pirq-mask = <0x0e40>; |
| 79 | intel,pirq-routing = < |
| 80 | /* e1000 NIC */ |
| 81 | PCI_BDF(0, 2, 0) INTA PIRQG |
| 82 | /* ICH9 UHCI */ |
| 83 | PCI_BDF(0, 29, 0) INTA PIRQA |
| 84 | PCI_BDF(0, 29, 1) INTB PIRQB |
| 85 | PCI_BDF(0, 29, 2) INTC PIRQC |
| 86 | /* ICH9 EHCI */ |
| 87 | PCI_BDF(0, 29, 7) INTD PIRQD |
| 88 | /* ICH9 SATA */ |
| 89 | PCI_BDF(0, 31, 2) INTA PIRQA |
| 90 | >; |
| 91 | }; |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 92 | }; |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | }; |