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Wolfgang Grandeggercd12f612009-10-23 12:03:16 +02001/*
2 * (C) Copyright 2006
3 * MicroSys GmbH
4 *
5 * (C) Copyright 2009
6 * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 */
17
18#define CONFIG_MPC5200
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090019#define CONFIG_MPX5200 1 /* MPX5200 board */
20#define CONFIG_MPC5200_DDR 1 /* use DDR RAM */
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +020021#define CONFIG_IPEK01 /* Motherboard is ipek01 */
Anatolij Gustschindfcd23e2015-08-14 07:04:19 +020022#define CONFIG_DISPLAY_BOARDINFO
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +020023
Wolfgang Denk2ae18242010-10-06 09:05:45 +020024#define CONFIG_SYS_TEXT_BASE 0xfc000000
25
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +020026#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
27
28#define CONFIG_MISC_INIT_R
29
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +020030#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
31#ifdef CONFIG_CMD_KGDB
32#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
33#endif
34
35/*
36 * Serial console configuration
37 */
38#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
39#define CONFIG_BAUDRATE 115200 /* ... at 9600 bps */
40#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
41
42#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
43
44/*
45 * Video configuration for LIME GDC
46 */
47#define CONFIG_VIDEO
48#ifdef CONFIG_VIDEO
49#define CONFIG_VIDEO_MB862xx
50#define CONFIG_VIDEO_MB862xx_ACCEL
51#define VIDEO_FB_16BPP_WORD_SWAP
52#define CONFIG_CFB_CONSOLE
53#define CONFIG_VIDEO_LOGO
54#define CONFIG_VIDEO_BMP_LOGO
55#define CONFIG_CONSOLE_EXTRA_INFO
56#define CONFIG_VGA_AS_SINGLE_DEVICE
57#define CONFIG_SYS_CONSOLE_IS_IN_ENV
58#define CONFIG_VIDEO_SW_CURSOR
59#define CONFIG_SPLASH_SCREEN
60#define CONFIG_VIDEO_BMP_GZIP
61#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */
62/* Lime clock frequency */
63#define CONFIG_SYS_MB862xx_CCF 0x90000 /* geo 166MHz other 133MHz */
64/* SDRAM parameter */
65#define CONFIG_SYS_MB862xx_MMR 0x41c767e3
66#endif
67
68/*
69 * PCI Mapping:
70 * 0x40000000 - 0x4fffffff - PCI Memory
71 * 0x50000000 - 0x50ffffff - PCI IO Space
72 */
73#define CONFIG_PCI 1
74#define CONFIG_PCI_PNP 1
75#define CONFIG_PCI_SCAN_SHOW 1
76
77#define CONFIG_PCI_MEM_BUS 0x40000000
78#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
79#define CONFIG_PCI_MEM_SIZE 0x10000000
80
81#define CONFIG_PCI_IO_BUS 0x50000000
82#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
83#define CONFIG_PCI_IO_SIZE 0x01000000
84
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +020085#define CONFIG_MII 1
86#define CONFIG_EEPRO100 1
87#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
88
89/* Partitions */
90#define CONFIG_DOS_PARTITION
91
92/* USB */
93#define CONFIG_USB_OHCI_NEW
94#define CONFIG_SYS_OHCI_BE_CONTROLLER
95#define CONFIG_USB_STORAGE
96
97#define CONFIG_SYS_USB_OHCI_CPU_INIT
98#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
99#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
100#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
101
102/*
103 * Command line configuration.
104 */
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200105#ifdef CONFIG_VIDEO
106#define CONFIG_CMD_BMP /* BMP support */
107#endif
108#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
109#define CONFIG_CMD_DHCP /* DHCP Support */
110#define CONFIG_CMD_FAT /* FAT support */
111#define CONFIG_CMD_I2C /* I2C serial bus support */
112#define CONFIG_CMD_IDE /* IDE harddisk support */
113#define CONFIG_CMD_IRQ /* irqinfo */
114#define CONFIG_CMD_MII /* MII support */
115#define CONFIG_CMD_PCI /* pciinfo */
116#define CONFIG_CMD_USB /* USB Support */
117
118#define CONFIG_SYS_LOWBOOT 1
119
120/*
121 * Autobooting
122 */
123#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
124
125#define CONFIG_PREBOOT "echo;" \
126 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
127 "echo"
128
129#undef CONFIG_BOOTARGS
130
131#define CONFIG_EXTRA_ENV_SETTINGS \
132 "netdev=eth0\0" \
133 "consoledev=ttyPSC0\0" \
134 "hostname=ipek01\0" \
135 "nfsargs=setenv bootargs root=/dev/nfs rw " \
136 "nfsroot=${serverip}:${rootpath}\0" \
137 "ramargs=setenv bootargs root=/dev/ram rw\0" \
138 "addip=setenv bootargs ${bootargs} " \
139 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
140 ":${hostname}:${netdev}:off panic=1\0" \
141 "addtty=setenv bootargs ${bootargs} " \
142 "console=${consoledev},${baudrate}\0" \
143 "flash_nfs=run nfsargs addip addtty;" \
144 "bootm ${kernel_addr} - ${fdtaddr}\0" \
145 "flash_self=run ramargs addip addtty;" \
146 "bootm ${kernel_addr} ${ramdisk_addr} ${fdtaddr}\0" \
147 "net_nfs=tftp 200000 ${bootfile}; tftp ${fdtaddr} ${fdtfile};" \
148 "run nfsargs addip addtty;" \
149 "bootm ${loadaddr} - ${fdtaddr}\0" \
150 "rootpath=/opt/eldk/ppc_6xx\0" \
151 "bootfile=ipek01/uImage\0" \
152 "load=tftp 100000 ipek01/u-boot.bin\0" \
153 "update=protect off FC000000 +60000; era FC000000 +60000; " \
154 "cp.b 100000 FC000000 ${filesize}\0" \
155 "upd=run load;run update\0" \
156 "fdtaddr=800000\0" \
157 "loadaddr=400000\0" \
158 "fdtfile=ipek01/ipek01.dtb\0" \
159 ""
160
161#define CONFIG_BOOTCOMMAND "run flash_self"
162
163/*
164 * IPB Bus clocking configuration.
165 */
166#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* for 133MHz */
167/* PCI clock must be 33, because board will not boot */
168#undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* for 66MHz */
169
170/*
171 * Open firmware flat tree support
172 */
173#define CONFIG_OF_LIBFDT 1
174#define CONFIG_OF_BOARD_SETUP 1
175
176#define OF_CPU "PowerPC,5200@0"
177#define OF_SOC "soc5200@f0000000"
178#define OF_TBCLK (bd->bi_busfreq / 4)
179
180/*
181 * I2C configuration
182 */
183#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
184#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
185
186#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
187#define CONFIG_SYS_I2C_SLAVE 0x7F
188
189/*
190 * EEPROM configuration
191 */
192#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
193#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
194#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
195#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
196
197/*
198 * RTC configuration
199 */
200#define CONFIG_RTC_PCF8563
201#define CONFIG_SYS_I2C_RTC_ADDR 0x51
202
203#define CONFIG_SYS_FLASH_BASE 0xFC000000
204#define CONFIG_SYS_FLASH_SIZE 0x01000000
205#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
206 CONFIG_SYS_MONITOR_LEN)
207
208#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
209#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
210#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
211
212/* use CFI flash driver */
213#define CONFIG_FLASH_CFI_DRIVER
214#define CONFIG_SYS_FLASH_CFI
215#define CONFIG_SYS_FLASH_EMPTY_INFO
216#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
217
218/*
219 * Environment settings
220 */
221#define CONFIG_ENV_IS_IN_FLASH 1
222#define CONFIG_ENV_SIZE 0x10000
223#define CONFIG_ENV_SECT_SIZE 0x20000
224#define CONFIG_ENV_OVERWRITE 1
225#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
226#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
227
228/*
229 * Memory map
230 */
231#define CONFIG_SYS_MBAR 0xf0000000
232#define CONFIG_SYS_SDRAM_BASE 0x00000000
233#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
234#define CONFIG_SYS_SRAM_BASE 0xF1000000
235#define CONFIG_SYS_SRAM_SIZE 0x00200000
236#define CONFIG_SYS_LIME_BASE 0xE4000000
237#define CONFIG_SYS_LIME_SIZE 0x04000000
238#define CONFIG_SYS_FPGA_BASE 0xC0000000
239#define CONFIG_SYS_FPGA_SIZE 0x10000000
240#define CONFIG_SYS_MPEG_BASE 0xe2000000
241#define CONFIG_SYS_MPEG_SIZE 0x01000000
242#define CONFIG_SYS_CF_BASE 0xe1000000
243#define CONFIG_SYS_CF_SIZE 0x01000000
244
245/* Use SRAM until RAM will be available */
246#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
247/* End of used area in DPRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200248#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200249
Wolfgang Denk553f0982010-10-26 13:32:32 +0200250#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200251 GENERATED_GBL_DATA_SIZE)
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200252#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
253
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200254#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200255#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
256# define CONFIG_SYS_RAMBOOT 1
257#endif
258
259#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
260#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 128 kB for malloc() */
261#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
262
263/*
264 * Ethernet configuration
265 */
266#define CONFIG_MPC5xxx_FEC 1
267#define CONFIG_MPC5xxx_FEC_MII100
268#define CONFIG_PHY_ADDR 0x00
269
270/*
271 * GPIO configuration
272 */
273#define CONFIG_SYS_GPS_PORT_CONFIG 0x1d556624
274
275/*
276 * Miscellaneous configurable options
277 */
278#define CONFIG_SYS_LONGHELP /* undef to save memory */
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200279#ifdef CONFIG_CMD_KGDB
280#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
281#else
282#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
283#endif
284/* Print Buffer Size */
285#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
286 sizeof(CONFIG_SYS_PROMPT) + 16)
287/* max number of command args */
288#define CONFIG_SYS_MAXARGS 16
289/* Boot Argument Buffer Size */
290#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
291
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200292#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
293#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1...15 MB in DRAM */
294
295#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
296
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200297#define CONFIG_LOOPW
298
299/*
300 * Various low-level settings
301 */
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200302#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
303#define CONFIG_SYS_HID0_FINAL HID0_ICE
Wolfgang Grandeggercd12f612009-10-23 12:03:16 +0200304
305#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
306#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
307#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
308#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
309#define CONFIG_SYS_CS1_START CONFIG_SYS_SRAM_BASE
310#define CONFIG_SYS_CS1_SIZE CONFIG_SYS_SRAM_SIZE
311#define CONFIG_SYS_CS3_START CONFIG_SYS_LIME_BASE
312#define CONFIG_SYS_CS3_SIZE CONFIG_SYS_LIME_SIZE
313#define CONFIG_SYS_CS6_START CONFIG_SYS_FPGA_BASE
314#define CONFIG_SYS_CS6_SIZE CONFIG_SYS_FPGA_SIZE
315#define CONFIG_SYS_CS5_START CONFIG_SYS_CF_BASE
316#define CONFIG_SYS_CS5_SIZE CONFIG_SYS_CF_SIZE
317#define CONFIG_SYS_CS7_START CONFIG_SYS_MPEG_BASE
318#define CONFIG_SYS_CS7_SIZE CONFIG_SYS_MPEG_SIZE
319
320#ifdef CONFIG_SYS_PCISPEED_66
321#define CONFIG_SYS_BOOTCS_CFG 0x0006F900
322#define CONFIG_SYS_CS1_CFG 0x0004FB00
323#define CONFIG_SYS_CS2_CFG 0x0006F900
324#else
325#define CONFIG_SYS_BOOTCS_CFG 0x0002F900
326#define CONFIG_SYS_CS1_CFG 0x0001FB00
327#define CONFIG_SYS_CS2_CFG 0x0002F90C
328#endif
329
330/*
331 * Ack active, Muxed mode, AS=24 bit address, DS=32 bit data, 0
332 * waitstates, writeswap and readswap enabled
333 */
334#define CONFIG_SYS_CS3_CFG 0x00FFFB0C
335#define CONFIG_SYS_CS6_CFG 0x00FFFB0C
336#define CONFIG_SYS_CS7_CFG 0x4040751C
337
338#define CONFIG_SYS_CS_BURST 0x00000000
339#define CONFIG_SYS_CS_DEADCYCLE 0x33330000
340
341#define CONFIG_SYS_RESET_ADDRESS 0xff000000
342
343/*-----------------------------------------------------------------------
344 * USB stuff
345 *-----------------------------------------------------------------------
346 */
347#define CONFIG_USB_CLOCK 0x0001BBBB
348#define CONFIG_USB_CONFIG 0x00005000
349
350/*-----------------------------------------------------------------------
351 * IDE/ATA stuff Supports IDE harddisk
352 *-----------------------------------------------------------------------
353 */
354#define CONFIG_IDE_PREINIT
355
356#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
357#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
358
359#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
360
361#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
362
363/* Offset for data I/O */
364#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
365
366/* Offset for normal register accesses */
367#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
368
369/* Offset for alternate registers */
370#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
371
372/* Interval between registers */
373#define CONFIG_SYS_ATA_STRIDE 4
374
375#endif /* __CONFIG_H */