Stelian Pop | 0176d43 | 2008-03-26 18:52:33 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007-2008 |
| 3 | * Stelian Pop <stelian.pop <at> leadtechdesign.com> |
| 4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * |
| 6 | * Configuation settings for the AT91SAM9260EK board. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
| 30 | /* ARM asynchronous clock */ |
| 31 | #define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */ |
| 32 | #define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */ |
| 33 | #define CFG_HZ 1000000 /* 1us resolution */ |
| 34 | |
| 35 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| 36 | |
| 37 | #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ |
| 38 | #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ |
| 39 | #define CONFIG_AT91SAM9260EK 1 /* on an AT91SAM9260EK Board */ |
| 40 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 41 | |
| 42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 43 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 44 | #define CONFIG_INITRD_TAG 1 |
| 45 | |
| 46 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 47 | #define CONFIG_SKIP_RELOCATE_UBOOT |
| 48 | |
| 49 | /* |
| 50 | * Hardware drivers |
| 51 | */ |
| 52 | #define CONFIG_ATMEL_USART 1 |
| 53 | #undef CONFIG_USART0 |
| 54 | #undef CONFIG_USART1 |
| 55 | #undef CONFIG_USART2 |
| 56 | #define CONFIG_USART3 1 /* USART 3 is DBGU */ |
| 57 | |
| 58 | #define CONFIG_BOOTDELAY 3 |
| 59 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 60 | "root=/dev/mtdblock0 rw rootfstype=jffs2" |
| 61 | |
| 62 | /* #define CONFIG_ENV_OVERWRITE 1 */ |
| 63 | |
| 64 | /* |
| 65 | * BOOTP options |
| 66 | */ |
| 67 | #define CONFIG_BOOTP_BOOTFILESIZE 1 |
| 68 | #define CONFIG_BOOTP_BOOTPATH 1 |
| 69 | #define CONFIG_BOOTP_GATEWAY 1 |
| 70 | #define CONFIG_BOOTP_HOSTNAME 1 |
| 71 | |
| 72 | /* |
| 73 | * Command line configuration. |
| 74 | */ |
| 75 | #include <config_cmd_default.h> |
| 76 | #undef CONFIG_CMD_BDI |
| 77 | #undef CONFIG_CMD_IMI |
| 78 | #undef CONFIG_CMD_AUTOSCRIPT |
| 79 | #undef CONFIG_CMD_FPGA |
| 80 | #undef CONFIG_CMD_LOADS |
| 81 | #undef CONFIG_CMD_IMLS |
| 82 | |
| 83 | #define CONFIG_CMD_PING 1 |
| 84 | #define CONFIG_CMD_DHCP 1 |
| 85 | #define CONFIG_CMD_NAND 1 |
| 86 | #define CONFIG_CMD_USB 1 |
| 87 | |
| 88 | /* SDRAM */ |
| 89 | #define CONFIG_NR_DRAM_BANKS 1 |
| 90 | #define PHYS_SDRAM 0x20000000 |
| 91 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
| 92 | |
| 93 | /* DataFlash */ |
| 94 | #define CONFIG_HAS_DATAFLASH 1 |
| 95 | #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) |
| 96 | #define CFG_MAX_DATAFLASH_BANKS 2 |
| 97 | #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
| 98 | #define CFG_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ |
| 99 | #define AT91_SPI_CLK 33000000 |
| 100 | #define DATAFLASH_TCSS (0x1a << 16) |
| 101 | #define DATAFLASH_TCHS (0x1 << 24) |
| 102 | |
| 103 | /* NAND flash */ |
| 104 | #define NAND_MAX_CHIPS 1 |
| 105 | #define CFG_MAX_NAND_DEVICE 1 |
| 106 | #define CFG_NAND_BASE 0x40000000 |
| 107 | |
| 108 | /* NOR flash - no real flash on this board */ |
| 109 | #define CFG_NO_FLASH 1 |
| 110 | |
| 111 | /* Ethernet */ |
| 112 | #define CONFIG_MACB 1 |
| 113 | #define CONFIG_RMII 1 |
| 114 | #define CONFIG_NET_MULTI 1 |
| 115 | #define CONFIG_NET_RETRY_COUNT 20 |
| 116 | #define CONFIG_RESET_PHY_R 1 |
| 117 | |
| 118 | /* USB */ |
| 119 | #define CONFIG_USB_OHCI_NEW 1 |
| 120 | #define LITTLEENDIAN 1 |
| 121 | #define CONFIG_DOS_PARTITION 1 |
| 122 | #define CFG_USB_OHCI_CPU_INIT 1 |
| 123 | #define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
| 124 | #define CFG_USB_OHCI_SLOT_NAME "at91sam9260" |
| 125 | #define CFG_USB_OHCI_MAX_ROOT_PORTS 2 |
| 126 | #define CONFIG_USB_STORAGE 1 |
| 127 | |
| 128 | #define CFG_LOAD_ADDR 0x22000000 /* load address */ |
| 129 | |
| 130 | #define CFG_MEMTEST_START PHYS_SDRAM |
| 131 | #define CFG_MEMTEST_END 0x23e00000 |
| 132 | |
| 133 | #undef CFG_USE_DATAFLASH_CS0 |
| 134 | #define CFG_USE_DATAFLASH_CS1 1 |
| 135 | #undef CFG_USE_NANDFLASH |
| 136 | |
| 137 | #ifdef CFG_USE_DATAFLASH_CS0 |
| 138 | |
| 139 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
| 140 | #define CFG_ENV_IS_IN_DATAFLASH 1 |
| 141 | #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
| 142 | #define CFG_ENV_OFFSET 0x4200 |
| 143 | #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) |
| 144 | #define CFG_ENV_SIZE 0x4200 |
| 145 | #define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x22000000 0x200040; bootm" |
| 146 | |
| 147 | #elif CFG_USE_DATAFLASH_CS1 |
| 148 | |
| 149 | /* bootstrap + u-boot + env + linux in dataflash on CS1 */ |
| 150 | #define CFG_ENV_IS_IN_DATAFLASH 1 |
| 151 | #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
| 152 | #define CFG_ENV_OFFSET 0x4200 |
| 153 | #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS1 + CFG_ENV_OFFSET) |
| 154 | #define CFG_ENV_SIZE 0x4200 |
| 155 | #define CONFIG_BOOTCOMMAND "cp.b 0xD003DE00 0x22000000 0x200040; bootm" |
| 156 | |
| 157 | #else /* CFG_USE_NANDFLASH */ |
| 158 | |
| 159 | /* bootstrap + u-boot + env + linux in nandflash */ |
| 160 | #define CFG_ENV_IS_IN_NAND 1 |
| 161 | #define CFG_ENV_OFFSET 0x60000 |
| 162 | #define CFG_ENV_OFFSET_REDUND 0x80000 |
| 163 | #define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
| 164 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
| 165 | |
| 166 | #endif |
| 167 | |
| 168 | #define CONFIG_BAUDRATE 115200 |
| 169 | #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| 170 | |
| 171 | #define CFG_PROMPT "U-Boot> " |
| 172 | #define CFG_CBSIZE 256 |
| 173 | #define CFG_MAXARGS 16 |
| 174 | #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) |
| 175 | #define CFG_LONGHELP 1 |
| 176 | #define CONFIG_CMDLINE_EDITING 1 |
| 177 | |
| 178 | #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) |
| 179 | /* |
| 180 | * Size of malloc() pool |
| 181 | */ |
| 182 | #define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000) |
| 183 | #define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ |
| 184 | |
| 185 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ |
| 186 | |
| 187 | #ifdef CONFIG_USE_IRQ |
| 188 | #error CONFIG_USE_IRQ not supported |
| 189 | #endif |
| 190 | |
| 191 | #endif |