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vishnupatekar086a2502015-11-29 01:07:27 +08001/*
2 * Copyright 2015 Vishnu Patekar
3 * Vishnu Patekar <vishnupatekar0510@gmail.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "sun8i-a83t.dtsi"
46
Jagan Teki0ca4d402018-08-05 00:40:12 +053047#include <dt-bindings/gpio/gpio.h>
48
vishnupatekar086a2502015-11-29 01:07:27 +080049/ {
50 model = "Allwinner A83T H8Homlet Proto Dev Board v2.0";
51 compatible = "allwinner,h8homlet-v2", "allwinner,sun8i-a83t";
52
53 aliases {
54 serial0 = &uart0;
55 };
56
57 chosen {
58 stdout-path = "serial0:115200n8";
59 };
Jagan Teki0ca4d402018-08-05 00:40:12 +053060
61 reg_usb0_vbus: reg-usb0-vbus {
62 compatible = "regulator-fixed";
63 regulator-name = "usb0-vbus";
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
66 regulator-boot-on;
67 enable-active-high;
68 gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
69 };
70
71 reg_usb1_vbus: reg-usb1-vbus {
72 compatible = "regulator-fixed";
73 regulator-name = "usb1-vbus";
74 regulator-min-microvolt = <5000000>;
75 regulator-max-microvolt = <5000000>;
76 regulator-boot-on;
77 enable-active-high;
78 gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
79 };
vishnupatekar086a2502015-11-29 01:07:27 +080080};
81
Chen-Yu Tsaifa06f7e2016-03-30 00:27:02 +080082&ehci0 {
83 status = "okay";
84};
85
Jagan Teki0ca4d402018-08-05 00:40:12 +053086&mmc0 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&mmc0_pins>;
89 vmmc-supply = <&reg_dcdc1>;
90 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
91 bus-width = <4>;
92 status = "okay";
93};
94
95&mmc2 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&mmc2_8bit_emmc_pins>;
98 vmmc-supply = <&reg_dcdc1>;
99 vqmmc-supply = <&reg_dcdc1>;
100 bus-width = <8>;
101 non-removable;
102 cap-mmc-hw-reset;
103 status = "okay";
104};
105
Chen-Yu Tsaifa06f7e2016-03-30 00:27:02 +0800106&ohci0 {
107 status = "okay";
108};
109
Jagan Teki0ca4d402018-08-05 00:40:12 +0530110&r_rsb {
111 status = "okay";
112
113 axp81x: pmic@3a3 {
114 compatible = "x-powers,axp818", "x-powers,axp813";
115 reg = <0x3a3>;
116 interrupt-parent = <&r_intc>;
117 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
118 eldoin-supply = <&reg_dcdc1>;
119 swin-supply = <&reg_dcdc1>;
120 };
121
122 ac100: codec@e89 {
123 compatible = "x-powers,ac100";
124 reg = <0xe89>;
125
126 ac100_codec: codec {
127 compatible = "x-powers,ac100-codec";
128 interrupt-parent = <&r_pio>;
129 interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
130 #clock-cells = <0>;
131 clock-output-names = "4M_adda";
132 };
133
134 ac100_rtc: rtc {
135 compatible = "x-powers,ac100-rtc";
136 interrupt-parent = <&r_intc>;
137 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
138 clocks = <&ac100_codec>;
139 #clock-cells = <1>;
140 clock-output-names = "cko1_rtc",
141 "cko2_rtc",
142 "cko3_rtc";
143 };
144 };
145};
146
147#include "axp81x.dtsi"
148
149&reg_aldo1 {
150 regulator-always-on;
151 regulator-min-microvolt = <1800000>;
152 regulator-max-microvolt = <1800000>;
153 regulator-name = "vcc-1v8";
154};
155
156&reg_aldo2 {
157 regulator-always-on;
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <1800000>;
160 regulator-name = "dram-pll";
161};
162
163&reg_aldo3 {
164 regulator-always-on;
165 regulator-min-microvolt = <3000000>;
166 regulator-max-microvolt = <3000000>;
167 regulator-name = "avcc";
168};
169
170&reg_dcdc1 {
171 regulator-always-on;
172 regulator-min-microvolt = <3300000>;
173 regulator-max-microvolt = <3300000>;
174 regulator-name = "vcc-3v3";
175};
176
177&reg_dcdc2 {
178 regulator-always-on;
179 regulator-min-microvolt = <700000>;
180 regulator-max-microvolt = <1100000>;
181 regulator-name = "vdd-cpua";
182};
183
184&reg_dcdc3 {
185 regulator-always-on;
186 regulator-min-microvolt = <700000>;
187 regulator-max-microvolt = <1100000>;
188 regulator-name = "vdd-cpub";
189};
190
191&reg_dcdc4 {
192 regulator-min-microvolt = <700000>;
193 regulator-max-microvolt = <1100000>;
194 regulator-name = "vdd-gpu";
195};
196
197&reg_dcdc5 {
198 regulator-always-on;
199 regulator-min-microvolt = <1500000>;
200 regulator-max-microvolt = <1500000>;
201 regulator-name = "vcc-dram";
202};
203
204&reg_dcdc6 {
205 regulator-always-on;
206 regulator-min-microvolt = <900000>;
207 regulator-max-microvolt = <900000>;
208 regulator-name = "vdd-sys";
209};
210
211&reg_dldo2 {
212 regulator-min-microvolt = <3300000>;
213 regulator-max-microvolt = <3300000>;
214 regulator-name = "vcc-mipi";
215};
216
217&reg_dldo4 {
218 /*
219 * The PHY requires 20ms after all voltages are applied until core
220 * logic is ready and 30ms after the reset pin is de-asserted.
221 * Set a 100ms delay to account for PMIC ramp time and board traces.
222 */
223 regulator-enable-ramp-delay = <100000>;
224 regulator-min-microvolt = <3300000>;
225 regulator-max-microvolt = <3300000>;
226 regulator-name = "vcc-ephy";
227};
228
229&reg_fldo1 {
230 regulator-min-microvolt = <1080000>;
231 regulator-max-microvolt = <1320000>;
232 regulator-name = "vdd12-hsic";
233};
234
235&reg_fldo2 {
236 /*
237 * Despite the embedded CPUs core not being used in any way,
238 * this must remain on or the system will hang.
239 */
240 regulator-always-on;
241 regulator-min-microvolt = <700000>;
242 regulator-max-microvolt = <1100000>;
243 regulator-name = "vdd-cpus";
244};
245
246&reg_rtc_ldo {
247 regulator-name = "vcc-rtc";
248};
249
250&reg_sw {
251 regulator-name = "vcc-wifi";
252};
253
vishnupatekar086a2502015-11-29 01:07:27 +0800254&uart0 {
255 pinctrl-names = "default";
Jagan Teki0ca4d402018-08-05 00:40:12 +0530256 pinctrl-0 = <&uart0_pb_pins>;
257 status = "okay";
258};
259
260&usbphy {
261 usb0_vbus-supply = <&reg_usb0_vbus>;
262 usb1_vbus-supply = <&reg_usb1_vbus>;
vishnupatekar086a2502015-11-29 01:07:27 +0800263 status = "okay";
264};
Chen-Yu Tsaifa06f7e2016-03-30 00:27:02 +0800265
266&usb_otg {
Jagan Teki0ca4d402018-08-05 00:40:12 +0530267 dr_mode = "host";
Chen-Yu Tsaifa06f7e2016-03-30 00:27:02 +0800268 status = "okay";
269};