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Stelian Popd99a8ff2008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Popad229a42008-11-07 13:55:14 +010031#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
Jean-Christophe PLAGNIOL-VILLARD6ebff362009-04-16 21:30:48 +020032#define CONFIG_SYS_HZ 1000
Stelian Popd99a8ff2008-05-08 20:52:22 +020033
Stelian Popd99a8ff2008-05-08 20:52:22 +020034#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
35#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
36#define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
Jean-Christophe PLAGNIOL-VILLARDdc39ae92009-04-16 21:30:44 +020037#define CONFIG_ARCH_CPU_INIT
Stelian Popd99a8ff2008-05-08 20:52:22 +020038#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39
40#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
41#define CONFIG_SETUP_MEMORY_TAGS 1
42#define CONFIG_INITRD_TAG 1
43
44#define CONFIG_SKIP_LOWLEVEL_INIT
45#define CONFIG_SKIP_RELOCATE_UBOOT
46
47/*
48 * Hardware drivers
49 */
50#define CONFIG_ATMEL_USART 1
51#undef CONFIG_USART0
52#undef CONFIG_USART1
53#undef CONFIG_USART2
54#define CONFIG_USART3 1 /* USART 3 is DBGU */
55
Stelian Pop820f2a92008-05-08 14:52:30 +020056/* LCD */
57#define CONFIG_LCD 1
58#define LCD_BPP LCD_COLOR8
59#define CONFIG_LCD_LOGO 1
60#undef LCD_TEST_PATTERN
61#define CONFIG_LCD_INFO 1
62#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop820f2a92008-05-08 14:52:30 +020064#define CONFIG_ATMEL_LCD 1
65#define CONFIG_ATMEL_LCD_BGR555 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Pop820f2a92008-05-08 14:52:30 +020067
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010068/* LED */
69#define CONFIG_AT91_LED
70#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
71#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
72#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
73
Stelian Popd99a8ff2008-05-08 20:52:22 +020074#define CONFIG_BOOTDELAY 3
75
Stelian Popd99a8ff2008-05-08 20:52:22 +020076/*
77 * BOOTP options
78 */
79#define CONFIG_BOOTP_BOOTFILESIZE 1
80#define CONFIG_BOOTP_BOOTPATH 1
81#define CONFIG_BOOTP_GATEWAY 1
82#define CONFIG_BOOTP_HOSTNAME 1
83
84/*
85 * Command line configuration.
86 */
87#include <config_cmd_default.h>
88#undef CONFIG_CMD_BDI
Stelian Popd99a8ff2008-05-08 20:52:22 +020089#undef CONFIG_CMD_FPGA
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020090#undef CONFIG_CMD_IMI
Stelian Popd99a8ff2008-05-08 20:52:22 +020091#undef CONFIG_CMD_IMLS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020092#undef CONFIG_CMD_LOADS
93#undef CONFIG_CMD_SOURCE
Stelian Popd99a8ff2008-05-08 20:52:22 +020094
95#define CONFIG_CMD_PING 1
96#define CONFIG_CMD_DHCP 1
97#define CONFIG_CMD_NAND 1
98#define CONFIG_CMD_USB 1
99
100/* SDRAM */
101#define CONFIG_NR_DRAM_BANKS 1
102#define PHYS_SDRAM 0x20000000
103#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
104
105/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +0100106#define CONFIG_ATMEL_DATAFLASH_SPI
Stelian Popd99a8ff2008-05-08 20:52:22 +0200107#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200108#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
109#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
110#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
111#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200112#define AT91_SPI_CLK 15000000
113#define DATAFLASH_TCSS (0x1a << 16)
114#define DATAFLASH_TCHS (0x1 << 24)
115
116/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100117#ifdef CONFIG_CMD_NAND
118#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_MAX_NAND_DEVICE 1
120#define CONFIG_SYS_NAND_BASE 0x40000000
121#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100122/* our ALE is AD22 */
123#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
124/* our CLE is AD21 */
125#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
126#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
127#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
128#endif
Stelian Popd99a8ff2008-05-08 20:52:22 +0200129
130/* NOR flash - no real flash on this board */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_NO_FLASH 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200132
133/* Ethernet */
134#define CONFIG_DRIVER_DM9000 1
135#define CONFIG_DM9000_BASE 0x30000000
136#define DM9000_IO CONFIG_DM9000_BASE
137#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
138#define CONFIG_DM9000_USE_16BIT 1
Remy Bohmere5a3bc22009-05-03 12:11:40 +0200139#define CONFIG_DM9000_NO_SROM 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200140#define CONFIG_NET_RETRY_COUNT 20
141#define CONFIG_RESET_PHY_R 1
142
143/* USB */
Jean-Christophe PLAGNIOL-VILLARD2b7178a2009-03-27 23:26:44 +0100144#define CONFIG_USB_ATMEL
Stelian Popd99a8ff2008-05-08 20:52:22 +0200145#define CONFIG_USB_OHCI_NEW 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200146#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
148#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
149#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
150#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Popd99a8ff2008-05-08 20:52:22 +0200151#define CONFIG_USB_STORAGE 1
Stelian Pop3e0cda02008-11-09 00:14:46 +0100152#define CONFIG_CMD_FAT 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200153
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200155
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
157#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200158
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
Stelian Popd99a8ff2008-05-08 20:52:22 +0200160
161/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200162#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100164#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200166#define CONFIG_ENV_SIZE 0x4200
Stelian Popd99a8ff2008-05-08 20:52:22 +0200167#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
168#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
169 "root=/dev/mtdblock0 " \
170 "mtdparts=at91_nand:-(root) " \
171 "rw rootfstype=jffs2"
172
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100173#elif CONFIG_SYS_USE_DATAFLASH_CS3
174
175/* bootstrap + u-boot + env + linux in dataflash on CS3 */
176#define CONFIG_ENV_IS_IN_DATAFLASH 1
177#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
178#define CONFIG_ENV_OFFSET 0x4200
179#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
180#define CONFIG_ENV_SIZE 0x4200
181#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
182#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
183 "root=/dev/mtdblock0 " \
184 "mtdparts=at91_nand:-(root) " \
185 "rw rootfstype=jffs2"
186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200188
189/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200190#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200191#define CONFIG_ENV_OFFSET 0x60000
192#define CONFIG_ENV_OFFSET_REDUND 0x80000
193#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200194#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
195#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
196 "root=/dev/mtdblock5 " \
197 "mtdparts=at91_nand:128k(bootstrap)ro," \
198 "256k(uboot)ro,128k(env1)ro," \
199 "128k(env2)ro,2M(linux),-(root) " \
200 "rw rootfstype=jffs2"
201
202#endif
203
204#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Popd99a8ff2008-05-08 20:52:22 +0200206
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#define CONFIG_SYS_PROMPT "U-Boot> "
208#define CONFIG_SYS_CBSIZE 256
209#define CONFIG_SYS_MAXARGS 16
210#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
211#define CONFIG_SYS_LONGHELP 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200212#define CONFIG_CMDLINE_EDITING 1
213
214#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
215/*
216 * Size of malloc() pool
217 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
219#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200220
221#define CONFIG_STACKSIZE (32*1024) /* regular stack */
222
223#ifdef CONFIG_USE_IRQ
224#error CONFIG_USE_IRQ not supported
225#endif
226
227#endif