Purna Chandra Mandal | a0e7908 | 2016-01-28 15:30:11 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * (c) 2015 Purna Chandra Mandal <purna.mandal@microchip.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CLK_MICROCHIP_PIC32 |
| 9 | #define __CLK_MICROCHIP_PIC32 |
| 10 | |
| 11 | /* clock output indices */ |
| 12 | #define BASECLK 0 |
| 13 | #define PLLCLK 1 |
| 14 | #define MPLL 2 |
| 15 | #define SYSCLK 3 |
| 16 | #define PB1CLK 4 |
| 17 | #define PB2CLK 5 |
| 18 | #define PB3CLK 6 |
| 19 | #define PB4CLK 7 |
| 20 | #define PB5CLK 8 |
| 21 | #define PB6CLK 9 |
| 22 | #define PB7CLK 10 |
| 23 | #define REF1CLK 11 |
| 24 | #define REF2CLK 12 |
| 25 | #define REF3CLK 13 |
| 26 | #define REF4CLK 14 |
| 27 | #define REF5CLK 15 |
| 28 | |
| 29 | #endif /* __CLK_MICROCHIP_PIC32 */ |