| Alex Dubov | a14a944 | 2011-01-23 21:59:10 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2007-2009 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #ifndef RESET_VECTOR_ADDRESS |
| 24 | #define RESET_VECTOR_ADDRESS 0xfffffffc |
| 25 | #endif |
| 26 | |
| 27 | #include <config.h> |
| 28 | |
| 29 | OUTPUT_ARCH(powerpc) |
| 30 | |
| 31 | PHDRS |
| 32 | { |
| 33 | text PT_LOAD; |
| 34 | bss PT_LOAD; |
| 35 | } |
| 36 | |
| 37 | SECTIONS |
| 38 | { |
| 39 | /* Read-only sections, merged into text segment: */ |
| 40 | . = + SIZEOF_HEADERS; |
| 41 | .interp : { *(.interp) } |
| 42 | /* To simplify mass deployment, environment precedes the monitor text in the |
| 43 | * same flash sector. |
| 44 | */ |
| 45 | .ppcenv CONFIG_ENV_ADDR : { common/env_embedded.o (.ppcenv) } |
| 46 | .text : |
| 47 | { |
| 48 | *(.text*) |
| 49 | } :text |
| 50 | _etext = .; |
| 51 | PROVIDE (etext = .); |
| 52 | .rodata : |
| 53 | { |
| 54 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
| 55 | } :text |
| 56 | |
| 57 | /* Read-write section, merged into data segment: */ |
| 58 | . = (. + 0x00FF) & 0xFFFFFF00; |
| 59 | _erotext = .; |
| 60 | PROVIDE (erotext = .); |
| 61 | .reloc : |
| 62 | { |
| 63 | _GOT2_TABLE_ = .; |
| 64 | KEEP(*(.got2)) |
| 65 | KEEP(*(.got)) |
| 66 | PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); |
| 67 | _FIXUP_TABLE_ = .; |
| 68 | KEEP(*(.fixup)) |
| 69 | } |
| 70 | __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; |
| 71 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
| 72 | |
| 73 | .data : |
| 74 | { |
| 75 | *(.data*) |
| 76 | *(.sdata*) |
| 77 | } |
| 78 | _edata = .; |
| 79 | PROVIDE (edata = .); |
| 80 | |
| 81 | . = .; |
| 82 | __u_boot_cmd_start = .; |
| 83 | .u_boot_cmd : { *(.u_boot_cmd) } |
| 84 | __u_boot_cmd_end = .; |
| 85 | |
| 86 | . = .; |
| 87 | __start___ex_table = .; |
| 88 | __ex_table : { *(__ex_table) } |
| 89 | __stop___ex_table = .; |
| 90 | |
| 91 | . = ALIGN(256); |
| 92 | __init_begin = .; |
| 93 | .text.init : { *(.text.init) } |
| 94 | .data.init : { *(.data.init) } |
| 95 | . = ALIGN(256); |
| 96 | __init_end = .; |
| 97 | |
| 98 | .bootpg RESET_VECTOR_ADDRESS - 0xffc : |
| 99 | { |
| 100 | arch/powerpc/cpu/mpc85xx/start.o (.bootpg) |
| 101 | } :text = 0xffff |
| 102 | |
| 103 | .resetvec RESET_VECTOR_ADDRESS : |
| 104 | { |
| 105 | KEEP(*(.resetvec)) |
| 106 | } :text = 0xffff |
| 107 | |
| 108 | . = RESET_VECTOR_ADDRESS + 0x4; |
| 109 | |
| 110 | /* |
| 111 | * Make sure that the bss segment isn't linked at 0x0, otherwise its |
| 112 | * address won't be updated during relocation fixups. Note that |
| 113 | * this is a temporary fix. Code to dynamically the fixup the bss |
| 114 | * location will be added in the future. When the bss relocation |
| 115 | * fixup code is present this workaround should be removed. |
| 116 | */ |
| 117 | #if (RESET_VECTOR_ADDRESS == 0xfffffffc) |
| 118 | . |= 0x10; |
| 119 | #endif |
| 120 | |
| 121 | __bss_start = .; |
| 122 | .bss (NOLOAD) : |
| 123 | { |
| 124 | *(.sbss*) |
| 125 | *(.bss*) |
| 126 | *(COMMON) |
| 127 | } :bss |
| 128 | |
| 129 | . = ALIGN(4); |
| 130 | _end = . ; |
| 131 | PROVIDE (end = .); |
| 132 | } |