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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Christian Riesch32b11272011-12-09 09:47:35 +00002/*
3 * Copyright (C) 2011 OMICRON electronics GmbH
4 *
Miquel Raynala430fa02018-08-16 17:30:07 +02005 * based on drivers/mtd/nand/raw/nand_spl_load.c
Christian Riesch32b11272011-12-09 09:47:35 +00006 *
7 * Copyright (C) 2011
8 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
Christian Riesch32b11272011-12-09 09:47:35 +00009 */
10
11#include <common.h>
Simon Glassff0960f2014-10-13 23:42:04 -060012#include <spi.h>
Christian Riesch32b11272011-12-09 09:47:35 +000013#include <spi_flash.h>
Nikita Kiryanov36afd452015-11-08 17:11:49 +020014#include <errno.h>
Tom Rinia4cc1c42012-08-14 14:34:10 -070015#include <spl.h>
Christian Riesch32b11272011-12-09 09:47:35 +000016
Philipp Tomsich2bac55b2017-04-17 17:45:11 +020017DECLARE_GLOBAL_DATA_PTR;
18
Tom Rinifa1a73f2014-04-03 07:52:55 -040019#ifdef CONFIG_SPL_OS_BOOT
20/*
21 * Load the kernel, check for a valid header we can parse, and if found load
22 * the kernel and then device tree.
23 */
Simon Glass2a2ee2a2016-09-24 18:20:13 -060024static int spi_load_image_os(struct spl_image_info *spl_image,
25 struct spi_flash *flash,
Tom Rinifa1a73f2014-04-03 07:52:55 -040026 struct image_header *header)
27{
Marek Vasut7e0f2262016-04-29 00:44:54 +020028 int err;
29
Tom Rinifa1a73f2014-04-03 07:52:55 -040030 /* Read for a header, parse or error out. */
Michal Simek51c12312018-10-04 09:30:20 +020031 spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header),
Tom Rinifa1a73f2014-04-03 07:52:55 -040032 (void *)header);
33
34 if (image_get_magic(header) != IH_MAGIC)
35 return -1;
36
Simon Glass2a2ee2a2016-09-24 18:20:13 -060037 err = spl_parse_image_header(spl_image, header);
Marek Vasut7e0f2262016-04-29 00:44:54 +020038 if (err)
39 return err;
Tom Rinifa1a73f2014-04-03 07:52:55 -040040
41 spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS,
Simon Glass2a2ee2a2016-09-24 18:20:13 -060042 spl_image->size, (void *)spl_image->load_addr);
Tom Rinifa1a73f2014-04-03 07:52:55 -040043
44 /* Read device tree. */
45 spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
46 CONFIG_SYS_SPI_ARGS_SIZE,
47 (void *)CONFIG_SYS_SPL_ARGS_ADDR);
48
49 return 0;
50}
51#endif
52
Lokesh Vutla00d55952016-05-24 10:34:40 +053053static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
54 ulong count, void *buf)
55{
56 struct spi_flash *flash = load->dev;
57 ulong ret;
58
59 ret = spi_flash_read(flash, sector, count, buf);
60 if (!ret)
61 return count;
62 else
63 return 0;
64}
Peng Fanec649332019-09-23 10:18:41 +080065
66unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash)
67{
68 return CONFIG_SYS_SPI_U_BOOT_OFFS;
69}
70
Christian Riesch32b11272011-12-09 09:47:35 +000071/*
72 * The main entry for SPI booting. It's necessary that SDRAM is already
73 * configured and available since this code loads the main U-Boot image
74 * from SPI into SDRAM and starts it from there.
75 */
Simon Glass2a2ee2a2016-09-24 18:20:13 -060076static int spl_spi_load_image(struct spl_image_info *spl_image,
77 struct spl_boot_device *bootdev)
Christian Riesch32b11272011-12-09 09:47:35 +000078{
Nikita Kiryanov36afd452015-11-08 17:11:49 +020079 int err = 0;
Peng Fanec649332019-09-23 10:18:41 +080080 unsigned int payload_offs;
Christian Riesch32b11272011-12-09 09:47:35 +000081 struct spi_flash *flash;
Tom Rinia4cc1c42012-08-14 14:34:10 -070082 struct image_header *header;
Christian Riesch32b11272011-12-09 09:47:35 +000083
84 /*
85 * Load U-Boot image from SPI flash into RAM
Patrick Delaunayb0cc1b82019-02-27 15:36:44 +010086 * In DM mode: defaults speed and mode will be
87 * taken from DT when available
Christian Riesch32b11272011-12-09 09:47:35 +000088 */
89
Nikita Kiryanov88e34e52014-08-20 15:08:48 +030090 flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
91 CONFIG_SF_DEFAULT_CS,
92 CONFIG_SF_DEFAULT_SPEED,
93 CONFIG_SF_DEFAULT_MODE);
Christian Riesch32b11272011-12-09 09:47:35 +000094 if (!flash) {
Tom Rinia4cc1c42012-08-14 14:34:10 -070095 puts("SPI probe failed.\n");
Nikita Kiryanov36afd452015-11-08 17:11:49 +020096 return -ENODEV;
Christian Riesch32b11272011-12-09 09:47:35 +000097 }
98
Peng Fanec649332019-09-23 10:18:41 +080099 payload_offs = spl_spi_get_uboot_offs(flash);
100
Michal Simek51c12312018-10-04 09:30:20 +0200101 header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
Christian Riesch32b11272011-12-09 09:47:35 +0000102
Philipp Tomsich2bac55b2017-04-17 17:45:11 +0200103#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
104 payload_offs = fdtdec_get_config_int(gd->fdt_blob,
105 "u-boot,spl-payload-offset",
106 payload_offs);
107#endif
108
Tom Rinifa1a73f2014-04-03 07:52:55 -0400109#ifdef CONFIG_SPL_OS_BOOT
Simon Glass2a2ee2a2016-09-24 18:20:13 -0600110 if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header))
Tom Rinifa1a73f2014-04-03 07:52:55 -0400111#endif
112 {
113 /* Load u-boot, mkimage header is 64 bytes. */
Michal Simek51c12312018-10-04 09:30:20 +0200114 err = spi_flash_read(flash, payload_offs, sizeof(*header),
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200115 (void *)header);
Simon Glassa7044902017-01-16 07:03:27 -0700116 if (err) {
117 debug("%s: Failed to read from SPI flash (err=%d)\n",
118 __func__, err);
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200119 return err;
Simon Glassa7044902017-01-16 07:03:27 -0700120 }
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200121
Marek Vasut26ad6482018-05-31 17:59:29 +0200122 if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
123 image_get_magic(header) == FDT_MAGIC) {
124 err = spi_flash_read(flash, payload_offs,
125 roundup(fdt_totalsize(header), 4),
126 (void *)CONFIG_SYS_LOAD_ADDR);
127 if (err)
128 return err;
129 err = spl_parse_image_header(spl_image,
130 (struct image_header *)CONFIG_SYS_LOAD_ADDR);
131 } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
132 image_get_magic(header) == FDT_MAGIC) {
Lokesh Vutla00d55952016-05-24 10:34:40 +0530133 struct spl_load_info load;
134
135 debug("Found FIT\n");
136 load.dev = flash;
137 load.priv = NULL;
138 load.filename = NULL;
139 load.bl_len = 1;
140 load.read = spl_spi_fit_read;
Simon Glassf4d7d852016-09-24 18:20:16 -0600141 err = spl_load_simple_fit(spl_image, &load,
Philipp Tomsich2bac55b2017-04-17 17:45:11 +0200142 payload_offs,
Lokesh Vutla00d55952016-05-24 10:34:40 +0530143 header);
Peng Fand9bd2f42019-09-23 10:18:47 +0800144 } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
145 struct spl_load_info load;
146
147 load.dev = flash;
148 load.priv = NULL;
149 load.filename = NULL;
150 load.bl_len = 1;
151 load.read = spl_spi_fit_read;
152
153 err = spl_load_imx_container(spl_image, &load,
154 payload_offs);
Lokesh Vutla00d55952016-05-24 10:34:40 +0530155 } else {
Simon Glass2a2ee2a2016-09-24 18:20:13 -0600156 err = spl_parse_image_header(spl_image, header);
Lokesh Vutla00d55952016-05-24 10:34:40 +0530157 if (err)
158 return err;
Philipp Tomsich2bac55b2017-04-17 17:45:11 +0200159 err = spi_flash_read(flash, payload_offs,
Simon Glass2a2ee2a2016-09-24 18:20:13 -0600160 spl_image->size,
161 (void *)spl_image->load_addr);
Lokesh Vutla00d55952016-05-24 10:34:40 +0530162 }
Tom Rinifa1a73f2014-04-03 07:52:55 -0400163 }
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200164
165 return err;
Christian Riesch32b11272011-12-09 09:47:35 +0000166}
Simon Glass139db7a2016-09-24 18:20:09 -0600167/* Use priorty 1 so that boards can override this */
Simon Glassebc4ef62016-11-30 15:30:50 -0700168SPL_LOAD_IMAGE_METHOD("SPI", 1, BOOT_DEVICE_SPI, spl_spi_load_image);