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Daniel Hellstrom6ed8a432008-03-26 23:38:48 +01001/* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
4 *
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2008
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
10 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020011 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010012 */
13
14#ifndef __CONFIG_H__
15#define __CONFIG_H__
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
21
22#define CONFIG_LEON3 /* This is an LEON3 CPU */
23#define CONFIG_LEON 1 /* This is an LEON CPU */
24#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
25
26#define CONFIG_LEON_RAM_SRAM 1
27#define CONFIG_LEON_RAM_SDRAM 2
28#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
29
30/* Select Memory to run from
31 *
32 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
33 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
34 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
35 *
36 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
37 * it doesn't fit into the 4Mb SRAM.
38 *
39 * SRAM is default since it will work for all systems, however will not
40 * be able to boot linux.
41 */
42#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
43
44/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020045#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010046
47/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020048#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010049
50/*
51 * Serial console configuration
52 */
53#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010055
56/* Partitions */
57#define CONFIG_DOS_PARTITION
58#define CONFIG_MAC_PARTITION
59#define CONFIG_ISO_PARTITION
60
61/*
62 * Supported commands
63 */
64#include <config_cmd_default.h>
65
66#define CONFIG_CMD_REGINFO
67#define CONFIG_CMD_AMBAPP
68#define CONFIG_CMD_PING
69#define CONFIG_CMD_DIAG
70#define CONFIG_CMD_IRQ
71
72/*
73 * Autobooting
74 */
75#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
76
77#define CONFIG_PREBOOT "echo;" \
78 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
79 "echo"
80
81#undef CONFIG_BOOTARGS
82
83#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
84 "netdev=eth0\0" \
85 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
86 "nfsroot=${serverip}:${rootpath}\0" \
87 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
88 "addip=setenv bootargs ${bootargs} " \
89 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
90 ":${hostname}:${netdev}:off panic=1\0" \
91 "flash_nfs=run nfsargs addip;" \
92 "bootm ${kernel_addr}\0" \
93 "flash_self=run ramargs addip;" \
94 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000095 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010096 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
97
98#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
99#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
100 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
101 "scratch=40200000\0" \
102 ""
103#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
104#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
105 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
106 "scratch=60800000\0" \
107 ""
108#else
109/* More than 4Mb is assumed when running from SDRAM */
110#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
111 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
112 "scratch=40800000\0" \
113 ""
114#endif
115
116#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
117
118#define CONFIG_NETMASK 255.255.255.0
119#define CONFIG_GATEWAYIP 192.168.0.1
120#define CONFIG_SERVERIP 192.168.0.20
121#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000122#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100123#define CONFIG_HOSTNAME ax2000
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000124#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100125
126#define CONFIG_BOOTCOMMAND "run flash_self"
127
128/* Memory MAP
129 *
130 * Flash:
131 * |--------------------------------|
132 * | 0x00000000 Text & Data & BSS | *
133 * | for Monitor | *
134 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
135 * | UNUSED / Growth | * 256kb
136 * |--------------------------------|
137 * | 0x00050000 Base custom area | *
138 * | kernel / FS | *
139 * | | * Rest of Flash
140 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
141 * | END-0x00008000 Environment | * 32kb
142 * |--------------------------------|
143 *
144 *
145 *
146 * Main Memory (4Mb SRAM or XMb SDRAM):
147 * |--------------------------------|
148 * | UNUSED / scratch area |
149 * | |
150 * | |
151 * | |
152 * | |
153 * |--------------------------------|
154 * | Monitor .Text / .DATA / .BSS | * 256kb
155 * | Relocated! | *
156 * |--------------------------------|
157 * | Monitor Malloc | * 128kb (contains relocated environment)
158 * |--------------------------------|
159 * | Monitor/kernel STACK | * 64kb
160 * |--------------------------------|
161 * | Page Table for MMU systems | * 2k
162 * |--------------------------------|
163 * | PROM Code accessed from Linux | * 6kb-128b
164 * |--------------------------------|
165 * | Global data (avail from kernel)| * 128b
166 * |--------------------------------|
167 *
168 */
169
170/*
171 * Flash configuration (8,16 or 32 MB)
172 * TEXT base always at 0xFFF00000
173 * ENV_ADDR always at 0xFFF40000
174 * FLASH_BASE at 0xFC000000 for 64 MB
175 * 0xFE000000 for 32 MB
176 * 0xFF000000 for 16 MB
177 * 0xFF800000 for 8 MB
178 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179/*#define CONFIG_SYS_NO_FLASH 1*/
180#define CONFIG_SYS_FLASH_BASE 0x00000000
181#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100182
183#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
185#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
188#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
189#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
190#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
191#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100192
193/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200195#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100197/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100199/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100201
202/*
203 * Environment settings
204 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200205/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200206#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200207/* CONFIG_ENV_ADDR need to be at sector boundary */
208#define CONFIG_ENV_SIZE 0x8000
209#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100211#define CONFIG_ENV_OVERWRITE 1
212
213/*
214 * Memory map
215 *
216 * Always 4Mb SRAM available
217 * SDRAM module may be available on 0x60000000, SDRAM
218 * is configured as if a 128Mb SDRAM module is available.
219 */
220
221#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_SDRAM_BASE 0x40000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100223#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224#define CONFIG_SYS_SDRAM_BASE 0x60000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100225#endif
226
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200227#define CONFIG_SYS_SDRAM_SIZE 0x08000000
228#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100229
230/* 4Mb SRAM available */
231#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_SRAM_BASE 0x40000000
233#define CONFIG_SYS_SRAM_SIZE 0x400000
234#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100235#endif
236
237/* Select RAM used to run U-BOOT from... */
238#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200239#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
240#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
241#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100242#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
244#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
245#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100246#endif
247
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200248#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100249
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200250#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100252
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200253#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
254#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100255
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200256#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200257#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
258# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100259#endif
260
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200261#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
262#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
263#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100264
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200265#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
266#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100267
268/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200269#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
270#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100271
272/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200273#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100274
275/*
276 * Ethernet configuration uses on board SMC91C111
277 */
Ben Warren7194ab82009-10-04 22:37:03 -0700278#define CONFIG_SMC91111 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100279#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
280#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
281#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
282/*#define CONFIG_SHOW_ACTIVITY*/
283#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
284
285#define CONFIG_ETHADDR 00:00:7a:cc:00:13
286#define CONFIG_PHY_ADDR 0x00
287
288/*
289 * Miscellaneous configurable options
290 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100292#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200293#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100294#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100296#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200297#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
298#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
299#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100300
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200301#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
302#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100303
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200304#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100305
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100306/*
307 * Various low-level settings
308 */
309
310/*-----------------------------------------------------------------------
311 * USB stuff
312 *-----------------------------------------------------------------------
313 */
314#define CONFIG_USB_CLOCK 0x0001BBBB
315#define CONFIG_USB_CONFIG 0x00005000
316
317/***** Gaisler GRLIB IP-Cores Config ********/
318
319/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200320/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100321
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200322#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100323
324/* See, GRLIB Docs (grip.pdf) on how to set up
325 * These the memory controller registers.
326 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200327#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100328#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200329#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100330#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200331#define CONFIG_SYS_GRLIB_MEMCFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100332#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200333#define CONFIG_SYS_GRLIB_MEMCFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100334
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200335#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100336#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200337#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100338#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200339#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100340#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200341#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100342
343/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200344#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100345
346/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
348#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100349
350/* Calculate scaler register value from default baudrate */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200351#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100352 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
353
354/* Identification string */
355#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
356
357/* default kernel command line */
358#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
359
360#endif /* __CONFIG_H */