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wdenk81a88242002-10-26 15:22:42 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * I2C Functions similar to the standard memory functions.
26 *
27 * There are several parameters in many of the commands that bear further
28 * explanations:
29 *
wdenk81a88242002-10-26 15:22:42 +000030 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
31 * Each I2C chip on the bus has a unique address. On the I2C data bus,
32 * the address is the upper seven bits and the LSB is the "read/write"
33 * bit. Note that the {i2c_chip} address specified on the command
34 * line is not shifted up: e.g. a typical EEPROM memory chip may have
35 * an I2C address of 0x50, but the data put on the bus will be 0xA0
36 * for write and 0xA1 for read. This "non shifted" address notation
37 * matches at least half of the data sheets :-/.
38 *
39 * {addr} is the address (or offset) within the chip. Small memory
40 * chips have 8 bit addresses. Large memory chips have 16 bit
41 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
42 * Many non-memory chips have multiple registers and {addr} is used
43 * as the register index. Some non-memory chips have only one register
44 * and therefore don't need any {addr} parameter.
45 *
46 * The default {addr} parameter is one byte (.1) which works well for
47 * memories and registers with 8 bits of address space.
48 *
49 * You can specify the length of the {addr} field with the optional .0,
50 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
51 * manipulating a single register device which doesn't use an address
52 * field, use "0.0" for the address and the ".0" length field will
53 * suppress the address in the I2C data stream. This also works for
54 * successive reads using the I2C auto-incrementing memory pointer.
55 *
56 * If you are manipulating a large memory with 2-byte addresses, use
57 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
58 *
59 * Then there are the unfortunate memory chips that spill the most
60 * significant 1, 2, or 3 bits of address into the chip address byte.
61 * This effectively makes one chip (logically) look like 2, 4, or
62 * 8 chips. This is handled (awkwardly) by #defining
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
wdenk81a88242002-10-26 15:22:42 +000064 * {addr} field (since .1 is the default, it doesn't actually have to
65 * be specified). Examples: given a memory chip at I2C chip address
66 * 0x50, the following would happen...
Peter Tyser0f89c542009-04-18 22:34:03 -050067 * i2c md 50 0 10 display 16 bytes starting at 0x000
wdenk81a88242002-10-26 15:22:42 +000068 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
Peter Tyser0f89c542009-04-18 22:34:03 -050069 * i2c md 50 100 10 display 16 bytes starting at 0x100
wdenk81a88242002-10-26 15:22:42 +000070 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
Peter Tyser0f89c542009-04-18 22:34:03 -050071 * i2c md 50 210 10 display 16 bytes starting at 0x210
wdenk81a88242002-10-26 15:22:42 +000072 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
73 * This is awfully ugly. It would be nice if someone would think up
74 * a better way of handling this.
75 *
76 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
77 */
78
79#include <common.h>
80#include <command.h>
Heiko Schocher67b23a32008-10-15 09:39:47 +020081#include <environment.h>
wdenk81a88242002-10-26 15:22:42 +000082#include <i2c.h>
Heiko Schocher67b23a32008-10-15 09:39:47 +020083#include <malloc.h>
wdenk81a88242002-10-26 15:22:42 +000084#include <asm/byteorder.h>
85
wdenk81a88242002-10-26 15:22:42 +000086/* Display values from last command.
87 * Memory modify remembered values are different from display memory.
88 */
89static uchar i2c_dp_last_chip;
90static uint i2c_dp_last_addr;
91static uint i2c_dp_last_alen;
92static uint i2c_dp_last_length = 0x10;
93
94static uchar i2c_mm_last_chip;
95static uint i2c_mm_last_addr;
96static uint i2c_mm_last_alen;
97
Ben Warrenbb99ad62006-09-07 16:50:54 -040098/* If only one I2C bus is present, the list of devices to ignore when
99 * the probe command is issued is represented by a 1D array of addresses.
100 * When multiple buses are present, the list is an array of bus-address
101 * pairs. The following macros take care of this */
102
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200103#if defined(CONFIG_SYS_I2C_NOPROBES)
Ben Warrenbb99ad62006-09-07 16:50:54 -0400104#if defined(CONFIG_I2C_MULTI_BUS)
105static struct
106{
107 uchar bus;
108 uchar addr;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109} i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
Ben Warrenbb99ad62006-09-07 16:50:54 -0400110#define GET_BUS_NUM i2c_get_bus_num()
111#define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
112#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
113#define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
114#else /* single bus */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
Ben Warrenbb99ad62006-09-07 16:50:54 -0400116#define GET_BUS_NUM 0
117#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
118#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
119#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
120#endif /* CONFIG_MULTI_BUS */
121
122#define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
wdenk81a88242002-10-26 15:22:42 +0000123#endif
124
Heiko Schocher67b23a32008-10-15 09:39:47 +0200125#if defined(CONFIG_I2C_MUX)
126static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
Heiko Schocher67b23a32008-10-15 09:39:47 +0200128
129DECLARE_GLOBAL_DATA_PTR;
130
131#endif
132
Frans Meulenbroeksa266fe92010-03-26 09:46:40 +0100133#define DISP_LINE_LEN 16
134
Peter Tyser655b34a2009-04-18 22:34:01 -0500135/* TODO: Implement architecture-specific get/set functions */
136unsigned int __def_i2c_get_bus_speed(void)
137{
138 return CONFIG_SYS_I2C_SPEED;
139}
140unsigned int i2c_get_bus_speed(void)
141 __attribute__((weak, alias("__def_i2c_get_bus_speed")));
142
143int __def_i2c_set_bus_speed(unsigned int speed)
144{
145 if (speed != CONFIG_SYS_I2C_SPEED)
146 return -1;
147
148 return 0;
149}
150int i2c_set_bus_speed(unsigned int)
151 __attribute__((weak, alias("__def_i2c_set_bus_speed")));
152
Frans Meulenbroeks652e5352010-02-25 10:12:16 +0100153/*
154 * Syntax:
155 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
156 */
157
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100158static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
Frans Meulenbroeks652e5352010-02-25 10:12:16 +0100159{
160 u_char chip;
161 uint devaddr, alen, length;
162 u_char *memaddr;
163 int j;
164
165 if (argc != 5) {
166 cmd_usage(cmdtp);
167 return 1;
168 }
169
170 /*
171 * I2C chip address
172 */
173 chip = simple_strtoul(argv[1], NULL, 16);
174
175 /*
176 * I2C data address within the chip. This can be 1 or
177 * 2 bytes long. Some day it might be 3 bytes long :-).
178 */
179 devaddr = simple_strtoul(argv[2], NULL, 16);
180 alen = 1;
181 for (j = 0; j < 8; j++) {
182 if (argv[2][j] == '.') {
183 alen = argv[2][j+1] - '0';
184 if (alen > 3) {
185 cmd_usage(cmdtp);
186 return 1;
187 }
188 break;
189 } else if (argv[2][j] == '\0')
190 break;
191 }
192
193 /*
194 * Length is the number of objects, not number of bytes.
195 */
196 length = simple_strtoul(argv[3], NULL, 16);
197
198 /*
199 * memaddr is the address where to store things in memory
200 */
201 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
202
203 if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) {
204 puts ("Error reading the chip.\n");
205 return 1;
206 }
207 return 0;
208}
209
Frans Meulenbroeks4a8cf332010-03-26 09:46:39 +0100210/*
211 * Syntax:
212 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
213 */
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100214static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000215{
216 u_char chip;
217 uint addr, alen, length;
218 int j, nbytes, linebytes;
219
220 /* We use the last specified parameters, unless new ones are
221 * entered.
222 */
223 chip = i2c_dp_last_chip;
224 addr = i2c_dp_last_addr;
225 alen = i2c_dp_last_alen;
226 length = i2c_dp_last_length;
227
228 if (argc < 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600229 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000230 return 1;
231 }
232
233 if ((flag & CMD_FLAG_REPEAT) == 0) {
234 /*
235 * New command specified.
236 */
237 alen = 1;
238
239 /*
240 * I2C chip address
241 */
242 chip = simple_strtoul(argv[1], NULL, 16);
243
244 /*
245 * I2C data address within the chip. This can be 1 or
246 * 2 bytes long. Some day it might be 3 bytes long :-).
247 */
248 addr = simple_strtoul(argv[2], NULL, 16);
249 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600250 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000251 if (argv[2][j] == '.') {
252 alen = argv[2][j+1] - '0';
Frans Meulenbroeksfaffe142010-02-25 10:12:12 +0100253 if (alen > 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600254 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000255 return 1;
256 }
257 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600258 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000259 break;
wdenk81a88242002-10-26 15:22:42 +0000260 }
261
262 /*
263 * If another parameter, it is the length to display.
264 * Length is the number of objects, not number of bytes.
265 */
266 if (argc > 3)
267 length = simple_strtoul(argv[3], NULL, 16);
268 }
269
270 /*
271 * Print the lines.
272 *
273 * We buffer all read data, so we can make sure data is read only
274 * once.
275 */
276 nbytes = length;
277 do {
278 unsigned char linebuf[DISP_LINE_LEN];
279 unsigned char *cp;
280
281 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
282
Timur Tabie857a5b2006-11-28 12:09:35 -0600283 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000284 puts ("Error reading the chip.\n");
Timur Tabie857a5b2006-11-28 12:09:35 -0600285 else {
wdenk81a88242002-10-26 15:22:42 +0000286 printf("%04x:", addr);
287 cp = linebuf;
288 for (j=0; j<linebytes; j++) {
289 printf(" %02x", *cp++);
290 addr++;
291 }
wdenk4b9206e2004-03-23 22:14:11 +0000292 puts (" ");
wdenk81a88242002-10-26 15:22:42 +0000293 cp = linebuf;
294 for (j=0; j<linebytes; j++) {
295 if ((*cp < 0x20) || (*cp > 0x7e))
wdenk4b9206e2004-03-23 22:14:11 +0000296 puts (".");
wdenk81a88242002-10-26 15:22:42 +0000297 else
298 printf("%c", *cp);
299 cp++;
300 }
wdenk4b9206e2004-03-23 22:14:11 +0000301 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000302 }
303 nbytes -= linebytes;
304 } while (nbytes > 0);
305
306 i2c_dp_last_chip = chip;
307 i2c_dp_last_addr = addr;
308 i2c_dp_last_alen = alen;
309 i2c_dp_last_length = length;
310
311 return 0;
312}
313
wdenk81a88242002-10-26 15:22:42 +0000314
315/* Write (fill) memory
316 *
317 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500318 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
wdenk81a88242002-10-26 15:22:42 +0000319 */
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100320static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000321{
322 uchar chip;
323 ulong addr;
324 uint alen;
325 uchar byte;
326 int count;
327 int j;
328
329 if ((argc < 4) || (argc > 5)) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600330 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000331 return 1;
332 }
333
334 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200335 * Chip is always specified.
336 */
wdenk81a88242002-10-26 15:22:42 +0000337 chip = simple_strtoul(argv[1], NULL, 16);
338
339 /*
340 * Address is always specified.
341 */
342 addr = simple_strtoul(argv[2], NULL, 16);
343 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600344 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000345 if (argv[2][j] == '.') {
346 alen = argv[2][j+1] - '0';
Frans Meulenbroeksfaffe142010-02-25 10:12:12 +0100347 if (alen > 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600348 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000349 return 1;
350 }
351 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600352 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000353 break;
wdenk81a88242002-10-26 15:22:42 +0000354 }
355
356 /*
357 * Value to write is always specified.
358 */
359 byte = simple_strtoul(argv[3], NULL, 16);
360
361 /*
362 * Optional count
363 */
Timur Tabie857a5b2006-11-28 12:09:35 -0600364 if (argc == 5)
wdenk81a88242002-10-26 15:22:42 +0000365 count = simple_strtoul(argv[4], NULL, 16);
Timur Tabie857a5b2006-11-28 12:09:35 -0600366 else
wdenk81a88242002-10-26 15:22:42 +0000367 count = 1;
wdenk81a88242002-10-26 15:22:42 +0000368
369 while (count-- > 0) {
Timur Tabie857a5b2006-11-28 12:09:35 -0600370 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000371 puts ("Error writing the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000372 /*
373 * Wait for the write to complete. The write can take
374 * up to 10mSec (we allow a little more time).
wdenk81a88242002-10-26 15:22:42 +0000375 */
d4f5c722005-08-12 21:16:13 +0200376/*
377 * No write delay with FRAM devices.
378 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200379#if !defined(CONFIG_SYS_I2C_FRAM)
wdenk81a88242002-10-26 15:22:42 +0000380 udelay(11000);
d4f5c722005-08-12 21:16:13 +0200381#endif
wdenk81a88242002-10-26 15:22:42 +0000382 }
383
384 return (0);
385}
386
wdenk81a88242002-10-26 15:22:42 +0000387/* Calculate a CRC on memory
388 *
389 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500390 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
wdenk81a88242002-10-26 15:22:42 +0000391 */
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100392static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000393{
394 uchar chip;
395 ulong addr;
396 uint alen;
397 int count;
398 uchar byte;
399 ulong crc;
400 ulong err;
401 int j;
402
403 if (argc < 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600404 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000405 return 1;
406 }
407
408 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200409 * Chip is always specified.
410 */
wdenk81a88242002-10-26 15:22:42 +0000411 chip = simple_strtoul(argv[1], NULL, 16);
412
413 /*
414 * Address is always specified.
415 */
416 addr = simple_strtoul(argv[2], NULL, 16);
417 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600418 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000419 if (argv[2][j] == '.') {
420 alen = argv[2][j+1] - '0';
Frans Meulenbroeksfaffe142010-02-25 10:12:12 +0100421 if (alen > 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600422 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000423 return 1;
424 }
425 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600426 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000427 break;
wdenk81a88242002-10-26 15:22:42 +0000428 }
429
430 /*
431 * Count is always specified
432 */
433 count = simple_strtoul(argv[3], NULL, 16);
434
435 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
436 /*
437 * CRC a byte at a time. This is going to be slooow, but hey, the
438 * memories are small and slow too so hopefully nobody notices.
439 */
440 crc = 0;
441 err = 0;
Timur Tabie857a5b2006-11-28 12:09:35 -0600442 while (count-- > 0) {
443 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
wdenk81a88242002-10-26 15:22:42 +0000444 err++;
wdenk81a88242002-10-26 15:22:42 +0000445 crc = crc32 (crc, &byte, 1);
446 addr++;
447 }
Timur Tabie857a5b2006-11-28 12:09:35 -0600448 if (err > 0)
wdenk4b9206e2004-03-23 22:14:11 +0000449 puts ("Error reading the chip,\n");
Timur Tabie857a5b2006-11-28 12:09:35 -0600450 else
wdenk81a88242002-10-26 15:22:42 +0000451 printf ("%08lx\n", crc);
wdenk81a88242002-10-26 15:22:42 +0000452
453 return 0;
454}
455
wdenk81a88242002-10-26 15:22:42 +0000456/* Modify memory.
457 *
458 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500459 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
460 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
wdenk81a88242002-10-26 15:22:42 +0000461 */
462
463static int
464mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
465{
466 uchar chip;
467 ulong addr;
468 uint alen;
469 ulong data;
470 int size = 1;
471 int nbytes;
472 int j;
473 extern char console_buffer[];
474
475 if (argc != 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600476 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000477 return 1;
478 }
479
480#ifdef CONFIG_BOOT_RETRY_TIME
481 reset_cmd_timeout(); /* got a good command to get here */
482#endif
483 /*
484 * We use the last specified parameters, unless new ones are
485 * entered.
486 */
487 chip = i2c_mm_last_chip;
488 addr = i2c_mm_last_addr;
489 alen = i2c_mm_last_alen;
490
491 if ((flag & CMD_FLAG_REPEAT) == 0) {
492 /*
493 * New command specified. Check for a size specification.
494 * Defaults to byte if no or incorrect specification.
495 */
496 size = cmd_get_data_size(argv[0], 1);
497
498 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200499 * Chip is always specified.
500 */
wdenk81a88242002-10-26 15:22:42 +0000501 chip = simple_strtoul(argv[1], NULL, 16);
502
503 /*
504 * Address is always specified.
505 */
506 addr = simple_strtoul(argv[2], NULL, 16);
507 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600508 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000509 if (argv[2][j] == '.') {
510 alen = argv[2][j+1] - '0';
Frans Meulenbroeksfaffe142010-02-25 10:12:12 +0100511 if (alen > 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600512 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000513 return 1;
514 }
515 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600516 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000517 break;
wdenk81a88242002-10-26 15:22:42 +0000518 }
519 }
520
521 /*
522 * Print the address, followed by value. Then accept input for
523 * the next value. A non-converted value exits.
524 */
525 do {
526 printf("%08lx:", addr);
Timur Tabie857a5b2006-11-28 12:09:35 -0600527 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000528 puts ("\nError reading the chip,\n");
Timur Tabie857a5b2006-11-28 12:09:35 -0600529 else {
wdenk81a88242002-10-26 15:22:42 +0000530 data = cpu_to_be32(data);
Timur Tabie857a5b2006-11-28 12:09:35 -0600531 if (size == 1)
wdenk81a88242002-10-26 15:22:42 +0000532 printf(" %02lx", (data >> 24) & 0x000000FF);
Timur Tabie857a5b2006-11-28 12:09:35 -0600533 else if (size == 2)
wdenk81a88242002-10-26 15:22:42 +0000534 printf(" %04lx", (data >> 16) & 0x0000FFFF);
Timur Tabie857a5b2006-11-28 12:09:35 -0600535 else
wdenk81a88242002-10-26 15:22:42 +0000536 printf(" %08lx", data);
wdenk81a88242002-10-26 15:22:42 +0000537 }
538
539 nbytes = readline (" ? ");
540 if (nbytes == 0) {
541 /*
542 * <CR> pressed as only input, don't modify current
543 * location and move to next.
544 */
545 if (incrflag)
546 addr += size;
547 nbytes = size;
548#ifdef CONFIG_BOOT_RETRY_TIME
549 reset_cmd_timeout(); /* good enough to not time out */
550#endif
551 }
552#ifdef CONFIG_BOOT_RETRY_TIME
Timur Tabie857a5b2006-11-28 12:09:35 -0600553 else if (nbytes == -2)
wdenk81a88242002-10-26 15:22:42 +0000554 break; /* timed out, exit the command */
wdenk81a88242002-10-26 15:22:42 +0000555#endif
556 else {
557 char *endp;
558
559 data = simple_strtoul(console_buffer, &endp, 16);
Timur Tabie857a5b2006-11-28 12:09:35 -0600560 if (size == 1)
wdenk81a88242002-10-26 15:22:42 +0000561 data = data << 24;
Timur Tabie857a5b2006-11-28 12:09:35 -0600562 else if (size == 2)
wdenk81a88242002-10-26 15:22:42 +0000563 data = data << 16;
wdenk81a88242002-10-26 15:22:42 +0000564 data = be32_to_cpu(data);
565 nbytes = endp - console_buffer;
566 if (nbytes) {
567#ifdef CONFIG_BOOT_RETRY_TIME
568 /*
569 * good enough to not time out
570 */
571 reset_cmd_timeout();
572#endif
Timur Tabie857a5b2006-11-28 12:09:35 -0600573 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000574 puts ("Error writing the chip.\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200575#ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
576 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
wdenk2535d602003-07-17 23:16:40 +0000577#endif
wdenk81a88242002-10-26 15:22:42 +0000578 if (incrflag)
579 addr += size;
580 }
581 }
582 } while (nbytes);
583
Peter Tyser08007072008-08-15 14:36:32 -0500584 i2c_mm_last_chip = chip;
585 i2c_mm_last_addr = addr;
586 i2c_mm_last_alen = alen;
wdenk81a88242002-10-26 15:22:42 +0000587
588 return 0;
589}
590
591/*
592 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500593 * i2c probe {addr}{.0, .1, .2}
wdenk81a88242002-10-26 15:22:42 +0000594 */
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100595static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000596{
597 int j;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200598#if defined(CONFIG_SYS_I2C_NOPROBES)
wdenk81a88242002-10-26 15:22:42 +0000599 int k, skip;
Ben Warrenbb99ad62006-09-07 16:50:54 -0400600 uchar bus = GET_BUS_NUM;
601#endif /* NOPROBES */
wdenk81a88242002-10-26 15:22:42 +0000602
wdenk4b9206e2004-03-23 22:14:11 +0000603 puts ("Valid chip addresses:");
Timur Tabie857a5b2006-11-28 12:09:35 -0600604 for (j = 0; j < 128; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200605#if defined(CONFIG_SYS_I2C_NOPROBES)
wdenk81a88242002-10-26 15:22:42 +0000606 skip = 0;
Timur Tabie857a5b2006-11-28 12:09:35 -0600607 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
608 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
wdenk81a88242002-10-26 15:22:42 +0000609 skip = 1;
610 break;
611 }
612 }
613 if (skip)
614 continue;
615#endif
Timur Tabie857a5b2006-11-28 12:09:35 -0600616 if (i2c_probe(j) == 0)
wdenk81a88242002-10-26 15:22:42 +0000617 printf(" %02X", j);
wdenk81a88242002-10-26 15:22:42 +0000618 }
wdenk4b9206e2004-03-23 22:14:11 +0000619 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000620
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200621#if defined(CONFIG_SYS_I2C_NOPROBES)
wdenk81a88242002-10-26 15:22:42 +0000622 puts ("Excluded chip addresses:");
Timur Tabie857a5b2006-11-28 12:09:35 -0600623 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
624 if (COMPARE_BUS(bus,k))
Ben Warrenbb99ad62006-09-07 16:50:54 -0400625 printf(" %02X", NO_PROBE_ADDR(k));
626 }
wdenk4b9206e2004-03-23 22:14:11 +0000627 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000628#endif
629
630 return 0;
631}
632
wdenk81a88242002-10-26 15:22:42 +0000633/*
634 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500635 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
wdenk81a88242002-10-26 15:22:42 +0000636 * {length} - Number of bytes to read
637 * {delay} - A DECIMAL number and defaults to 1000 uSec
638 */
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100639static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000640{
641 u_char chip;
642 ulong alen;
643 uint addr;
644 uint length;
645 u_char bytes[16];
646 int delay;
647 int j;
648
649 if (argc < 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600650 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000651 return 1;
652 }
653
654 /*
655 * Chip is always specified.
656 */
657 chip = simple_strtoul(argv[1], NULL, 16);
658
659 /*
660 * Address is always specified.
661 */
662 addr = simple_strtoul(argv[2], NULL, 16);
663 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600664 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000665 if (argv[2][j] == '.') {
666 alen = argv[2][j+1] - '0';
Frans Meulenbroeksfaffe142010-02-25 10:12:12 +0100667 if (alen > 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600668 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000669 return 1;
670 }
671 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600672 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000673 break;
wdenk81a88242002-10-26 15:22:42 +0000674 }
675
676 /*
677 * Length is the number of objects, not number of bytes.
678 */
679 length = 1;
680 length = simple_strtoul(argv[3], NULL, 16);
Timur Tabie857a5b2006-11-28 12:09:35 -0600681 if (length > sizeof(bytes))
wdenk81a88242002-10-26 15:22:42 +0000682 length = sizeof(bytes);
wdenk81a88242002-10-26 15:22:42 +0000683
684 /*
685 * The delay time (uSec) is optional.
686 */
687 delay = 1000;
Timur Tabie857a5b2006-11-28 12:09:35 -0600688 if (argc > 3)
wdenk81a88242002-10-26 15:22:42 +0000689 delay = simple_strtoul(argv[4], NULL, 10);
wdenk81a88242002-10-26 15:22:42 +0000690 /*
691 * Run the loop...
692 */
Timur Tabie857a5b2006-11-28 12:09:35 -0600693 while (1) {
694 if (i2c_read(chip, addr, alen, bytes, length) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000695 puts ("Error reading the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000696 udelay(delay);
697 }
698
699 /* NOTREACHED */
700 return 0;
701}
702
wdenk81a88242002-10-26 15:22:42 +0000703/*
704 * The SDRAM command is separately configured because many
705 * (most?) embedded boards don't use SDRAM DIMMs.
706 */
Jon Loeligerc76fe472007-07-08 18:02:23 -0500707#if defined(CONFIG_CMD_SDRAM)
Larry Johnson632de062008-01-11 23:26:18 -0500708static void print_ddr2_tcyc (u_char const b)
709{
710 printf ("%d.", (b >> 4) & 0x0F);
711 switch (b & 0x0F) {
712 case 0x0:
713 case 0x1:
714 case 0x2:
715 case 0x3:
716 case 0x4:
717 case 0x5:
718 case 0x6:
719 case 0x7:
720 case 0x8:
721 case 0x9:
722 printf ("%d ns\n", b & 0x0F);
723 break;
724 case 0xA:
725 puts ("25 ns\n");
726 break;
727 case 0xB:
728 puts ("33 ns\n");
729 break;
730 case 0xC:
731 puts ("66 ns\n");
732 break;
733 case 0xD:
734 puts ("75 ns\n");
735 break;
736 default:
737 puts ("?? ns\n");
738 break;
739 }
740}
741
742static void decode_bits (u_char const b, char const *str[], int const do_once)
743{
744 u_char mask;
745
746 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
747 if (b & mask) {
748 puts (*str);
749 if (do_once)
750 return;
751 }
752 }
753}
wdenk81a88242002-10-26 15:22:42 +0000754
755/*
756 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500757 * i2c sdram {i2c_chip}
wdenk81a88242002-10-26 15:22:42 +0000758 */
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +0100759static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000760{
Larry Johnson632de062008-01-11 23:26:18 -0500761 enum { unknown, EDO, SDRAM, DDR2 } type;
762
wdenk81a88242002-10-26 15:22:42 +0000763 u_char chip;
764 u_char data[128];
765 u_char cksum;
766 int j;
767
Larry Johnson632de062008-01-11 23:26:18 -0500768 static const char *decode_CAS_DDR2[] = {
769 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
770 };
771
772 static const char *decode_CAS_default[] = {
773 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
774 };
775
776 static const char *decode_CS_WE_default[] = {
777 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
778 };
779
780 static const char *decode_byte21_default[] = {
781 " TBD (bit 7)\n",
782 " Redundant row address\n",
783 " Differential clock input\n",
784 " Registerd DQMB inputs\n",
785 " Buffered DQMB inputs\n",
786 " On-card PLL\n",
787 " Registered address/control lines\n",
788 " Buffered address/control lines\n"
789 };
790
791 static const char *decode_byte22_DDR2[] = {
792 " TBD (bit 7)\n",
793 " TBD (bit 6)\n",
794 " TBD (bit 5)\n",
795 " TBD (bit 4)\n",
796 " TBD (bit 3)\n",
797 " Supports partial array self refresh\n",
798 " Supports 50 ohm ODT\n",
799 " Supports weak driver\n"
800 };
801
802 static const char *decode_row_density_DDR2[] = {
803 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
804 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
805 };
806
807 static const char *decode_row_density_default[] = {
808 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
809 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
810 };
811
wdenk81a88242002-10-26 15:22:42 +0000812 if (argc < 2) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600813 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000814 return 1;
815 }
816 /*
817 * Chip is always specified.
Larry Johnson632de062008-01-11 23:26:18 -0500818 */
819 chip = simple_strtoul (argv[1], NULL, 16);
wdenk81a88242002-10-26 15:22:42 +0000820
Larry Johnson632de062008-01-11 23:26:18 -0500821 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000822 puts ("No SDRAM Serial Presence Detect found.\n");
wdenk81a88242002-10-26 15:22:42 +0000823 return 1;
824 }
825
826 cksum = 0;
827 for (j = 0; j < 63; j++) {
828 cksum += data[j];
829 }
Timur Tabie857a5b2006-11-28 12:09:35 -0600830 if (cksum != data[63]) {
wdenk81a88242002-10-26 15:22:42 +0000831 printf ("WARNING: Configuration data checksum failure:\n"
Larry Johnson632de062008-01-11 23:26:18 -0500832 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
wdenk81a88242002-10-26 15:22:42 +0000833 }
Larry Johnson632de062008-01-11 23:26:18 -0500834 printf ("SPD data revision %d.%d\n",
wdenk81a88242002-10-26 15:22:42 +0000835 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
Larry Johnson632de062008-01-11 23:26:18 -0500836 printf ("Bytes used 0x%02X\n", data[0]);
837 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
838
wdenk4b9206e2004-03-23 22:14:11 +0000839 puts ("Memory type ");
Larry Johnson632de062008-01-11 23:26:18 -0500840 switch (data[2]) {
Larry Johnson0df6b842008-01-10 22:23:39 -0500841 case 2:
842 type = EDO;
843 puts ("EDO\n");
844 break;
845 case 4:
846 type = SDRAM;
847 puts ("SDRAM\n");
848 break;
849 case 8:
850 type = DDR2;
851 puts ("DDR2\n");
852 break;
853 default:
854 type = unknown;
855 puts ("unknown\n");
856 break;
wdenk81a88242002-10-26 15:22:42 +0000857 }
Larry Johnson632de062008-01-11 23:26:18 -0500858
wdenk4b9206e2004-03-23 22:14:11 +0000859 puts ("Row address bits ");
Timur Tabie857a5b2006-11-28 12:09:35 -0600860 if ((data[3] & 0x00F0) == 0)
Larry Johnson632de062008-01-11 23:26:18 -0500861 printf ("%d\n", data[3] & 0x0F);
Timur Tabie857a5b2006-11-28 12:09:35 -0600862 else
Larry Johnson632de062008-01-11 23:26:18 -0500863 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
864
wdenk4b9206e2004-03-23 22:14:11 +0000865 puts ("Column address bits ");
Timur Tabie857a5b2006-11-28 12:09:35 -0600866 if ((data[4] & 0x00F0) == 0)
Larry Johnson632de062008-01-11 23:26:18 -0500867 printf ("%d\n", data[4] & 0x0F);
Timur Tabie857a5b2006-11-28 12:09:35 -0600868 else
Larry Johnson632de062008-01-11 23:26:18 -0500869 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500870
871 switch (type) {
872 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500873 printf ("Number of ranks %d\n",
874 (data[5] & 0x07) + 1);
Larry Johnson0df6b842008-01-10 22:23:39 -0500875 break;
876 default:
Larry Johnson632de062008-01-11 23:26:18 -0500877 printf ("Module rows %d\n", data[5]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500878 break;
879 }
880
881 switch (type) {
882 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500883 printf ("Module data width %d bits\n", data[6]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500884 break;
885 default:
Larry Johnson632de062008-01-11 23:26:18 -0500886 printf ("Module data width %d bits\n",
887 (data[7] << 8) | data[6]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500888 break;
889 }
890
wdenk4b9206e2004-03-23 22:14:11 +0000891 puts ("Interface signal levels ");
wdenk81a88242002-10-26 15:22:42 +0000892 switch(data[8]) {
Larry Johnson0df6b842008-01-10 22:23:39 -0500893 case 0: puts ("TTL 5.0 V\n"); break;
wdenk4b9206e2004-03-23 22:14:11 +0000894 case 1: puts ("LVTTL\n"); break;
Larry Johnson0df6b842008-01-10 22:23:39 -0500895 case 2: puts ("HSTL 1.5 V\n"); break;
896 case 3: puts ("SSTL 3.3 V\n"); break;
897 case 4: puts ("SSTL 2.5 V\n"); break;
898 case 5: puts ("SSTL 1.8 V\n"); break;
wdenk4b9206e2004-03-23 22:14:11 +0000899 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000900 }
Larry Johnson0df6b842008-01-10 22:23:39 -0500901
902 switch (type) {
903 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500904 printf ("SDRAM cycle time ");
905 print_ddr2_tcyc (data[9]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500906 break;
907 default:
Larry Johnson632de062008-01-11 23:26:18 -0500908 printf ("SDRAM cycle time %d.%d ns\n",
909 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500910 break;
911 }
912
913 switch (type) {
914 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500915 printf ("SDRAM access time 0.%d%d ns\n",
916 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500917 break;
918 default:
Larry Johnson632de062008-01-11 23:26:18 -0500919 printf ("SDRAM access time %d.%d ns\n",
920 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500921 break;
922 }
923
wdenk4b9206e2004-03-23 22:14:11 +0000924 puts ("EDC configuration ");
Larry Johnson632de062008-01-11 23:26:18 -0500925 switch (data[11]) {
wdenk4b9206e2004-03-23 22:14:11 +0000926 case 0: puts ("None\n"); break;
927 case 1: puts ("Parity\n"); break;
928 case 2: puts ("ECC\n"); break;
929 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000930 }
Larry Johnson632de062008-01-11 23:26:18 -0500931
Timur Tabie857a5b2006-11-28 12:09:35 -0600932 if ((data[12] & 0x80) == 0)
wdenk4b9206e2004-03-23 22:14:11 +0000933 puts ("No self refresh, rate ");
Timur Tabie857a5b2006-11-28 12:09:35 -0600934 else
wdenk4b9206e2004-03-23 22:14:11 +0000935 puts ("Self refresh, rate ");
Larry Johnson632de062008-01-11 23:26:18 -0500936
wdenk81a88242002-10-26 15:22:42 +0000937 switch(data[12] & 0x7F) {
Larry Johnson632de062008-01-11 23:26:18 -0500938 case 0: puts ("15.625 us\n"); break;
939 case 1: puts ("3.9 us\n"); break;
940 case 2: puts ("7.8 us\n"); break;
941 case 3: puts ("31.3 us\n"); break;
942 case 4: puts ("62.5 us\n"); break;
943 case 5: puts ("125 us\n"); break;
wdenk4b9206e2004-03-23 22:14:11 +0000944 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000945 }
Larry Johnson0df6b842008-01-10 22:23:39 -0500946
947 switch (type) {
948 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500949 printf ("SDRAM width (primary) %d\n", data[13]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500950 break;
951 default:
Larry Johnson632de062008-01-11 23:26:18 -0500952 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500953 if ((data[13] & 0x80) != 0) {
Larry Johnson632de062008-01-11 23:26:18 -0500954 printf (" (second bank) %d\n",
955 2 * (data[13] & 0x7F));
Larry Johnson0df6b842008-01-10 22:23:39 -0500956 }
957 break;
wdenk81a88242002-10-26 15:22:42 +0000958 }
Larry Johnson0df6b842008-01-10 22:23:39 -0500959
960 switch (type) {
961 case DDR2:
962 if (data[14] != 0)
Larry Johnson632de062008-01-11 23:26:18 -0500963 printf ("EDC width %d\n", data[14]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500964 break;
965 default:
966 if (data[14] != 0) {
Larry Johnson632de062008-01-11 23:26:18 -0500967 printf ("EDC width %d\n",
968 data[14] & 0x7F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500969
970 if ((data[14] & 0x80) != 0) {
Larry Johnson632de062008-01-11 23:26:18 -0500971 printf (" (second bank) %d\n",
972 2 * (data[14] & 0x7F));
Larry Johnson0df6b842008-01-10 22:23:39 -0500973 }
974 }
975 break;
976 }
977
Larry Johnson632de062008-01-11 23:26:18 -0500978 if (DDR2 != type) {
979 printf ("Min clock delay, back-to-back random column addresses "
980 "%d\n", data[15]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500981 }
982
wdenk4b9206e2004-03-23 22:14:11 +0000983 puts ("Burst length(s) ");
984 if (data[16] & 0x80) puts (" Page");
985 if (data[16] & 0x08) puts (" 8");
986 if (data[16] & 0x04) puts (" 4");
987 if (data[16] & 0x02) puts (" 2");
988 if (data[16] & 0x01) puts (" 1");
989 putc ('\n');
Larry Johnson632de062008-01-11 23:26:18 -0500990 printf ("Number of banks %d\n", data[17]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500991
992 switch (type) {
993 case DDR2:
994 puts ("CAS latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -0500995 decode_bits (data[18], decode_CAS_DDR2, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -0500996 putc ('\n');
997 break;
998 default:
999 puts ("CAS latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -05001000 decode_bits (data[18], decode_CAS_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -05001001 putc ('\n');
1002 break;
1003 }
1004
1005 if (DDR2 != type) {
1006 puts ("CS latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -05001007 decode_bits (data[19], decode_CS_WE_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -05001008 putc ('\n');
1009 }
1010
1011 if (DDR2 != type) {
1012 puts ("WE latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -05001013 decode_bits (data[20], decode_CS_WE_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -05001014 putc ('\n');
1015 }
1016
1017 switch (type) {
1018 case DDR2:
1019 puts ("Module attributes:\n");
1020 if (data[21] & 0x80)
1021 puts (" TBD (bit 7)\n");
1022 if (data[21] & 0x40)
1023 puts (" Analysis probe installed\n");
1024 if (data[21] & 0x20)
1025 puts (" TBD (bit 5)\n");
1026 if (data[21] & 0x10)
1027 puts (" FET switch external enable\n");
Larry Johnson632de062008-01-11 23:26:18 -05001028 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
Larry Johnson0df6b842008-01-10 22:23:39 -05001029 if (data[20] & 0x11) {
Larry Johnson632de062008-01-11 23:26:18 -05001030 printf (" %d active registers on DIMM\n",
1031 (data[21] & 0x03) + 1);
Larry Johnson0df6b842008-01-10 22:23:39 -05001032 }
1033 break;
1034 default:
1035 puts ("Module attributes:\n");
1036 if (!data[21])
1037 puts (" (none)\n");
Larry Johnson632de062008-01-11 23:26:18 -05001038 else
1039 decode_bits (data[21], decode_byte21_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -05001040 break;
1041 }
1042
1043 switch (type) {
1044 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001045 decode_bits (data[22], decode_byte22_DDR2, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -05001046 break;
1047 default:
1048 puts ("Device attributes:\n");
1049 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1050 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1051 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1052 else puts (" Upper Vcc tolerance 10%\n");
1053 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1054 else puts (" Lower Vcc tolerance 10%\n");
1055 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1056 if (data[22] & 0x04) puts (" Supports precharge all\n");
1057 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1058 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1059 break;
1060 }
1061
1062 switch (type) {
1063 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001064 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1065 print_ddr2_tcyc (data[23]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001066 break;
1067 default:
Larry Johnson632de062008-01-11 23:26:18 -05001068 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1069 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001070 break;
1071 }
1072
1073 switch (type) {
1074 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001075 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1076 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001077 break;
1078 default:
Larry Johnson632de062008-01-11 23:26:18 -05001079 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1080 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001081 break;
1082 }
1083
1084 switch (type) {
1085 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001086 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1087 print_ddr2_tcyc (data[25]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001088 break;
1089 default:
Larry Johnson632de062008-01-11 23:26:18 -05001090 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1091 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001092 break;
1093 }
1094
1095 switch (type) {
1096 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001097 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1098 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001099 break;
1100 default:
Larry Johnson632de062008-01-11 23:26:18 -05001101 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1102 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001103 break;
1104 }
1105
1106 switch (type) {
1107 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001108 printf ("Minimum row precharge %d.%02d ns\n",
1109 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
Larry Johnson0df6b842008-01-10 22:23:39 -05001110 break;
1111 default:
Larry Johnson632de062008-01-11 23:26:18 -05001112 printf ("Minimum row precharge %d ns\n", data[27]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001113 break;
1114 }
1115
1116 switch (type) {
1117 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001118 printf ("Row active to row active min %d.%02d ns\n",
1119 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
Larry Johnson0df6b842008-01-10 22:23:39 -05001120 break;
1121 default:
Larry Johnson632de062008-01-11 23:26:18 -05001122 printf ("Row active to row active min %d ns\n", data[28]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001123 break;
1124 }
1125
1126 switch (type) {
1127 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001128 printf ("RAS to CAS delay min %d.%02d ns\n",
1129 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
Larry Johnson0df6b842008-01-10 22:23:39 -05001130 break;
1131 default:
Larry Johnson632de062008-01-11 23:26:18 -05001132 printf ("RAS to CAS delay min %d ns\n", data[29]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001133 break;
1134 }
1135
Larry Johnson632de062008-01-11 23:26:18 -05001136 printf ("Minimum RAS pulse width %d ns\n", data[30]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001137
1138 switch (type) {
1139 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001140 puts ("Density of each row ");
1141 decode_bits (data[31], decode_row_density_DDR2, 1);
1142 putc ('\n');
Larry Johnson0df6b842008-01-10 22:23:39 -05001143 break;
1144 default:
Larry Johnson632de062008-01-11 23:26:18 -05001145 puts ("Density of each row ");
1146 decode_bits (data[31], decode_row_density_default, 1);
1147 putc ('\n');
Larry Johnson0df6b842008-01-10 22:23:39 -05001148 break;
1149 }
1150
1151 switch (type) {
1152 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001153 puts ("Command and Address setup ");
Larry Johnson0df6b842008-01-10 22:23:39 -05001154 if (data[32] >= 0xA0) {
Larry Johnson632de062008-01-11 23:26:18 -05001155 printf ("1.%d%d ns\n",
1156 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001157 } else {
Larry Johnson632de062008-01-11 23:26:18 -05001158 printf ("0.%d%d ns\n",
1159 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001160 }
1161 break;
1162 default:
Larry Johnson632de062008-01-11 23:26:18 -05001163 printf ("Command and Address setup %c%d.%d ns\n",
1164 (data[32] & 0x80) ? '-' : '+',
1165 (data[32] >> 4) & 0x07, data[32] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001166 break;
1167 }
1168
1169 switch (type) {
1170 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001171 puts ("Command and Address hold ");
Larry Johnson0df6b842008-01-10 22:23:39 -05001172 if (data[33] >= 0xA0) {
Larry Johnson632de062008-01-11 23:26:18 -05001173 printf ("1.%d%d ns\n",
1174 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001175 } else {
Larry Johnson632de062008-01-11 23:26:18 -05001176 printf ("0.%d%d ns\n",
1177 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001178 }
1179 break;
1180 default:
Larry Johnson632de062008-01-11 23:26:18 -05001181 printf ("Command and Address hold %c%d.%d ns\n",
1182 (data[33] & 0x80) ? '-' : '+',
1183 (data[33] >> 4) & 0x07, data[33] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001184 break;
1185 }
1186
1187 switch (type) {
1188 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001189 printf ("Data signal input setup 0.%d%d ns\n",
1190 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001191 break;
1192 default:
Larry Johnson632de062008-01-11 23:26:18 -05001193 printf ("Data signal input setup %c%d.%d ns\n",
1194 (data[34] & 0x80) ? '-' : '+',
1195 (data[34] >> 4) & 0x07, data[34] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001196 break;
1197 }
1198
1199 switch (type) {
1200 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001201 printf ("Data signal input hold 0.%d%d ns\n",
1202 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001203 break;
1204 default:
Larry Johnson632de062008-01-11 23:26:18 -05001205 printf ("Data signal input hold %c%d.%d ns\n",
1206 (data[35] & 0x80) ? '-' : '+',
1207 (data[35] >> 4) & 0x07, data[35] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001208 break;
1209 }
1210
wdenk4b9206e2004-03-23 22:14:11 +00001211 puts ("Manufacturer's JEDEC ID ");
Timur Tabie857a5b2006-11-28 12:09:35 -06001212 for (j = 64; j <= 71; j++)
Larry Johnson632de062008-01-11 23:26:18 -05001213 printf ("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +00001214 putc ('\n');
Larry Johnson632de062008-01-11 23:26:18 -05001215 printf ("Manufacturing Location %02X\n", data[72]);
wdenk4b9206e2004-03-23 22:14:11 +00001216 puts ("Manufacturer's Part Number ");
Timur Tabie857a5b2006-11-28 12:09:35 -06001217 for (j = 73; j <= 90; j++)
Larry Johnson632de062008-01-11 23:26:18 -05001218 printf ("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +00001219 putc ('\n');
Larry Johnson632de062008-01-11 23:26:18 -05001220 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1221 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
wdenk4b9206e2004-03-23 22:14:11 +00001222 puts ("Assembly Serial Number ");
Timur Tabie857a5b2006-11-28 12:09:35 -06001223 for (j = 95; j <= 98; j++)
Larry Johnson632de062008-01-11 23:26:18 -05001224 printf ("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +00001225 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +00001226
Larry Johnson0df6b842008-01-10 22:23:39 -05001227 if (DDR2 != type) {
Larry Johnson632de062008-01-11 23:26:18 -05001228 printf ("Speed rating PC%d\n",
1229 data[126] == 0x66 ? 66 : data[126]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001230 }
wdenk81a88242002-10-26 15:22:42 +00001231 return 0;
1232}
Jon Loeliger90253172007-07-10 11:02:44 -05001233#endif
wdenk81a88242002-10-26 15:22:42 +00001234
Heiko Schocher67b23a32008-10-15 09:39:47 +02001235#if defined(CONFIG_I2C_MUX)
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001236static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Heiko Schocher67b23a32008-10-15 09:39:47 +02001237{
1238 int ret=0;
1239
1240 if (argc == 1) {
1241 /* show all busses */
1242 I2C_MUX *mux;
1243 I2C_MUX_DEVICE *device = i2c_mux_devices;
1244
1245 printf ("Busses reached over muxes:\n");
1246 while (device != NULL) {
1247 printf ("Bus ID: %x\n", device->busid);
1248 printf (" reached over Mux(es):\n");
1249 mux = device->mux;
1250 while (mux != NULL) {
1251 printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
1252 mux = mux->next;
1253 }
1254 device = device->next;
1255 }
1256 } else {
1257 I2C_MUX_DEVICE *dev;
1258
1259 dev = i2c_mux_ident_muxstring ((uchar *)argv[1]);
1260 ret = 0;
1261 }
1262 return ret;
1263}
1264#endif /* CONFIG_I2C_MUX */
1265
Ben Warrenbb99ad62006-09-07 16:50:54 -04001266#if defined(CONFIG_I2C_MULTI_BUS)
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001267static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Ben Warrenbb99ad62006-09-07 16:50:54 -04001268{
1269 int bus_idx, ret=0;
1270
Timur Tabie857a5b2006-11-28 12:09:35 -06001271 if (argc == 1)
1272 /* querying current setting */
Ben Warrenbb99ad62006-09-07 16:50:54 -04001273 printf("Current bus is %d\n", i2c_get_bus_num());
Timur Tabie857a5b2006-11-28 12:09:35 -06001274 else {
Ben Warrenbb99ad62006-09-07 16:50:54 -04001275 bus_idx = simple_strtoul(argv[1], NULL, 10);
1276 printf("Setting bus to %d\n", bus_idx);
1277 ret = i2c_set_bus_num(bus_idx);
Timur Tabie857a5b2006-11-28 12:09:35 -06001278 if (ret)
Ben Warrenbb99ad62006-09-07 16:50:54 -04001279 printf("Failure changing bus number (%d)\n", ret);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001280 }
1281 return ret;
1282}
1283#endif /* CONFIG_I2C_MULTI_BUS */
1284
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001285static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Ben Warrenbb99ad62006-09-07 16:50:54 -04001286{
1287 int speed, ret=0;
1288
Timur Tabie857a5b2006-11-28 12:09:35 -06001289 if (argc == 1)
1290 /* querying current speed */
Ben Warrenbb99ad62006-09-07 16:50:54 -04001291 printf("Current bus speed=%d\n", i2c_get_bus_speed());
Timur Tabie857a5b2006-11-28 12:09:35 -06001292 else {
Ben Warrenbb99ad62006-09-07 16:50:54 -04001293 speed = simple_strtoul(argv[1], NULL, 10);
1294 printf("Setting bus speed to %d Hz\n", speed);
1295 ret = i2c_set_bus_speed(speed);
Timur Tabie857a5b2006-11-28 12:09:35 -06001296 if (ret)
Ben Warrenbb99ad62006-09-07 16:50:54 -04001297 printf("Failure changing bus speed (%d)\n", ret);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001298 }
1299 return ret;
1300}
1301
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001302static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Frans Meulenbroeksbfc3b772010-02-25 10:12:14 +01001303{
1304 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1305}
1306
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001307static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Frans Meulenbroeksbfc3b772010-02-25 10:12:14 +01001308{
1309 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1310}
1311
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001312static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Frans Meulenbroeksbfc3b772010-02-25 10:12:14 +01001313{
1314 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1315 return 0;
1316}
1317
1318static cmd_tbl_t cmd_i2c_sub[] = {
1319#if defined(CONFIG_I2C_MUX)
1320 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""),
1321#endif /* CONFIG_I2C_MUX */
1322 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
1323#if defined(CONFIG_I2C_MULTI_BUS)
1324 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
1325#endif /* CONFIG_I2C_MULTI_BUS */
1326 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1327 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1328 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1329 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1330 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1331 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
Frans Meulenbroeks652e5352010-02-25 10:12:16 +01001332 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
Frans Meulenbroeksbfc3b772010-02-25 10:12:14 +01001333 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
1334#if defined(CONFIG_CMD_SDRAM)
1335 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
1336#endif
1337 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1338};
1339
Frans Meulenbroeks3a6dcb92010-03-26 09:46:38 +01001340static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
Ben Warrenbb99ad62006-09-07 16:50:54 -04001341{
Frans Meulenbroeksbfc3b772010-02-25 10:12:14 +01001342 cmd_tbl_t *c;
1343
Peter Tysere96ad5d2009-04-18 22:34:04 -05001344 /* Strip off leading 'i2c' command argument */
1345 argc--;
1346 argv++;
1347
Frans Meulenbroeksbfc3b772010-02-25 10:12:14 +01001348 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
1349
1350 if (c) {
1351 return c->cmd(cmdtp, flag, argc, argv);
1352 } else {
1353 cmd_usage(cmdtp);
1354 return 1;
Alessandro Rubini6aee3042009-07-17 14:42:11 +02001355 }
Ben Warrenbb99ad62006-09-07 16:50:54 -04001356}
wdenk8bde7f72003-06-27 21:31:46 +00001357
1358/***************************************************/
1359
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001360U_BOOT_CMD(
1361 i2c, 6, 1, do_i2c,
Peter Tyser2fb26042009-01-27 18:03:12 -06001362 "I2C sub-system",
Peter Tyser9166b772009-04-18 22:34:06 -05001363#if defined(CONFIG_I2C_MUX)
Frans Meulenbroeksfb0070e2010-02-25 10:12:15 +01001364 "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c "
Peter Tyser9166b772009-04-18 22:34:06 -05001365#endif /* CONFIG_I2C_MUX */
Frans Meulenbroeksfb0070e2010-02-25 10:12:15 +01001366 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001367#if defined(CONFIG_I2C_MULTI_BUS)
Peter Tyser9bc2e4e2008-10-01 12:25:04 -05001368 "i2c dev [dev] - show or set current I2C bus\n"
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001369#endif /* CONFIG_I2C_MULTI_BUS */
Frans Meulenbroeksfb0070e2010-02-25 10:12:15 +01001370 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001371 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1372 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1373 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1374 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001375 "i2c probe - show devices on the I2C bus\n"
Frans Meulenbroeks652e5352010-02-25 10:12:16 +01001376 "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n"
Heiko Schochere43a27c2008-10-15 09:33:30 +02001377 "i2c reset - re-init the I2C Controller\n"
Jon Loeligerc76fe472007-07-08 18:02:23 -05001378#if defined(CONFIG_CMD_SDRAM)
Frans Meulenbroeksfb0070e2010-02-25 10:12:15 +01001379 "i2c sdram chip - print SDRAM configuration information\n"
Jon Loeliger90253172007-07-10 11:02:44 -05001380#endif
Frans Meulenbroeksfb0070e2010-02-25 10:12:15 +01001381 "i2c speed [speed] - show or set I2C bus speed"
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001382);
Heiko Schocher67b23a32008-10-15 09:39:47 +02001383
1384#if defined(CONFIG_I2C_MUX)
Heiko Schocher67b23a32008-10-15 09:39:47 +02001385int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
1386{
1387 I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
1388
1389 if (i2c_mux_devices == NULL) {
1390 i2c_mux_devices = dev;
1391 return 0;
1392 }
1393 while (devtmp->next != NULL)
1394 devtmp = devtmp->next;
1395
1396 devtmp->next = dev;
1397 return 0;
1398}
1399
1400I2C_MUX_DEVICE *i2c_mux_search_device(int id)
1401{
1402 I2C_MUX_DEVICE *device = i2c_mux_devices;
1403
1404 while (device != NULL) {
1405 if (device->busid == id)
1406 return device;
1407 device = device->next;
1408 }
1409 return NULL;
1410}
1411
1412/* searches in the buf from *pos the next ':'.
1413 * returns:
1414 * 0 if found (with *pos = where)
1415 * < 0 if an error occured
1416 * > 0 if the end of buf is reached
1417 */
1418static int i2c_mux_search_next (int *pos, uchar *buf, int len)
1419{
1420 while ((buf[*pos] != ':') && (*pos < len)) {
1421 *pos += 1;
1422 }
1423 if (*pos >= len)
1424 return 1;
1425 if (buf[*pos] != ':')
1426 return -1;
1427 return 0;
1428}
1429
1430static int i2c_mux_get_busid (void)
1431{
1432 int tmp = i2c_mux_busid;
1433
1434 i2c_mux_busid ++;
1435 return tmp;
1436}
1437
1438/* Analyses a Muxstring and sends immediately the
1439 Commands to the Muxes. Runs from Flash.
1440 */
1441int i2c_mux_ident_muxstring_f (uchar *buf)
1442{
1443 int pos = 0;
1444 int oldpos;
1445 int ret = 0;
1446 int len = strlen((char *)buf);
1447 int chip;
1448 uchar channel;
1449 int was = 0;
1450
1451 while (ret == 0) {
1452 oldpos = pos;
1453 /* search name */
1454 ret = i2c_mux_search_next(&pos, buf, len);
1455 if (ret != 0)
1456 printf ("ERROR\n");
1457 /* search address */
1458 pos ++;
1459 oldpos = pos;
1460 ret = i2c_mux_search_next(&pos, buf, len);
1461 if (ret != 0)
1462 printf ("ERROR\n");
1463 buf[pos] = 0;
1464 chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1465 buf[pos] = ':';
1466 /* search channel */
1467 pos ++;
1468 oldpos = pos;
1469 ret = i2c_mux_search_next(&pos, buf, len);
1470 if (ret < 0)
1471 printf ("ERROR\n");
1472 was = 0;
1473 if (buf[pos] != 0) {
1474 buf[pos] = 0;
1475 was = 1;
1476 }
1477 channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1478 if (was)
1479 buf[pos] = ':';
1480 if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
1481 printf ("Error setting Mux: chip:%x channel: \
1482 %x\n", chip, channel);
1483 return -1;
1484 }
1485 pos ++;
1486 oldpos = pos;
1487
1488 }
1489
1490 return 0;
1491}
1492
1493/* Analyses a Muxstring and if this String is correct
1494 * adds a new I2C Bus.
1495 */
1496I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
1497{
1498 I2C_MUX_DEVICE *device;
1499 I2C_MUX *mux;
1500 int pos = 0;
1501 int oldpos;
1502 int ret = 0;
1503 int len = strlen((char *)buf);
1504 int was = 0;
1505
1506 device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
1507 device->mux = NULL;
1508 device->busid = i2c_mux_get_busid ();
1509 device->next = NULL;
1510 while (ret == 0) {
1511 mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
1512 mux->next = NULL;
1513 /* search name of mux */
1514 oldpos = pos;
1515 ret = i2c_mux_search_next(&pos, buf, len);
1516 if (ret != 0)
1517 printf ("%s no name.\n", __FUNCTION__);
1518 mux->name = (char *)malloc (pos - oldpos + 1);
1519 memcpy (mux->name, &buf[oldpos], pos - oldpos);
1520 mux->name[pos - oldpos] = 0;
1521 /* search address */
1522 pos ++;
1523 oldpos = pos;
1524 ret = i2c_mux_search_next(&pos, buf, len);
1525 if (ret != 0)
1526 printf ("%s no mux address.\n", __FUNCTION__);
1527 buf[pos] = 0;
1528 mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1529 buf[pos] = ':';
1530 /* search channel */
1531 pos ++;
1532 oldpos = pos;
1533 ret = i2c_mux_search_next(&pos, buf, len);
1534 if (ret < 0)
1535 printf ("%s no mux channel.\n", __FUNCTION__);
1536 was = 0;
1537 if (buf[pos] != 0) {
1538 buf[pos] = 0;
1539 was = 1;
1540 }
1541 mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1542 if (was)
1543 buf[pos] = ':';
1544 if (device->mux == NULL)
1545 device->mux = mux;
1546 else {
1547 I2C_MUX *muxtmp = device->mux;
1548 while (muxtmp->next != NULL) {
1549 muxtmp = muxtmp->next;
1550 }
1551 muxtmp->next = mux;
1552 }
1553 pos ++;
1554 oldpos = pos;
1555 }
1556 if (ret > 0) {
1557 /* Add Device */
1558 i2c_mux_add_device (device);
1559 return device;
1560 }
1561
1562 return NULL;
1563}
1564
1565int i2x_mux_select_mux(int bus)
1566{
1567 I2C_MUX_DEVICE *dev;
1568 I2C_MUX *mux;
1569
1570 if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
1571 /* select Default Mux Bus */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001572#if defined(CONFIG_SYS_I2C_IVM_BUS)
1573 i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
Heiko Schocher67b23a32008-10-15 09:39:47 +02001574#else
1575 {
1576 unsigned char *buf;
1577 buf = (unsigned char *) getenv("EEprom_ivm");
1578 if (buf != NULL)
1579 i2c_mux_ident_muxstring_f (buf);
1580 }
1581#endif
1582 return 0;
1583 }
1584 dev = i2c_mux_search_device(bus);
1585 if (dev == NULL)
1586 return -1;
1587
1588 mux = dev->mux;
1589 while (mux != NULL) {
1590 if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
1591 printf ("Error setting Mux: chip:%x channel: \
1592 %x\n", mux->chip, mux->channel);
1593 return -1;
1594 }
1595 mux = mux->next;
1596 }
1597 return 0;
1598}
1599#endif /* CONFIG_I2C_MUX */