blob: c95a7ba835a0bbb17ea53891c2d2d3a9cd67c07c [file] [log] [blame]
maxims@google.com14e4b142017-01-18 13:44:56 -08001#include <dt-bindings/clock/ast2500-scu.h>
2
3#include "ast2500.dtsi"
4
5/ {
6 scu: clock-controller@1e6e2000 {
7 compatible = "aspeed,ast2500-scu";
8 reg = <0x1e6e2000 0x1000>;
9 u-boot,dm-pre-reloc;
10 #clock-cells = <1>;
11 #reset-cells = <1>;
12 };
13
14 sdrammc: sdrammc@1e6e0000 {
15 u-boot,dm-pre-reloc;
16 compatible = "aspeed,ast2500-sdrammc";
17 reg = <0x1e6e0000 0x174
18 0x1e6e0200 0x1d4 >;
19 clocks = <&scu PLL_MPLL>;
20 };
21
22 ahb {
23 u-boot,dm-pre-reloc;
24
25 apb {
26 u-boot,dm-pre-reloc;
27
28 timer: timer@1e782000 {
29 u-boot,dm-pre-reloc;
30 };
31
32 uart1: serial@1e783000 {
33 clocks = <&scu PCLK_UART1>;
34 };
35
36 uart2: serial@1e78d000 {
37 clocks = <&scu PCLK_UART2>;
38 };
39
40 uart3: serial@1e78e000 {
41 clocks = <&scu PCLK_UART3>;
42 };
43
44 uart4: serial@1e78f000 {
45 clocks = <&scu PCLK_UART4>;
46 };
47
48 uart5: serial@1e784000 {
49 clocks = <&scu PCLK_UART5>;
50 };
51 };
52 };
53};