Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 1 | if ARCH_ROCKCHIP |
| 2 | |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 3 | config ROCKCHIP_RK3036 |
| 4 | bool "Support Rockchip RK3036" |
| 5 | select CPU_V7 |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame^] | 6 | select SUPPORT_SPL |
| 7 | select SPL |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 8 | help |
| 9 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 |
| 10 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 11 | and video codec support. Peripherals include Gigabit Ethernet, |
| 12 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 13 | |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 14 | config ROCKCHIP_RK3288 |
| 15 | bool "Support Rockchip RK3288" |
Andreas Färber | e0f5dbc | 2016-07-14 05:09:26 +0200 | [diff] [blame] | 16 | select CPU_V7 |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame^] | 17 | select SUPPORT_SPL |
| 18 | select SPL |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 19 | help |
| 20 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 |
| 21 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 22 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 23 | and video codec support. Peripherals include Gigabit Ethernet, |
| 24 | USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs. |
| 25 | |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame^] | 26 | config ROCKCHIP_RK3399 |
| 27 | bool "Support Rockchip RK3399" |
| 28 | select ARM64 |
| 29 | help |
| 30 | The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 |
| 31 | and quad-core Cortex-A53. |
| 32 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 33 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 34 | and video codec support. Peripherals include Gigabit Ethernet, |
| 35 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 36 | |
Xu Ziyuan | b47ea79 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 37 | config ROCKCHIP_SPL_BACK_TO_BROM |
| 38 | bool "SPL returns to bootrom" |
| 39 | default y if ROCKCHIP_RK3036 |
| 40 | help |
| 41 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 42 | SPL will return to the boot rom, which will then load the U-Boot |
| 43 | binary to keep going on. |
| 44 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 45 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 46 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame^] | 47 | source "arch/arm/mach-rockchip/rk3399/Kconfig" |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 48 | endif |