blob: 7120aa64df62eacbe3bf84e1be96282325255236 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Christoph Fritz730d2542016-11-29 16:13:40 +01002/*
3 * Copyright (C) 2016 samtec automotive software & electronics gmbh
4 *
5 * Configuration settings for the Samtec VIN|ING 2000 board.
Christoph Fritz730d2542016-11-29 16:13:40 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include "mx6_common.h"
12
13#ifdef CONFIG_SPL
14#include "imx6_spl.h"
15#endif
16
17/* Size of malloc() pool */
18#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
19
Christoph Fritz730d2542016-11-29 16:13:40 +010020#define BOOT_TARGET_DEVICES(func) \
21 func(MMC, mmc, 0) \
22 func(MMC, mmc, 1) \
23 func(USB, usb, 0) \
24 func(PXE, pxe, na) \
25 func(DHCP, dhcp, na)
26#include <config_distro_bootcmd.h>
27
28/* Miscellaneous configurable options */
29#define CONFIG_SYS_MEMTEST_START 0x80000000
30#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
31
Christoph Fritz730d2542016-11-29 16:13:40 +010032/* Physical Memory Map */
Christoph Fritz730d2542016-11-29 16:13:40 +010033#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
34
35#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
36#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
37#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
38
39#define CONFIG_SYS_INIT_SP_OFFSET \
40 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
41#define CONFIG_SYS_INIT_SP_ADDR \
42 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
43
44/* MMC Configuration */
45#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
46
47/* I2C Configs */
48#define CONFIG_SYS_I2C
49#define CONFIG_SYS_I2C_MXC
50#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
51#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
52#define CONFIG_SYS_I2C_SPEED 100000
53
54/* PMIC */
55#define CONFIG_POWER
56#define CONFIG_POWER_I2C
57#define CONFIG_POWER_PFUZE100
58#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
59
60/* Network */
Christoph Fritz730d2542016-11-29 16:13:40 +010061#define IMX_FEC_BASE ENET_BASE_ADDR
62#define CONFIG_FEC_MXC_PHYADDR 0x0
63
64#define CONFIG_FEC_XCV_TYPE RMII
65#define CONFIG_ETHPRIME "FEC"
66
Christoph Fritz730d2542016-11-29 16:13:40 +010067#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Christoph Fritz730d2542016-11-29 16:13:40 +010068#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
69#define CONFIG_MXC_USB_FLAGS 0
70#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Christoph Fritz730d2542016-11-29 16:13:40 +010071
Christoph Fritz730d2542016-11-29 16:13:40 +010072#ifdef CONFIG_CMD_PCI
73#define CONFIG_PCI_SCAN_SHOW
74#define CONFIG_PCIE_IMX
75#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6)
76#endif
77
78#define CONFIG_IMX_THERMAL
79
Christoph Fritz730d2542016-11-29 16:13:40 +010080#define CONFIG_IMX6_PWM_PER_CLK 66000000
Christoph Fritz730d2542016-11-29 16:13:40 +010081
Christoph Fritz730d2542016-11-29 16:13:40 +010082#ifdef CONFIG_ENV_IS_IN_MMC
Christoph Fritz730d2542016-11-29 16:13:40 +010083#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC4 eMMC */
84/* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */
85#define CONFIG_SYS_MMC_ENV_PART 1 /* boot0 */
86#endif
87
Marek Vasut7d84f442019-11-26 09:39:08 +010088#ifdef CONFIG_SPL_BUILD
89#define CONFIG_MXC_UART_BASE UART1_BASE
90#endif
91
Christoph Fritz730d2542016-11-29 16:13:40 +010092#endif /* __CONFIG_H */