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Eric Benard3cbeb0f2014-04-04 19:05:55 +02001/*
2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
4 *
5 * Configuration settings for the Embest RIoTboard
6 *
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __RIOTBOARD_CONFIG_H
14#define __RIOTBOARD_CONFIG_H
15
Eric Benard3cbeb0f2014-04-04 19:05:55 +020016#define CONFIG_MXC_UART_BASE UART2_BASE
Fabio Estevamfa4a7a42014-06-09 13:35:35 -030017#define CONFIG_CONSOLE_DEV "ttymxc1"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020018#define CONFIG_MMCROOT "/dev/mmcblk1p2"
19
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
Nikolay Dimitrov223d91c2015-05-18 02:10:45 +030022#define CONFIG_IMX6_THERMAL
Eric Benard3cbeb0f2014-04-04 19:05:55 +020023
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
26
27#define CONFIG_BOARD_EARLY_INIT_F
28#define CONFIG_BOARD_LATE_INIT
Eric Benard3cbeb0f2014-04-04 19:05:55 +020029
30#define CONFIG_MXC_UART
31
Eric Benard3cbeb0f2014-04-04 19:05:55 +020032/* I2C Configs */
33#define CONFIG_CMD_I2C
34#define CONFIG_SYS_I2C
35#define CONFIG_SYS_I2C_MXC
York Sunf8cb1012015-03-20 10:20:40 -070036#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020037#define CONFIG_SYS_I2C_SPEED 100000
38
39/* USB Configs */
40#define CONFIG_CMD_USB
41#define CONFIG_USB_EHCI
42#define CONFIG_USB_EHCI_MX6
43#define CONFIG_USB_STORAGE
44#define CONFIG_USB_HOST_ETHER
45#define CONFIG_USB_ETHER_ASIX
46#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
47#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
48#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
49#define CONFIG_MXC_USB_FLAGS 0
50
51/* MMC Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020052#define CONFIG_SYS_FSL_ESDHC_ADDR 0
53
Eric Benard3cbeb0f2014-04-04 19:05:55 +020054#define CONFIG_FEC_MXC
55#define CONFIG_MII
56#define IMX_FEC_BASE ENET_BASE_ADDR
57#define CONFIG_FEC_XCV_TYPE RGMII
58#define CONFIG_ETHPRIME "FEC"
59#define CONFIG_FEC_MXC_PHYADDR 4
60
61#define CONFIG_PHYLIB
62#define CONFIG_PHY_ATHEROS
63
64#define CONFIG_CMD_SF
65#ifdef CONFIG_CMD_SF
Eric Benard3cbeb0f2014-04-04 19:05:55 +020066#define CONFIG_SPI_FLASH_SST
67#define CONFIG_MXC_SPI
68#define CONFIG_SF_DEFAULT_BUS 0
Nikita Kiryanov155fa9a2014-08-20 15:08:50 +030069#define CONFIG_SF_DEFAULT_CS 0
Eric Benard3cbeb0f2014-04-04 19:05:55 +020070#define CONFIG_SF_DEFAULT_SPEED 20000000
71#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
72#endif
73
Eric Benard3cbeb0f2014-04-04 19:05:55 +020074#define CONFIG_CMD_BMODE
Eric Benard3cbeb0f2014-04-04 19:05:55 +020075
Eric Benard3cbeb0f2014-04-04 19:05:55 +020076#define CONFIG_ARP_TIMEOUT 200UL
77
Eric Benard3cbeb0f2014-04-04 19:05:55 +020078/* Print Buffer Size */
79#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Eric Benard3cbeb0f2014-04-04 19:05:55 +020080
81#define CONFIG_SYS_MEMTEST_START 0x10000000
82#define CONFIG_SYS_MEMTEST_END 0x10010000
83#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
84
Eric Benard3cbeb0f2014-04-04 19:05:55 +020085#define CONFIG_STACKSIZE (128 * 1024)
86
87/* Physical Memory Map */
88#define CONFIG_NR_DRAM_BANKS 1
89#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
90
91#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
92#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
93#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
94
95#define CONFIG_SYS_INIT_SP_OFFSET \
96 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
97#define CONFIG_SYS_INIT_SP_ADDR \
98 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
99
Peter Robinson056845c2015-05-22 17:30:45 +0100100/* Environment organization */
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200101#define CONFIG_ENV_SIZE (8 * 1024)
102
103#if defined(CONFIG_ENV_IS_IN_MMC)
104/* RiOTboard */
Iain Patonc86efd82014-12-14 14:51:46 +0000105#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200106#define CONFIG_SYS_FSL_USDHC_NUM 3
107#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
108#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
109#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
110#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
111/* MarSBoard */
Iain Patonc86efd82014-12-14 14:51:46 +0000112#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200113#define CONFIG_SYS_FSL_USDHC_NUM 2
114#define CONFIG_ENV_OFFSET (768 * 1024)
115#define CONFIG_ENV_SECT_SIZE (8 * 1024)
116#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
117#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
118#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
119#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
120#endif
121
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200122/* Framebuffer */
123#define CONFIG_VIDEO
124#define CONFIG_VIDEO_IPUV3
125#define CONFIG_CFB_CONSOLE
126#define CONFIG_VGA_AS_SINGLE_DEVICE
127#define CONFIG_SYS_CONSOLE_IS_IN_ENV
128#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
129#define CONFIG_VIDEO_BMP_RLE8
130#define CONFIG_SPLASH_SCREEN
131#define CONFIG_SPLASH_SCREEN_ALIGN
132#define CONFIG_BMP_16BPP
133#define CONFIG_VIDEO_LOGO
134#define CONFIG_VIDEO_BMP_LOGO
135#define CONFIG_IPUV3_CLK 260000000
136#define CONFIG_IMX_HDMI
137#define CONFIG_IMX_VIDEO_SKIP
138
Iain Paton729d2a32014-12-14 14:51:32 +0000139#include <config_distro_defaults.h>
Peter Robinsone51c1e82015-05-22 17:30:52 +0100140#include "mx6_common.h"
Iain Paton729d2a32014-12-14 14:51:32 +0000141
Iain Patonc86efd82014-12-14 14:51:46 +0000142/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
143 * 1M script, 1M pxe and the ramdisk at the end */
144#define MEM_LAYOUT_ENV_SETTINGS \
145 "bootm_size=0x10000000\0" \
146 "kernel_addr_r=0x12000000\0" \
147 "fdt_addr_r=0x13000000\0" \
148 "scriptaddr=0x13100000\0" \
149 "pxefile_addr_r=0x13200000\0" \
150 "ramdisk_addr_r=0x13300000\0"
151
152#define BOOT_TARGET_DEVICES(func) \
153 func(MMC, mmc, 0) \
154 func(MMC, mmc, 1) \
155 func(MMC, mmc, 2) \
156 func(USB, usb, 0) \
157 func(PXE, pxe, na) \
158 func(DHCP, dhcp, na)
159
160#include <config_distro_bootcmd.h>
161
162#define CONSOLE_STDIN_SETTINGS \
163 "stdin=serial\0"
164
165#define CONSOLE_STDOUT_SETTINGS \
166 "stdout=serial\0" \
167 "stderr=serial\0"
168
169#define CONSOLE_ENV_SETTINGS \
170 CONSOLE_STDIN_SETTINGS \
171 CONSOLE_STDOUT_SETTINGS
172
173#define CONFIG_EXTRA_ENV_SETTINGS \
174 CONSOLE_ENV_SETTINGS \
175 MEM_LAYOUT_ENV_SETTINGS \
176 "fdtfile=" CONFIG_FDTFILE "\0" \
177 BOOTENV
178
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200179#endif /* __RIOTBOARD_CONFIG_H */