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Mike Frysinger9171fc82008-03-30 15:46:13 -04001/*
2 * serial.h - common serial defines for early debug and serial driver.
3 * any functions defined here must be always_inline since
4 * initcode cannot have function calls.
5 *
6 * Copyright (c) 2004-2007 Analog Devices Inc.
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#ifndef __BFIN_CPU_SERIAL_H__
12#define __BFIN_CPU_SERIAL_H__
13
14#include <asm/blackfin.h>
15#include <asm/mach-common/bits/uart.h>
16
Mike Frysinger76339032008-10-11 21:52:17 -040017#ifndef CONFIG_UART_CONSOLE
18# define CONFIG_UART_CONSOLE 0
19#endif
20
Mike Frysinger9171fc82008-03-30 15:46:13 -040021#ifdef CONFIG_DEBUG_EARLY_SERIAL
22# define BFIN_DEBUG_EARLY_SERIAL 1
23#else
24# define BFIN_DEBUG_EARLY_SERIAL 0
25#endif
26
Mike Frysingerf9481582009-11-12 18:42:53 -050027#ifndef __ASSEMBLY__
28
Mike Frysingera409fdd2010-06-02 06:00:27 -040029#include <asm/portmux.h>
30
Mike Frysinger9171fc82008-03-30 15:46:13 -040031#define LOB(x) ((x) & 0xFF)
32#define HIB(x) (((x) >> 8) & 0xFF)
33
Mike Frysingerf9481582009-11-12 18:42:53 -050034/*
35 * All Blackfin system MMRs are padded to 32bits even if the register
36 * itself is only 16bits. So use a helper macro to streamline this.
37 */
38#define __BFP(m) u16 m; u16 __pad_##m
39struct bfin_mmr_serial {
40#ifdef __ADSPBF54x__
41 __BFP(dll);
42 __BFP(dlh);
43 __BFP(gctl);
44 __BFP(lcr);
45 __BFP(mcr);
46 __BFP(lsr);
47 __BFP(msr);
48 __BFP(scr);
49 __BFP(ier_set);
50 __BFP(ier_clear);
51 __BFP(thr);
52 __BFP(rbr);
53#else
54 union {
55 u16 dll;
56 u16 thr;
57 const u16 rbr;
58 };
59 const u16 __spad0;
60 union {
61 u16 dlh;
62 u16 ier;
63 };
64 const u16 __spad1;
65 const __BFP(iir);
66 __BFP(lcr);
67 __BFP(mcr);
68 __BFP(lsr);
69 __BFP(msr);
70 __BFP(scr);
71 const u32 __spad2;
72 __BFP(gctl);
73#endif
74};
75#undef __BFP
76
Mike Frysinger9171fc82008-03-30 15:46:13 -040077#ifndef UART_LSR
78# if (CONFIG_UART_CONSOLE == 3)
Mike Frysingerf9481582009-11-12 18:42:53 -050079# define UART_BASE UART3_DLL
Mike Frysinger9171fc82008-03-30 15:46:13 -040080# elif (CONFIG_UART_CONSOLE == 2)
Mike Frysingerf9481582009-11-12 18:42:53 -050081# define UART_BASE UART2_DLL
Mike Frysinger9171fc82008-03-30 15:46:13 -040082# elif (CONFIG_UART_CONSOLE == 1)
Mike Frysingerf9481582009-11-12 18:42:53 -050083# define UART_BASE UART1_DLL
Mike Frysinger9171fc82008-03-30 15:46:13 -040084# elif (CONFIG_UART_CONSOLE == 0)
Mike Frysingerf9481582009-11-12 18:42:53 -050085# define UART_BASE UART0_DLL
Mike Frysinger9171fc82008-03-30 15:46:13 -040086# endif
Mike Frysingerf9481582009-11-12 18:42:53 -050087#else
88# if CONFIG_UART_CONSOLE != 0
89# error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
90# endif
91# define UART_BASE UART_DLL
Mike Frysinger9171fc82008-03-30 15:46:13 -040092#endif
Mike Frysingerf9481582009-11-12 18:42:53 -050093#define pUART ((volatile struct bfin_mmr_serial *)UART_BASE)
Mike Frysinger9171fc82008-03-30 15:46:13 -040094
Mike Frysinger9171fc82008-03-30 15:46:13 -040095#ifdef __ADSPBF54x__
96# define ACCESS_LATCH()
97# define ACCESS_PORT_IER()
Mike Frysinger9171fc82008-03-30 15:46:13 -040098#else
Mike Frysingerf9481582009-11-12 18:42:53 -050099# define ACCESS_LATCH() \
100 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
101# define ACCESS_PORT_IER() \
102 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
Mike Frysinger9171fc82008-03-30 15:46:13 -0400103#endif
104
105__attribute__((always_inline))
106static inline void serial_do_portmux(void)
107{
Mike Frysingera409fdd2010-06-02 06:00:27 -0400108 if (!BFIN_DEBUG_EARLY_SERIAL) {
109 const unsigned short pins[] = {
110#if CONFIG_UART_CONSOLE == 0
111 P_UART0_TX, P_UART0_RX,
112#elif CONFIG_UART_CONSOLE == 1
113 P_UART1_TX, P_UART1_RX,
114#elif CONFIG_UART_CONSOLE == 2
115 P_UART2_TX, P_UART2_RX,
116#elif CONFIG_UART_CONSOLE == 3
117 P_UART3_TX, P_UART3_RX,
118#endif
119 0,
120 };
121 peripheral_request_list(pins, "bfin-uart");
122 return;
123 }
124
Mike Frysinger51230e62008-10-11 21:15:53 -0400125#if defined(__ADSPBF51x__)
126# define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
127 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_2 | PORT_x_MUX_##mux_rx##_FUNC_2); \
128 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
129 switch (CONFIG_UART_CONSOLE) {
130 case 0: DO_MUX(G, 5, 5, 9, 10); break; /* Port G; mux 5; PG9 and PG10 */
131 case 1: DO_MUX(F, 2, 3, 14, 15); break; /* Port H; mux 2/3; PH14 and PH15 */
132 }
133 SSYNC();
134#elif defined(__ADSPBF52x__)
Mike Frysinger9171fc82008-03-30 15:46:13 -0400135# define DO_MUX(port, mux, tx, rx) \
136 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_3); \
137 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
138 switch (CONFIG_UART_CONSOLE) {
139 case 0: DO_MUX(G, 2, 7, 8); break; /* Port G; mux 2; PG2 and PG8 */
140 case 1: DO_MUX(F, 5, 14, 15); break; /* Port F; mux 5; PF14 and PF15 */
141 }
142 SSYNC();
143#elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
144# define DO_MUX(func, tx, rx) \
145 bfin_write_PORT_MUX(bfin_read_PORT_MUX() & ~(func)); \
146 bfin_write_PORTF_FER(bfin_read_PORTF_FER() | PF##tx | PF##rx);
147 switch (CONFIG_UART_CONSOLE) {
148 case 0: DO_MUX(PFDE, 0, 1); break;
149 case 1: DO_MUX(PFTE, 2, 3); break;
150 }
151 SSYNC();
152#elif defined(__ADSPBF54x__)
153# define DO_MUX(port, tx, rx) \
154 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##tx##_MASK | PORT_x_MUX_##rx##_MASK)) | PORT_x_MUX_##tx##_FUNC_1 | PORT_x_MUX_##rx##_FUNC_1); \
155 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
156 switch (CONFIG_UART_CONSOLE) {
157 case 0: DO_MUX(E, 7, 8); break; /* Port E; PE7 and PE8 */
158 case 1: DO_MUX(H, 0, 1); break; /* Port H; PH0 and PH1 */
159 case 2: DO_MUX(B, 4, 5); break; /* Port B; PB4 and PB5 */
160 case 3: DO_MUX(B, 6, 7); break; /* Port B; PB6 and PB7 */
161 }
162 SSYNC();
163#endif
164}
165
166__attribute__((always_inline))
167static inline void serial_early_init(void)
168{
169 /* handle portmux crap on different Blackfins */
170 serial_do_portmux();
171
Mike Frysingeraad4eca2009-04-04 09:10:27 -0400172 /* always enable UART -- avoids anomalies 05000309 and 05000350 */
Mike Frysingerf9481582009-11-12 18:42:53 -0500173 bfin_write16(&pUART->gctl, UCEN);
Mike Frysinger9171fc82008-03-30 15:46:13 -0400174
175 /* Set LCR to Word Lengh 8-bit word select */
Mike Frysingerf9481582009-11-12 18:42:53 -0500176 bfin_write16(&pUART->lcr, WLS_8);
Mike Frysinger9171fc82008-03-30 15:46:13 -0400177
178 SSYNC();
179}
180
181__attribute__((always_inline))
Mike Frysingerf790ef62008-12-10 12:33:54 -0500182static inline void serial_early_put_div(uint16_t divisor)
Mike Frysinger9171fc82008-03-30 15:46:13 -0400183{
Mike Frysinger9171fc82008-03-30 15:46:13 -0400184 /* Set DLAB in LCR to Access DLL and DLH */
185 ACCESS_LATCH();
186 SSYNC();
187
188 /* Program the divisor to get the baud rate we want */
Mike Frysingerf9481582009-11-12 18:42:53 -0500189 bfin_write16(&pUART->dll, LOB(divisor));
190 bfin_write16(&pUART->dlh, HIB(divisor));
Mike Frysinger9171fc82008-03-30 15:46:13 -0400191 SSYNC();
192
193 /* Clear DLAB in LCR to Access THR RBR IER */
194 ACCESS_PORT_IER();
195 SSYNC();
196}
197
Mike Frysingerf790ef62008-12-10 12:33:54 -0500198__attribute__((always_inline))
199static inline uint16_t serial_early_get_div(void)
200{
201 /* Set DLAB in LCR to Access DLL and DLH */
202 ACCESS_LATCH();
203 SSYNC();
204
Mike Frysingerf9481582009-11-12 18:42:53 -0500205 uint8_t dll = bfin_read16(&pUART->dll);
206 uint8_t dlh = bfin_read16(&pUART->dlh);
Mike Frysingerf790ef62008-12-10 12:33:54 -0500207 uint16_t divisor = (dlh << 8) | dll;
208
209 /* Clear DLAB in LCR to Access THR RBR IER */
210 ACCESS_PORT_IER();
211 SSYNC();
212
213 return divisor;
214}
215
Mike Frysingerf58bf802009-04-24 23:54:19 -0400216/* We cannot use get_sclk() early on as it uses caches in external memory */
217#if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
218# define get_sclk() (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV)
219#endif
220
Mike Frysingerf790ef62008-12-10 12:33:54 -0500221__attribute__((always_inline))
222static inline void serial_early_set_baud(uint32_t baud)
223{
224 /* Translate from baud into divisor in terms of SCLK. The
225 * weird multiplication is to make sure we over sample just
226 * a little rather than under sample the incoming signals.
227 */
228 serial_early_put_div((get_sclk() + (baud * 8)) / (baud * 16) - ANOMALY_05000230);
229}
230
Mike Frysinger9171fc82008-03-30 15:46:13 -0400231#ifndef BFIN_IN_INITCODE
232__attribute__((always_inline))
233static inline void serial_early_puts(const char *s)
234{
235 if (BFIN_DEBUG_EARLY_SERIAL) {
236 serial_puts("Early: ");
237 serial_puts(s);
238 }
239}
240#endif
241
242#else
243
244.macro serial_early_init
245#ifdef CONFIG_DEBUG_EARLY_SERIAL
246 call _serial_initialize;
247#endif
248.endm
249
250.macro serial_early_set_baud
251#ifdef CONFIG_DEBUG_EARLY_SERIAL
252 R0.L = LO(CONFIG_BAUDRATE);
253 R0.H = HI(CONFIG_BAUDRATE);
254 call _serial_set_baud;
255#endif
256.endm
257
Mike Frysinger9171fc82008-03-30 15:46:13 -0400258/* Since we embed the string right into our .text section, we need
259 * to find its address. We do this by getting our PC and adding 2
260 * bytes (which is the length of the jump instruction). Then we
261 * pass this address to serial_puts().
262 */
263#ifdef CONFIG_DEBUG_EARLY_SERIAL
264# define serial_early_puts(str) \
265 call _get_pc; \
266 jump 1f; \
267 .ascii "Early:"; \
268 .ascii __FILE__; \
269 .ascii ": "; \
270 .ascii str; \
271 .asciz "\n"; \
272 .align 4; \
2731: \
274 R0 += 2; \
275 call _serial_puts;
276#else
277# define serial_early_puts(str)
278#endif
279
280#endif
281
282#endif