blob: f2e7f59ad083146de06123b2c4ce2b4ee998795e [file] [log] [blame]
Simon Glassc420ef62016-11-13 14:24:54 -07001CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4# CONFIG_SPL_MMC_SUPPORT is not set
5CONFIG_ROCKCHIP_RK3288=y
6CONFIG_TARGET_CHROMEBOOK_MINNIE=y
7CONFIG_SPL_SPI_FLASH_SUPPORT=y
8CONFIG_SPL_SPI_SUPPORT=y
9CONFIG_SPL_STACK_R_ADDR=0x80000
10CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
11CONFIG_SILENT_CONSOLE=y
12# CONFIG_DISPLAY_CPUINFO is not set
13CONFIG_SPL_STACK_R=y
14CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Simon Glassc420ef62016-11-13 14:24:54 -070015# CONFIG_CMD_IMLS is not set
16CONFIG_CMD_MMC=y
17CONFIG_CMD_SF=y
18CONFIG_CMD_SPI=y
19CONFIG_CMD_I2C=y
20CONFIG_CMD_GPIO=y
21# CONFIG_CMD_SETEXPR is not set
Simon Glassc420ef62016-11-13 14:24:54 -070022CONFIG_CMD_CACHE=y
23CONFIG_CMD_TIME=y
24CONFIG_CMD_PMIC=y
25CONFIG_CMD_REGULATOR=y
Simon Glassc420ef62016-11-13 14:24:54 -070026CONFIG_SPL_OF_CONTROL=y
27CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Masahiro Yamada18780952016-12-07 22:10:25 +090028CONFIG_SPL_OF_PLATDATA=y
Simon Glassc420ef62016-11-13 14:24:54 -070029CONFIG_REGMAP=y
30CONFIG_SPL_REGMAP=y
31CONFIG_SYSCON=y
32CONFIG_SPL_SYSCON=y
33# CONFIG_SPL_SIMPLE_BUS is not set
34CONFIG_CLK=y
35CONFIG_SPL_CLK=y
36CONFIG_ROCKCHIP_GPIO=y
37CONFIG_I2C_CROS_EC_TUNNEL=y
38CONFIG_SYS_I2C_ROCKCHIP=y
39CONFIG_I2C_MUX=y
40CONFIG_DM_KEYBOARD=y
41CONFIG_CROS_EC_KEYB=y
42CONFIG_CROS_EC=y
43CONFIG_CROS_EC_SPI=y
44CONFIG_PWRSEQ=y
Masahiro Yamada55ed3b42017-01-10 13:32:04 +090045CONFIG_MMC_DW=y
Masahiro Yamadafed44082017-01-10 13:32:03 +090046CONFIG_MMC_DW_ROCKCHIP=y
Simon Glassc420ef62016-11-13 14:24:54 -070047CONFIG_PINCTRL=y
48CONFIG_SPL_PINCTRL=y
49# CONFIG_SPL_PINCTRL_FULL is not set
50CONFIG_ROCKCHIP_RK3288_PINCTRL=y
51CONFIG_DM_PMIC=y
52# CONFIG_SPL_PMIC_CHILDREN is not set
53CONFIG_PMIC_RK808=y
54CONFIG_DM_REGULATOR_FIXED=y
55CONFIG_REGULATOR_RK808=y
56CONFIG_PWM_ROCKCHIP=y
57CONFIG_RAM=y
58CONFIG_SPL_RAM=y
59CONFIG_DEBUG_UART=y
60CONFIG_DEBUG_UART_BASE=0xff690000
61CONFIG_DEBUG_UART_CLOCK=24000000
62CONFIG_DEBUG_UART_SHIFT=2
63CONFIG_SYS_NS16550=y
64CONFIG_ROCKCHIP_SERIAL=y
65CONFIG_ROCKCHIP_SPI=y
66CONFIG_SYSRESET=y
67CONFIG_DM_VIDEO=y
68CONFIG_DISPLAY=y
69CONFIG_VIDEO_ROCKCHIP=y
70CONFIG_CONSOLE_SCROLL_LINES=10
71CONFIG_USE_TINY_PRINTF=y
72CONFIG_CMD_DHRYSTONE=y
73CONFIG_ERRNO_STR=y
Simon Glassc420ef62016-11-13 14:24:54 -070074# CONFIG_SPL_OF_LIBFDT is not set