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Niklaus Giger1894dd32007-07-27 11:25:31 +02001HCU5 configuration details and startup sequence
2
3(C) Copyright 2007 Netstal Maschinen AG
4 Niklaus Giger (Niklaus.Giger@netstal.com)
5
6TODO:
7-----
8- Fix error: Waiting for PHY auto negotiation to complete..... TIMEOUT !
9 - Does not occur if both EMAC are connected
10- Fix RTS/CTS problem (HW?)
11 CONFIG_SERIAL_MULTI/CONFIG_SERIAL_SOFTWARE_FIFO hangs after
12 Switching to interrupt driven serial input mode
Niklaus Giger1894dd32007-07-27 11:25:31 +020013
14Caveats:
15--------
16Errata CHIP_8: Incorrect Write to DDR SDRAM. (was not applied to sequoia.c)
17see hcu5.c.
18
19
20Memory Bank 0 -- Flash chip
21---------------------------
22
230xfff00000 - 0xffffffff
24
25The flash chip is really only 512Kbytes, but the high address bit of
26the 1Meg region is ignored, so the flash is replicated through the
27region. Thus, this is consistent with a flash base address 0xfff80000.
28
29The placement at the end is to be consistent with reset behavior,
30where the processor itself initially uses this bus to load the branch
31vector and start running.
32
33On-Chip Memory
34--------------
35
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200360xe0010000- 0xe0013fff CONFIG_SYS_OCM_BASE
Niklaus Giger1894dd32007-07-27 11:25:31 +020037The 440EPx includes a 16K on-chip memory that can be placed however
38software chooses.
39
40Internal Peripherals
41--------------------
42
430xef600300 - 0xef6008ff
44
45These are scattered various peripherals internal to the PPC440EPX
46chip.
47
48Chip-Select 2: Flash Memory
49---------------------------
50
51Not used
52
53Chip-Select 3: CAN Interface
54----------------------------
550xc800000: 2 Intel 82527 CAN-Controller
56
57
58Chip-Select 4: IMC-bus standard
59-------------------------------
60
610xcc00000: Netstal specific IO-Bus
62
63
64Chip-Select 5: IMC-bus fast (inactive)
65--------------------------------------
66
670xce00000: Netstal specific IO-Bus (fast, but not yet used)
68
69
70Memory Bank 1 -- DDR2
71-------------------------------------
72
730x00000000 - 0xfffffff # Default 256 MB
74
75PCI ??
76
77USB ??
78Only USB_STORAGE is enabled to load vxWorks
79from a memory stick.
80
81System-LEDs ??? (Analog zu HCU4 ???)
82
83Startup sequence
84----------------
85
Stefan Roesea47a12b2010-04-15 16:07:28 +020086(arch/powerpc/cpu/ppc4xx/resetvec.S)
Niklaus Giger1894dd32007-07-27 11:25:31 +020087depending on configs option
88call _start_440 _start_pci oder _start
89
Stefan Roesea47a12b2010-04-15 16:07:28 +020090(arch/powerpc/cpu/ppc4xx/start.S)
Niklaus Giger1894dd32007-07-27 11:25:31 +020091
92_start_440:
93 initialize register like
94 CCR0
95 debug
96 setup interrupt vectors
97 configure cache regions
98 clear and setup TLB
99 enable internal RAM
100 jump start_ram
101 which in turn will jump to start
102_start:
103 Clear and set up some registers.
104 Debug setup
105 Setup the internal SRAM
106 Setup the stack in internal SRAM
107 setup stack pointer (r1)
108 setup GOT
109 call cpu_init_f /* run low-level CPU init code (from Flash) */
110
111 call cpu_init_f
Stefan Roesea47a12b2010-04-15 16:07:28 +0200112 board_init_f: (arch/powerpc/lib\board.c)
Niklaus Giger1894dd32007-07-27 11:25:31 +0200113 init_sequence defines a list of function to be called
114 board_early_init_f: (board/netstal/hcu5/hcu5.c)
115 We are using Bootstrap-Option A
116 if CPR0_ICFG_RLI_MASK == 0 then set some registers and reboot
117 Setup the GPIO pins
118 Setup the interrupt controller polarities, triggers, etc.
119 Ethernet, PCI, USB enable
120 setup BOOT FLASH (Chip timing)
121 init_baudrate,
122 serial_init
123 checkcpu
124 misc_init_f #ifdef
125 init_func_i2c #ifdef
126 post_init_f #ifdef
127 init_func_ram -> calls init_dram board/netstal/hcu5/sdram.c
128 (EYE function removed!!)
129 test_dram call
130
131 * Reserve memory at end of RAM for (top down in that order):
132 * - kernel log buffer
133 * - protected RAM
134 * - LCD framebuffer
135 * - monitor code
136 * - board info struct
137 Save local variables to board info struct
138 call relocate_code() does not return
Stefan Roesea47a12b2010-04-15 16:07:28 +0200139 relocate_code: (arch/powerpc/cpu/ppc4xx/start.S)
Niklaus Giger1894dd32007-07-27 11:25:31 +0200140-------------------------------------------------------
141From now on our copy is in RAM and we will run from there,
142 starting with board_init_r
143-------------------------------------------------------
Stefan Roesea47a12b2010-04-15 16:07:28 +0200144 board_init_r: (arch/powerpc/lib\board.c)
Niklaus Giger1894dd32007-07-27 11:25:31 +0200145 setup bd function pointers
146 trap_init
147 flash_init: (board/netstal/hcu5/flash.c)
148 /* setup for u-boot erase, update */
149 setup bd flash info
Stefan Roesea47a12b2010-04-15 16:07:28 +0200150 cpu_init_r: (arch/powerpc/cpu/ppc4xx/cpu_init.c)
Niklaus Giger1894dd32007-07-27 11:25:31 +0200151 peripheral chip select in using defines like
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152 CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h
Niklaus Giger1894dd32007-07-27 11:25:31 +0200153 mem_malloc_init
154 malloc_bin_reloc
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200155 spi_init (r or f)??? (CONFIG_ENV_IS_IN_EEPROM)
Niklaus Giger1894dd32007-07-27 11:25:31 +0200156 env_relocated
157 misc_init_r(bd): (board/netstal/hcu5.c)
158 ethaddr mit serial number ergรคnzen
159 Then we will somehow go into the command loop
160
161Most of the HW specific code for the HCU5 may be found in
162include/configs/hcu5.h
163board/netstal/hcu5/*
Stefan Roesea47a12b2010-04-15 16:07:28 +0200164arch/powerpc/cpu/ppc4xx/*
165arch/powerpc/lib/*
Niklaus Giger1894dd32007-07-27 11:25:31 +0200166include/ppc440.h
167
168Drivers for serial etc are found under drivers/
169
170Don't ask question if you did not look at the README !!
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171Most CONFIG_SYS_* and CONFIG_* switches are mentioned/explained there.