blob: 2087a4aabd90aba89bda423f254ee87847d210df [file] [log] [blame]
wdenk71fc6c52002-08-06 19:52:25 +00001/*
2 * NS16550 Serial Port
Stefan Roesea47a12b2010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.h)
wdenk71fc6c52002-08-06 19:52:25 +00004 * modified slightly to
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02005 * have addresses as offsets from CONFIG_SYS_ISA_BASE
wdenk71fc6c52002-08-06 19:52:25 +00006 * added a few more definitions
7 * added prototypes for ns16550.c
8 * reduced no of com ports to 2
9 * modifications (c) Rob Taylor, Flying Pig Systems. 2000.
10 * further modified to support the 8245 duart
11 * modifications (c) Paul Jimenez, Musenki, Inc. 2001.
12 */
13
14
wdenkbf9e3b32004-02-12 00:47:09 +000015struct NS16550 {
16 unsigned char rbrthrdlb; /* 0 */
17 unsigned char ierdmb; /* 1 */
18 unsigned char iirfcrafr; /* 2 */
19 unsigned char lcr; /* 3 */
20 unsigned char mcr; /* 4 */
21 unsigned char lsr; /* 5 */
22 unsigned char msr; /* 6 */
23 unsigned char scr; /* 7 */
24 unsigned char reserved[2]; /* 8 & 9 */
25 unsigned char dsr; /* 10 */
26 unsigned char dcr; /* 11 */
27};
wdenk71fc6c52002-08-06 19:52:25 +000028
29
30#define rbr rbrthrdlb
31#define thr rbrthrdlb
32#define dll rbrthrdlb
33#define ier ierdmb
34#define dlm ierdmb
35#define iir iirfcrafr
36#define fcr iirfcrafr
37#define afr iirfcrafr
38
wdenkbf9e3b32004-02-12 00:47:09 +000039#define FCR_FIFO_EN 0x01 /*fifo enable */
Mike Williams16263082011-07-22 04:01:30 +000040#define FCR_RXSR 0x02 /*receiver soft reset */
wdenkbf9e3b32004-02-12 00:47:09 +000041#define FCR_TXSR 0x04 /*transmitter soft reset */
42#define FCR_DMS 0x08 /* DMA Mode Select */
wdenk71fc6c52002-08-06 19:52:25 +000043
wdenkbf9e3b32004-02-12 00:47:09 +000044#define MCR_RTS 0x02 /* Readyu to Send */
wdenk71fc6c52002-08-06 19:52:25 +000045#define MCR_LOOP 0x10 /* Local loopback mode enable */
46/* #define MCR_DTR 0x01 noton 8245 duart */
47/* #define MCR_DMA_EN 0x04 noton 8245 duart */
48/* #define MCR_TX_DFR 0x08 noton 8245 duart */
49
wdenkbf9e3b32004-02-12 00:47:09 +000050#define LCR_WLS_MSK 0x03 /* character length slect mask */
51#define LCR_WLS_5 0x00 /* 5 bit character length */
52#define LCR_WLS_6 0x01 /* 6 bit character length */
53#define LCR_WLS_7 0x02 /* 7 bit character length */
54#define LCR_WLS_8 0x03 /* 8 bit character length */
55#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
56#define LCR_PEN 0x08 /* Parity eneble */
57#define LCR_EPS 0x10 /* Even Parity Select */
58#define LCR_STKP 0x20 /* Stick Parity */
59#define LCR_SBRK 0x40 /* Set Break */
60#define LCR_BKSE 0x80 /* Bank select enable - aka DLAB on 8245 */
wdenk71fc6c52002-08-06 19:52:25 +000061
wdenkbf9e3b32004-02-12 00:47:09 +000062#define LSR_DR 0x01 /* Data ready */
63#define LSR_OE 0x02 /* Overrun */
64#define LSR_PE 0x04 /* Parity error */
65#define LSR_FE 0x08 /* Framing error */
66#define LSR_BI 0x10 /* Break */
67#define LSR_THRE 0x20 /* Xmit holding register empty */
68#define LSR_TEMT 0x40 /* Xmitter empty */
69#define LSR_ERR 0x80 /* Error */
wdenk71fc6c52002-08-06 19:52:25 +000070
71/* useful defaults for LCR*/
72#define LCR_8N1 0x03
73
74
wdenkbf9e3b32004-02-12 00:47:09 +000075volatile struct NS16550 *NS16550_init (int chan, int baud_divisor);
76void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c);
77unsigned char NS16550_getc (volatile struct NS16550 *com_port);
78int NS16550_tstc (volatile struct NS16550 *com_port);
79void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor);