blob: 559428f4845fe85a2473ccb5f6c9042b1cad04b0 [file] [log] [blame]
Mike Frysinger59ac9722008-10-12 23:22:25 -04001/*
2 * U-boot - Configuration file for CSP Minotaur board
3 *
4 * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch>
5 * Minotaur config, brushed up for official uClinux dist.
6 * Parallel flash support disabled, SPI flash boot command
7 * added ('run flashboot').
8 *
9 * Flash image map:
10 *
11 * 0x00000000 u-boot bootstrap
12 * 0x00010000 environment
13 * 0x00020000 u-boot code
14 * 0x00030000 uImage.initramfs
15 *
16 */
17
18#ifndef __CONFIG_BF537_SRV1_H__
19#define __CONFIG_BF537_SRV1_H__
20
Mike Frysingerf348ab82009-04-24 17:22:40 -040021#include <asm/config-pre.h>
Mike Frysinger59ac9722008-10-12 23:22:25 -040022
23
24/*
25 * Processor Settings
26 */
Mike Frysinger59ac9722008-10-12 23:22:25 -040027#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
28
29
30/*
31 * Clock Settings
32 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
33 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
34 */
35/* CONFIG_CLKIN_HZ is any value in Hz */
36#define CONFIG_CLKIN_HZ 22118400
37/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
38/* 1 = CLKIN / 2 */
39#define CONFIG_CLKIN_HALF 0
40/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
41/* 1 = bypass PLL */
42#define CONFIG_PLL_BYPASS 0
43/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
44/* Values can range from 0-63 (where 0 means 64) */
45#define CONFIG_VCO_MULT 20
46/* CCLK_DIV controls the core clock divider */
47/* Values can be 1, 2, 4, or 8 ONLY */
48#define CONFIG_CCLK_DIV 1
49/* SCLK_DIV controls the system clock divider */
50/* Values can range from 1-15 */
51#define CONFIG_SCLK_DIV 5
52
53
54/*
55 * Memory Settings
56 */
57#define CONFIG_MEM_SIZE 32
58#define CONFIG_MEM_ADD_WDTH 9
59
60#define CONFIG_EBIU_SDRRC_VAL 0x2ac
61#define CONFIG_EBIU_SDGCTL_VAL 0x91110d
62
63#define CONFIG_EBIU_AMGCTL_VAL 0xFF
64#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
65#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
66
67#define CONFIG_SYS_MONITOR_LEN (256 << 10)
68#define CONFIG_SYS_MALLOC_LEN (384 << 10)
69
70
71/*
72 * Network Settings
73 */
74#ifndef __ADSPBF534__
75#define CONFIG_BFIN_MAC
76#define CONFIG_NETCONSOLE 1
77#define CONFIG_NET_MULTI 1
78#endif
79#ifdef CONFIG_BFIN_MAC
80#define CONFIG_IPADDR 192.168.0.15
81#define CONFIG_NETMASK 255.255.255.0
82#define CONFIG_GATEWAYIP 192.168.0.1
83#define CONFIG_SERVERIP 192.168.0.2
84#define CONFIG_HOSTNAME bf537-srv1
85#endif
86
87#define CONFIG_SYS_AUTOLOAD "no"
88#define CONFIG_ROOTPATH /romfs
Mike Frysinger8d1fea22009-07-16 19:05:30 -040089/* Uncomment next line to use fixed MAC address */
90/* #define CONFIG_ETHADDR 02:80:ad:20:31:42 */
Mike Frysinger59ac9722008-10-12 23:22:25 -040091
92
93/*
94 * Flash Settings
95 */
96/* We don't have a parallel flash chip there */
97#define CONFIG_SYS_NO_FLASH
98
99
100/*
101 * SPI Settings
102 */
103#define CONFIG_BFIN_SPI
104#define CONFIG_ENV_SPI_MAX_HZ 30000000
Mike Frysingerafac8b02009-06-14 22:29:35 -0400105#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysinger59ac9722008-10-12 23:22:25 -0400106#define CONFIG_SPI_FLASH
107#define CONFIG_SPI_FLASH_STMICRO
108
109
110/*
111 * Env Storage Settings
112 */
113#define CONFIG_ENV_IS_IN_SPI_FLASH
114#define CONFIG_ENV_OFFSET 0x10000
115#define CONFIG_ENV_SIZE 0x10000
116#define CONFIG_ENV_SECT_SIZE 0x10000
Mike Frysinger76d82182009-07-21 22:17:36 -0400117#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysinger59ac9722008-10-12 23:22:25 -0400118
119
120/*
121 * I2C settings
122 */
123#define CONFIG_BFIN_TWI_I2C 1
124#define CONFIG_HARD_I2C 1
125#define CONFIG_SYS_I2C_SPEED 50000
126#define CONFIG_SYS_I2C_SLAVE 0
127
128
129/*
130 * Misc Settings
131 */
132#define CONFIG_SYS_LONGHELP 1
133#define CONFIG_CMDLINE_EDITING 1
134#define CONFIG_ENV_OVERWRITE 1
135#define CONFIG_MISC_INIT_R
136
137#define CONFIG_BAUDRATE 115200
138#define CONFIG_UART_CONSOLE 0
139
140#define CONFIG_PANIC_HANG 1
141#define CONFIG_RTC_BFIN 1
142#define CONFIG_BOOT_RETRY_TIME -1
143#define CONFIG_LOADS_ECHO 1
144
145#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART)
146# define CONFIG_BOOTDELAY -1
147#else
148# define CONFIG_BOOTDELAY 5
149#endif
150
151#include <config_cmd_default.h>
152
153#ifdef CONFIG_BFIN_MAC
154# define CONFIG_CMD_DHCP
155# define CONFIG_CMD_PING
156#else
157# undef CONFIG_CMD_NET
158#endif
159
160#define CONFIG_CMD_BOOTLDR
161#define CONFIG_CMD_CACHE
162#define CONFIG_CMD_DATE
163#define CONFIG_CMD_ELF
164#undef CONFIG_CMD_FLASH
165#define CONFIG_CMD_I2C
166#undef CONFIG_CMD_IMLS
167#define CONFIG_CMD_SF
168
169#define CONFIG_BOOTCOMMAND "run flashboot"
170#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
171#define CONFIG_SYS_PROMPT "srv1> "
172
173#define BOOT_ENV_SETTINGS \
174 "update=tftpboot $(loadaddr) u-boot.ldr;" \
175 "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \
176 "sf erase 0 0x30000;" \
177 "sf write $(loadaddr) 0 $(filesize)" \
178 "flashboot=sf read 0x1000000 0x30000 0x320000;" \
179 "bootm 0x1000000\0"
180#ifdef CONFIG_BFIN_MAC
181# define NETWORK_ENV_SETTINGS \
182 "nfsargs=setenv bootargs root=/dev/nfs rw " \
183 "nfsroot=$(serverip):$(rootpath)\0" \
184 "addip=setenv bootargs $(bootargs) " \
185 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
186 ":$(hostname):eth0:off\0" \
187 "ramboot=tftpboot $(loadaddr) linux;" \
188 "run ramargs;run addip;bootelf\0" \
189 "nfsboot=tftpboot $(loadaddr) linux;" \
190 "run nfsargs;run addip;bootelf\0"
191#else
192# define NETWORK_ENV_SETTINGS
193#endif
194#define CONFIG_EXTRA_ENV_SETTINGS \
195 NETWORK_ENV_SETTINGS \
196 "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
197 BOOT_ENV_SETTINGS
198
Mike Frysinger59ac9722008-10-12 23:22:25 -0400199#endif