Lokesh Vutla | 4ddaa6c | 2017-08-21 12:50:59 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | /dts-v1/; |
| 9 | |
| 10 | #include "dra76x.dtsi" |
| 11 | #include "dra7-evm-common.dtsi" |
| 12 | #include <dt-bindings/net/ti-dp83867.h> |
| 13 | |
| 14 | / { |
| 15 | model = "TI DRA762 EVM"; |
| 16 | compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7"; |
| 17 | |
| 18 | memory@0 { |
| 19 | device_type = "memory"; |
| 20 | reg = <0x0 0x80000000 0x0 0x80000000>; |
| 21 | }; |
| 22 | |
| 23 | vsys_12v0: fixedregulator-vsys12v0 { |
| 24 | /* main supply */ |
| 25 | compatible = "regulator-fixed"; |
| 26 | regulator-name = "vsys_12v0"; |
| 27 | regulator-min-microvolt = <12000000>; |
| 28 | regulator-max-microvolt = <12000000>; |
| 29 | regulator-always-on; |
| 30 | regulator-boot-on; |
| 31 | }; |
| 32 | |
| 33 | vsys_5v0: fixedregulator-vsys5v0 { |
| 34 | /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */ |
| 35 | compatible = "regulator-fixed"; |
| 36 | regulator-name = "vsys_5v0"; |
| 37 | regulator-min-microvolt = <5000000>; |
| 38 | regulator-max-microvolt = <5000000>; |
| 39 | vin-supply = <&vsys_12v0>; |
| 40 | regulator-always-on; |
| 41 | regulator-boot-on; |
| 42 | }; |
| 43 | |
| 44 | vsys_3v3: fixedregulator-vsys3v3 { |
| 45 | /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */ |
| 46 | compatible = "regulator-fixed"; |
| 47 | regulator-name = "vsys_3v3"; |
| 48 | regulator-min-microvolt = <3300000>; |
| 49 | regulator-max-microvolt = <3300000>; |
| 50 | vin-supply = <&vsys_12v0>; |
| 51 | regulator-always-on; |
| 52 | regulator-boot-on; |
| 53 | }; |
| 54 | |
| 55 | vio_3v3: fixedregulator-vio_3v3 { |
| 56 | compatible = "regulator-fixed"; |
| 57 | regulator-name = "vio_3v3"; |
| 58 | regulator-min-microvolt = <3300000>; |
| 59 | regulator-max-microvolt = <3300000>; |
| 60 | vin-supply = <&vsys_3v3>; |
| 61 | regulator-always-on; |
| 62 | regulator-boot-on; |
| 63 | }; |
| 64 | |
| 65 | vio_3v3_sd: fixedregulator-sd { |
| 66 | compatible = "regulator-fixed"; |
| 67 | regulator-name = "vio_3v3_sd"; |
| 68 | regulator-min-microvolt = <3300000>; |
| 69 | regulator-max-microvolt = <3300000>; |
| 70 | vin-supply = <&vio_3v3>; |
| 71 | enable-active-high; |
| 72 | gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; |
| 73 | }; |
| 74 | |
| 75 | vio_1v8: fixedregulator-vio_1v8 { |
| 76 | compatible = "regulator-fixed"; |
| 77 | regulator-name = "vio_1v8"; |
| 78 | regulator-min-microvolt = <1800000>; |
| 79 | regulator-max-microvolt = <1800000>; |
| 80 | vin-supply = <&smps5_reg>; |
| 81 | }; |
| 82 | |
| 83 | vtt_fixed: fixedregulator-vtt { |
| 84 | compatible = "regulator-fixed"; |
| 85 | regulator-name = "vtt_fixed"; |
| 86 | regulator-min-microvolt = <1350000>; |
| 87 | regulator-max-microvolt = <1350000>; |
| 88 | vin-supply = <&vsys_3v3>; |
| 89 | regulator-always-on; |
| 90 | regulator-boot-on; |
| 91 | }; |
| 92 | |
| 93 | aic_dvdd: fixedregulator-aic_dvdd { |
| 94 | /* TPS77018DBVT */ |
| 95 | compatible = "regulator-fixed"; |
| 96 | regulator-name = "aic_dvdd"; |
| 97 | vin-supply = <&vio_3v3>; |
| 98 | regulator-min-microvolt = <1800000>; |
| 99 | regulator-max-microvolt = <1800000>; |
| 100 | }; |
| 101 | }; |
| 102 | |
| 103 | &dra7_pmx_core { |
| 104 | mmc1_pins_default: mmc1_pins_default { |
| 105 | pinctrl-single,pins = < |
| 106 | DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ |
| 107 | DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ |
| 108 | DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ |
| 109 | DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ |
| 110 | DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ |
| 111 | DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ |
| 112 | DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ |
| 113 | >; |
| 114 | }; |
| 115 | |
| 116 | mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { |
| 117 | pinctrl-single,pins = < |
| 118 | DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ |
| 119 | DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ |
| 120 | DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ |
| 121 | DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ |
| 122 | DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ |
| 123 | DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ |
| 124 | >; |
| 125 | }; |
| 126 | |
| 127 | mmc2_pins_default: mmc2_pins_default { |
| 128 | pinctrl-single,pins = < |
| 129 | DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ |
| 130 | DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ |
| 131 | DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ |
| 132 | DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ |
| 133 | DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ |
| 134 | DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ |
| 135 | DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ |
| 136 | DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ |
| 137 | DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ |
| 138 | DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ |
| 139 | >; |
| 140 | }; |
| 141 | }; |
| 142 | |
| 143 | &i2c1 { |
| 144 | status = "okay"; |
| 145 | clock-frequency = <400000>; |
| 146 | |
| 147 | tps65917: tps65917@58 { |
| 148 | compatible = "ti,tps65917"; |
| 149 | reg = <0x58>; |
| 150 | ti,system-power-controller; |
| 151 | interrupt-controller; |
| 152 | #interrupt-cells = <2>; |
| 153 | |
| 154 | tps65917_pmic { |
| 155 | compatible = "ti,tps65917-pmic"; |
| 156 | |
| 157 | smps12-in-supply = <&vsys_3v3>; |
| 158 | smps3-in-supply = <&vsys_3v3>; |
| 159 | smps4-in-supply = <&vsys_3v3>; |
| 160 | smps5-in-supply = <&vsys_3v3>; |
| 161 | ldo1-in-supply = <&vsys_3v3>; |
| 162 | ldo2-in-supply = <&vsys_3v3>; |
| 163 | ldo3-in-supply = <&vsys_5v0>; |
| 164 | ldo4-in-supply = <&vsys_5v0>; |
| 165 | ldo5-in-supply = <&vsys_3v3>; |
| 166 | |
| 167 | tps65917_regulators: regulators { |
| 168 | smps12_reg: smps12 { |
| 169 | /* VDD_DSPEVE */ |
| 170 | regulator-name = "smps12"; |
| 171 | regulator-min-microvolt = <850000>; |
| 172 | regulator-max-microvolt = <1250000>; |
| 173 | regulator-always-on; |
| 174 | regulator-boot-on; |
| 175 | }; |
| 176 | |
| 177 | smps3_reg: smps3 { |
| 178 | /* VDD_CORE */ |
| 179 | regulator-name = "smps3"; |
| 180 | regulator-min-microvolt = <850000>; |
| 181 | regulator-max-microvolt = <1250000>; |
| 182 | regulator-boot-on; |
| 183 | regulator-always-on; |
| 184 | }; |
| 185 | |
| 186 | smps4_reg: smps4 { |
| 187 | /* VDD_IVA */ |
| 188 | regulator-name = "smps4"; |
| 189 | regulator-min-microvolt = <850000>; |
| 190 | regulator-max-microvolt = <1250000>; |
| 191 | regulator-always-on; |
| 192 | regulator-boot-on; |
| 193 | }; |
| 194 | |
| 195 | smps5_reg: smps5 { |
| 196 | /* VDDS1V8 */ |
| 197 | regulator-name = "smps5"; |
| 198 | regulator-min-microvolt = <1800000>; |
| 199 | regulator-max-microvolt = <1800000>; |
| 200 | regulator-boot-on; |
| 201 | regulator-always-on; |
| 202 | }; |
| 203 | |
| 204 | ldo1_reg: ldo1 { |
| 205 | /* LDO1_OUT --> VDA_PHY1_1V8 */ |
| 206 | regulator-name = "ldo1"; |
| 207 | regulator-min-microvolt = <1800000>; |
| 208 | regulator-max-microvolt = <1800000>; |
| 209 | regulator-always-on; |
| 210 | regulator-boot-on; |
| 211 | regulator-allow-bypass; |
| 212 | }; |
| 213 | |
| 214 | ldo2_reg: ldo2 { |
| 215 | /* LDO2_OUT --> VDA_PHY2_1V8 */ |
| 216 | regulator-name = "ldo2"; |
| 217 | regulator-min-microvolt = <1800000>; |
| 218 | regulator-max-microvolt = <1800000>; |
| 219 | regulator-allow-bypass; |
| 220 | regulator-always-on; |
| 221 | }; |
| 222 | |
| 223 | ldo3_reg: ldo3 { |
| 224 | /* VDA_USB_3V3 */ |
| 225 | regulator-name = "ldo3"; |
| 226 | regulator-min-microvolt = <3300000>; |
| 227 | regulator-max-microvolt = <3300000>; |
| 228 | regulator-boot-on; |
| 229 | regulator-always-on; |
| 230 | }; |
| 231 | |
| 232 | ldo5_reg: ldo5 { |
| 233 | /* VDDA_1V8_PLL */ |
| 234 | regulator-name = "ldo5"; |
| 235 | regulator-min-microvolt = <1800000>; |
| 236 | regulator-max-microvolt = <1800000>; |
| 237 | regulator-always-on; |
| 238 | regulator-boot-on; |
| 239 | }; |
| 240 | |
| 241 | ldo4_reg: ldo4 { |
| 242 | /* VDD_SDIO_DV */ |
| 243 | regulator-name = "ldo4"; |
| 244 | regulator-min-microvolt = <1800000>; |
| 245 | regulator-max-microvolt = <3300000>; |
| 246 | regulator-boot-on; |
| 247 | regulator-always-on; |
| 248 | }; |
| 249 | }; |
| 250 | }; |
| 251 | |
| 252 | tps65917_power_button { |
| 253 | compatible = "ti,palmas-pwrbutton"; |
| 254 | interrupt-parent = <&tps65917>; |
| 255 | interrupts = <1 IRQ_TYPE_NONE>; |
| 256 | wakeup-source; |
| 257 | ti,palmas-long-press-seconds = <6>; |
| 258 | }; |
| 259 | }; |
| 260 | |
| 261 | lp87565: lp87565@60 { |
| 262 | compatible = "ti,lp87565-q1"; |
| 263 | reg = <0x60>; |
| 264 | |
| 265 | buck10-in-supply =<&vsys_3v3>; |
| 266 | buck23-in-supply =<&vsys_3v3>; |
| 267 | |
| 268 | regulators: regulators { |
| 269 | buck10_reg: buck10 { |
| 270 | /*VDD_MPU*/ |
| 271 | regulator-name = "buck10"; |
| 272 | regulator-min-microvolt = <850000>; |
| 273 | regulator-max-microvolt = <1250000>; |
| 274 | regulator-always-on; |
| 275 | regulator-boot-on; |
| 276 | }; |
| 277 | |
| 278 | buck23_reg: buck23 { |
| 279 | /* VDD_GPU*/ |
| 280 | regulator-name = "buck23"; |
| 281 | regulator-min-microvolt = <850000>; |
| 282 | regulator-max-microvolt = <1250000>; |
| 283 | regulator-boot-on; |
| 284 | regulator-always-on; |
| 285 | }; |
| 286 | }; |
| 287 | }; |
| 288 | |
| 289 | pcf_lcd: pcf8757@20 { |
| 290 | compatible = "ti,pcf8575", "nxp,pcf8575"; |
| 291 | reg = <0x20>; |
| 292 | gpio-controller; |
| 293 | #gpio-cells = <2>; |
| 294 | interrupt-controller; |
| 295 | #interrupt-cells = <2>; |
| 296 | interrupt-parent = <&gpio1>; |
| 297 | interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
| 298 | }; |
| 299 | |
| 300 | pcf_gpio_21: pcf8757@21 { |
| 301 | compatible = "ti,pcf8575", "nxp,pcf8575"; |
| 302 | reg = <0x21>; |
| 303 | gpio-controller; |
| 304 | #gpio-cells = <2>; |
| 305 | interrupt-parent = <&gpio1>; |
| 306 | interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
| 307 | interrupt-controller; |
| 308 | #interrupt-cells = <2>; |
| 309 | }; |
| 310 | |
| 311 | pcf_hdmi: pcf8575@26 { |
| 312 | compatible = "ti,pcf8575", "nxp,pcf8575"; |
| 313 | reg = <0x26>; |
| 314 | gpio-controller; |
| 315 | #gpio-cells = <2>; |
| 316 | p1 { |
| 317 | /* vin6_sel_s0: high: VIN6, low: audio */ |
| 318 | gpio-hog; |
| 319 | gpios = <1 GPIO_ACTIVE_HIGH>; |
| 320 | output-low; |
| 321 | line-name = "vin6_sel_s0"; |
| 322 | }; |
| 323 | }; |
| 324 | |
| 325 | tlv320aic3106: tlv320aic3106@19 { |
| 326 | #sound-dai-cells = <0>; |
| 327 | compatible = "ti,tlv320aic3106"; |
| 328 | reg = <0x19>; |
| 329 | adc-settle-ms = <40>; |
| 330 | ai3x-micbias-vg = <1>; /* 2.0V */ |
| 331 | status = "okay"; |
| 332 | |
| 333 | /* Regulators */ |
| 334 | AVDD-supply = <&vio_3v3>; |
| 335 | IOVDD-supply = <&vio_3v3>; |
| 336 | DRVDD-supply = <&vio_3v3>; |
| 337 | DVDD-supply = <&aic_dvdd>; |
| 338 | }; |
| 339 | }; |
| 340 | |
| 341 | &cpu0 { |
| 342 | vdd-supply = <&buck10_reg>; |
| 343 | }; |
| 344 | |
| 345 | &mmc1 { |
| 346 | status = "okay"; |
| 347 | vmmc-supply = <&vio_3v3_sd>; |
| 348 | vmmc_aux-supply = <&ldo4_reg>; |
| 349 | bus-width = <4>; |
| 350 | /* |
| 351 | * SDCD signal is not being used here - using the fact that GPIO mode |
| 352 | * is always hardwired. |
| 353 | */ |
| 354 | cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; |
| 355 | pinctrl-names = "default"; |
| 356 | pinctrl-0 = <&mmc1_pins_default>; |
| 357 | }; |
| 358 | |
| 359 | &mmc2 { |
| 360 | status = "okay"; |
| 361 | vmmc-supply = <&vio_1v8>; |
| 362 | bus-width = <8>; |
| 363 | pinctrl-names = "default"; |
| 364 | pinctrl-0 = <&mmc2_pins_default>; |
| 365 | }; |
| 366 | |
| 367 | /* No RTC on this device */ |
| 368 | &rtc { |
| 369 | status = "disabled"; |
| 370 | }; |
| 371 | |
| 372 | &mac { |
| 373 | status = "okay"; |
| 374 | |
| 375 | dual_emac; |
| 376 | }; |
| 377 | |
| 378 | &cpsw_emac0 { |
| 379 | phy_id = <&davinci_mdio>, <2>; |
| 380 | phy-mode = "rgmii-id"; |
| 381 | dual_emac_res_vlan = <1>; |
| 382 | }; |
| 383 | |
| 384 | &cpsw_emac1 { |
| 385 | phy_id = <&davinci_mdio>, <3>; |
| 386 | phy-mode = "rgmii-id"; |
| 387 | dual_emac_res_vlan = <2>; |
| 388 | }; |
| 389 | |
| 390 | &davinci_mdio { |
| 391 | dp83867_0: ethernet-phy@2 { |
| 392 | reg = <2>; |
| 393 | ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; |
| 394 | ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; |
| 395 | ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; |
| 396 | ti,min-output-impedance; |
| 397 | ti,dp83867-rxctrl-strap-quirk; |
| 398 | }; |
| 399 | |
| 400 | dp83867_1: ethernet-phy@3 { |
| 401 | reg = <3>; |
| 402 | ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; |
| 403 | ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; |
| 404 | ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; |
| 405 | ti,min-output-impedance; |
| 406 | ti,dp83867-rxctrl-strap-quirk; |
| 407 | }; |
| 408 | }; |
| 409 | |
| 410 | &usb2_phy1 { |
| 411 | phy-supply = <&ldo3_reg>; |
| 412 | }; |
| 413 | |
| 414 | &usb2_phy2 { |
| 415 | phy-supply = <&ldo3_reg>; |
| 416 | }; |
| 417 | |
| 418 | &qspi { |
| 419 | spi-max-frequency = <96000000>; |
| 420 | m25p80@0 { |
| 421 | spi-max-frequency = <96000000>; |
| 422 | }; |
| 423 | }; |