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Macpaul Lin00f892f2011-10-11 22:33:15 +00001/*
2 * linux/include/asm-nds/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * Copyright (C) 2011 Andes Technology Corporation
7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Modifications:
15 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
16 * constant addresses and variable addresses.
17 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
18 * specific IO header files.
19 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
20 * 04-Apr-1999 PJB Added check_signature.
21 * 12-Dec-1999 RMK More cleanups
22 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
23 */
24#ifndef __ASM_NDS_IO_H
25#define __ASM_NDS_IO_H
26
27/*
28 * CAUTION:
29 * - do not implement for NDS32 Arch yet.
30 * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
31 * iinclude asm/io.h
32 */
33
34#ifdef __KERNEL__
35
36#include <linux/types.h>
37#include <asm/byteorder.h>
38
39static inline void sync(void)
40{
41}
42
43/*
44 * Given a physical address and a length, return a virtual address
45 * that can be used to access the memory range with the caching
46 * properties specified by "flags".
47 */
48#define MAP_NOCACHE (0)
49#define MAP_WRCOMBINE (0)
50#define MAP_WRBACK (0)
51#define MAP_WRTHROUGH (0)
52
53static inline void *
54map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
55{
56 return (void *)paddr;
57}
58
59/*
60 * Take down a mapping set up by map_physmem().
61 */
62static inline void unmap_physmem(void *vaddr, unsigned long flags)
63{
64
65}
66
67static inline phys_addr_t virt_to_phys(void *vaddr)
68{
69 return (phys_addr_t)(vaddr);
70}
71
72/*
73 * Generic virtual read/write. Note that we don't support half-word
74 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
75 * to the architecture specific code.
76 */
77#define __arch_getb(a) (*(unsigned char *)(a))
78#define __arch_getw(a) (*(unsigned short *)(a))
79#define __arch_getl(a) (*(unsigned int *)(a))
80
81#define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
82#define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
83#define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
84
85extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
86extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
87extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
88
89extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
90extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
91extern void __raw_readsl(unsigned int addr, void *data, int longlen);
92
93#define __raw_writeb(v, a) __arch_putb(v, a)
94#define __raw_writew(v, a) __arch_putw(v, a)
95#define __raw_writel(v, a) __arch_putl(v, a)
96
97#define __raw_readb(a) __arch_getb(a)
98#define __raw_readw(a) __arch_getw(a)
99#define __raw_readl(a) __arch_getl(a)
100
Macpaul Lina53ef5e2011-10-24 13:31:05 +0800101/*
102 * TODO: The kernel offers some more advanced versions of barriers, it might
103 * have some advantages to use them instead of the simple one here.
104 */
105#define dmb() __asm__ __volatile__ ("" : : : "memory")
106#define __iormb() dmb()
107#define __iowmb() dmb()
Macpaul Lin00f892f2011-10-11 22:33:15 +0000108
Macpaul Lina53ef5e2011-10-24 13:31:05 +0800109static inline void writeb(unsigned char val, unsigned char *addr)
110{
111 __iowmb();
112 __arch_putb(val, addr);
113}
114
115static inline void writew(unsigned short val, unsigned short *addr)
116{
117 __iowmb();
118 __arch_putw(val, addr);
119
120}
121
122static inline void writel(unsigned int val, unsigned int *addr)
123{
124 __iowmb();
125 __arch_putl(val, addr);
126}
127
128static inline unsigned char readb(unsigned char *addr)
129{
130 u8 val;
131
132 val = __arch_getb(addr);
133 __iormb();
134 return val;
135}
136
137static inline unsigned short readw(unsigned short *addr)
138{
139 u16 val;
140
141 val = __arch_getw(addr);
142 __iormb();
143 return val;
144}
145
146static inline unsigned int readl(unsigned int *addr)
147{
148 u32 val;
149
150 val = __arch_getl(addr);
151 __iormb();
152 return val;
153}
Macpaul Lin00f892f2011-10-11 22:33:15 +0000154
155/*
156 * The compiler seems to be incapable of optimising constants
157 * properly. Spell it out to the compiler in some cases.
158 * These are only valid for small values of "off" (< 1<<12)
159 */
160#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
161#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
162#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
163
164#define __raw_base_readb(base, off) __arch_base_getb(base, off)
165#define __raw_base_readw(base, off) __arch_base_getw(base, off)
166#define __raw_base_readl(base, off) __arch_base_getl(base, off)
167
168/*
169 * Now, pick up the machine-defined IO definitions
170 * #include <asm/arch/io.h>
171 */
172
173/*
174 * IO port access primitives
175 * -------------------------
176 *
177 * The NDS32 doesn't have special IO access instructions just like ARM;
178 * all IO is memory mapped.
179 * Note that these are defined to perform little endian accesses
180 * only. Their primary purpose is to access PCI and ISA peripherals.
181 *
182 * Note that for a big endian machine, this implies that the following
183 * big endian mode connectivity is in place, as described by numerious
184 * ARM documents:
185 *
186 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
187 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
188 *
189 * The machine specific io.h include defines __io to translate an "IO"
190 * address to a memory address.
191 *
192 * Note that we prevent GCC re-ordering or caching values in expressions
193 * by introducing sequence points into the in*() definitions. Note that
194 * __raw_* do not guarantee this behaviour.
195 *
196 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
197 */
198#ifdef __io
199#define outb(v, p) __raw_writeb(v, __io(p))
200#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
201#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
202
203#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
204#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
205#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
206
207#define outsb(p, d, l) writesb(__io(p), d, l)
208#define outsw(p, d, l) writesw(__io(p), d, l)
209#define outsl(p, d, l) writesl(__io(p), d, l)
210
211#define insb(p, d, l) readsb(__io(p), d, l)
212#define insw(p, d, l) readsw(__io(p), d, l)
213#define insl(p, d, l) readsl(__io(p), d, l)
214
215static inline void readsb(unsigned int *addr, void * data, int bytelen)
216{
217 unsigned char *ptr = (unsigned char *)addr;
218 unsigned char *ptr2 = (unsigned char *)data;
219 while (bytelen) {
220 *ptr2 = *ptr;
221 ptr2++;
222 bytelen--;
223 }
224}
225
226static inline void readsw(unsigned int *addr, void * data, int wordlen)
227{
228 unsigned short *ptr = (unsigned short *)addr;
229 unsigned short *ptr2 = (unsigned short *)data;
230 while (wordlen) {
231 *ptr2 = *ptr;
232 ptr2++;
233 wordlen--;
234 }
235}
236
237static inline void readsl(unsigned int *addr, void * data, int longlen)
238{
239 unsigned int *ptr = (unsigned int *)addr;
240 unsigned int *ptr2 = (unsigned int *)data;
241 while (longlen) {
242 *ptr2 = *ptr;
243 ptr2++;
244 longlen--;
245 }
246}
247static inline void writesb(unsigned int *addr, const void * data, int bytelen)
248{
249 unsigned char *ptr = (unsigned char *)addr;
250 unsigned char *ptr2 = (unsigned char *)data;
251 while (bytelen) {
252 *ptr = *ptr2;
253 ptr2++;
254 bytelen--;
255 }
256}
257static inline void writesw(unsigned int *addr, const void * data, int wordlen)
258{
259 unsigned short *ptr = (unsigned short *)addr;
260 unsigned short *ptr2 = (unsigned short *)data;
261 while (wordlen) {
262 *ptr = *ptr2;
263 ptr2++;
264 wordlen--;
265 }
266}
267static inline void writesl(unsigned int *addr, const void * data, int longlen)
268{
269 unsigned int *ptr = (unsigned int *)addr;
270 unsigned int *ptr2 = (unsigned int *)data;
271 while (longlen) {
272 *ptr = *ptr2;
273 ptr2++;
274 longlen--;
275 }
276}
277#endif
278
279#define outb_p(val, port) outb((val), (port))
280#define outw_p(val, port) outw((val), (port))
281#define outl_p(val, port) outl((val), (port))
282#define inb_p(port) inb((port))
283#define inw_p(port) inw((port))
284#define inl_p(port) inl((port))
285
286#define outsb_p(port, from, len) outsb(port, from, len)
287#define outsw_p(port, from, len) outsw(port, from, len)
288#define outsl_p(port, from, len) outsl(port, from, len)
289#define insb_p(port, to, len) insb(port, to, len)
290#define insw_p(port, to, len) insw(port, to, len)
291#define insl_p(port, to, len) insl(port, to, len)
292
293/*
294 * ioremap and friends.
295 *
296 * ioremap takes a PCI memory address, as specified in
297 * linux/Documentation/IO-mapping.txt. If you want a
298 * physical address, use __ioremap instead.
299 */
300extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
301extern void __iounmap(void *addr);
302
303/*
304 * Generic ioremap support.
305 *
306 * Define:
307 * iomem_valid_addr(off,size)
308 * iomem_to_phys(off)
309 */
310#ifdef iomem_valid_addr
311#define __arch_ioremap(off, sz, nocache) \
312({ \
313 unsigned long _off = (off), _size = (sz); \
314 void *_ret = (void *)0; \
315 if (iomem_valid_addr(_off, _size)) \
316 _ret = __ioremap(iomem_to_phys(_off), _size, 0); \
317 _ret; \
318})
319
320#define __arch_iounmap __iounmap
321#endif
322
323#define ioremap(off, sz) __arch_ioremap((off), (sz), 0)
324#define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1)
325#define iounmap(_addr) __arch_iounmap(_addr)
326
327/*
328 * DMA-consistent mapping functions. These allocate/free a region of
329 * uncached, unwrite-buffered mapped memory space for use with DMA
330 * devices. This is the "generic" version. The PCI specific version
331 * is in pci.h
332 */
333extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
334extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
335extern void consistent_sync(void *vaddr, size_t size, int rw);
336
337/*
338 * String version of IO memory access ops:
339 */
340extern void _memcpy_fromio(void *, unsigned long, size_t);
341extern void _memcpy_toio(unsigned long, const void *, size_t);
342extern void _memset_io(unsigned long, int, size_t);
343
344extern void __readwrite_bug(const char *fn);
345
346/*
347 * If this architecture has PCI memory IO, then define the read/write
348 * macros. These should only be used with the cookie passed from
349 * ioremap.
350 */
351#ifdef __mem_pci
352
353#define readb(c) ({ unsigned int __v = \
354 __raw_readb(__mem_pci(c)); __v; })
355#define readw(c) ({ unsigned int __v = \
356 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
357#define readl(c) ({ unsigned int __v = \
358 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
359
360#define writeb(v, c) __raw_writeb(v, __mem_pci(c))
361#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
362#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
363
364#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
365#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
366#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
367
368#define eth_io_copy_and_sum(s, c, l, b) \
369 eth_copy_and_sum((s), __mem_pci(c), (l), (b))
370
371static inline int
372check_signature(unsigned long io_addr, const unsigned char *signature,
373 int length)
374{
375 int retval = 0;
376 do {
377 if (readb(io_addr) != *signature)
378 goto out;
379 io_addr++;
380 signature++;
381 length--;
382 } while (length);
383 retval = 1;
384out:
385 return retval;
386}
Macpaul Lin00f892f2011-10-11 22:33:15 +0000387#endif /* __mem_pci */
388
389/*
390 * If this architecture has ISA IO, then define the isa_read/isa_write
391 * macros.
392 */
393#ifdef __mem_isa
394
395#define isa_readb(addr) __raw_readb(__mem_isa(addr))
396#define isa_readw(addr) __raw_readw(__mem_isa(addr))
397#define isa_readl(addr) __raw_readl(__mem_isa(addr))
398#define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
399#define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
400#define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
401#define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
402#define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
403#define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
404
405#define isa_eth_io_copy_and_sum(a, b, c, d) \
406 eth_copy_and_sum((a), __mem_isa(b), (c), (d))
407
408static inline int
409isa_check_signature(unsigned long io_addr, const unsigned char *signature,
410 int length)
411{
412 int retval = 0;
413 do {
414 if (isa_readb(io_addr) != *signature)
415 goto out;
416 io_addr++;
417 signature++;
418 length--;
419 } while (length);
420 retval = 1;
421out:
422 return retval;
423}
424
425#else /* __mem_isa */
426
427#define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
428#define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
429#define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
430#define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
431#define isa_writew(val, addr) __readwrite_bug("isa_writew")
432#define isa_writel(val, addr) __readwrite_bug("isa_writel")
433#define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
434#define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
435#define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
436
437#define isa_eth_io_copy_and_sum(a, b, c, d) \
438 __readwrite_bug("isa_eth_io_copy_and_sum")
439
440#define isa_check_signature(io, sig, len) (0)
441
442#endif /* __mem_isa */
443#endif /* __KERNEL__ */
444#endif /* __ASM_NDS_IO_H */