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Heiko Schocher7254d922015-05-18 13:32:31 +02001/*
2 * (C) Copyright 2015
3 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
8 *
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13#ifndef __ARISTAINETOS_COMMON_CONFIG_H
14#define __ARISTAINETOS_COMMON_CONFIG_H
15
Heiko Schocher7254d922015-05-18 13:32:31 +020016#include "mx6_common.h"
Heiko Schocher7254d922015-05-18 13:32:31 +020017
Heiko Schocher7254d922015-05-18 13:32:31 +020018#define CONFIG_MACH_TYPE 4501
19#define CONFIG_MMCROOT "/dev/mmcblk0p1"
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
Heiko Schocher7254d922015-05-18 13:32:31 +020022/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
24
25#define CONFIG_BOARD_EARLY_INIT_F
Heiko Schocher7254d922015-05-18 13:32:31 +020026
27#define CONFIG_MXC_UART
28
Heiko Schocher7254d922015-05-18 13:32:31 +020029/* MMC Configs */
Heiko Schocher7254d922015-05-18 13:32:31 +020030#define CONFIG_SYS_FSL_ESDHC_ADDR 0
31
Heiko Schocher7254d922015-05-18 13:32:31 +020032#define CONFIG_CMD_PING
33#define CONFIG_CMD_DHCP
34#define CONFIG_CMD_MII
Heiko Schocher7254d922015-05-18 13:32:31 +020035#define CONFIG_FEC_MXC
36#define CONFIG_MII
37#define IMX_FEC_BASE ENET_BASE_ADDR
38#define CONFIG_ETHPRIME "FEC"
39#define CONFIG_FEC_MXC_PHYADDR 0
40
41#define CONFIG_PHYLIB
42#define CONFIG_PHY_MICREL
43
44#define CONFIG_CMD_SF
Heiko Schocher7254d922015-05-18 13:32:31 +020045#define CONFIG_SPI_FLASH_MTD
Heiko Schocher7254d922015-05-18 13:32:31 +020046#define CONFIG_MXC_SPI
Heiko Schocher7254d922015-05-18 13:32:31 +020047#define CONFIG_SF_DEFAULT_SPEED 20000000
48#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
49#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
50
Heiko Schocher7254d922015-05-18 13:32:31 +020051/* Command definition */
Heiko Schocher7254d922015-05-18 13:32:31 +020052#define CONFIG_CMD_BMODE
Heiko Schocher7254d922015-05-18 13:32:31 +020053
Heiko Schocher7254d922015-05-18 13:32:31 +020054#define CONFIG_EXTRA_ENV_SETTINGS \
55 "script=u-boot.scr\0" \
56 "fit_file=/boot/system.itb\0" \
57 "loadaddr=0x12000000\0" \
58 "fit_addr_r=0x14000000\0" \
59 "uboot=/boot/u-boot.imx\0" \
60 "uboot_sz=d0000\0" \
61 "rescue_sys_addr=f0000\0" \
62 "rescue_sys_length=f10000\0" \
63 "panel=lb07wv8\0" \
64 "splashpos=m,m\0" \
65 "console=" CONFIG_CONSOLE_DEV "\0" \
66 "fdt_high=0xffffffff\0" \
67 "initrd_high=0xffffffff\0" \
68 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
69 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
70 "default ${board_type}\0" \
71 "get_env=mw ${loadaddr} 0 0x20000;" \
72 "mmc rescan;" \
73 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
74 "env import -t ${loadaddr}\0" \
75 "default_env=mw ${loadaddr} 0 0x20000;" \
76 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
77 "board_type panel;" \
78 "env default -a;" \
79 "env import -t ${loadaddr}\0" \
80 "loadbootscript=" \
81 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
82 "bootscript=echo Running bootscript from mmc ...; " \
83 "source\0" \
84 "mmcpart=1\0" \
85 "mmcdev=0\0" \
86 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
87 "mmcargs=setenv bootargs console=${console},${baudrate} " \
88 "root=${mmcroot}\0" \
89 "mmcboot=echo Booting from mmc ...; " \
90 "run mmcargs addmtd addmisc set_fit_default;" \
91 "bootm ${fit_addr_r}\0" \
92 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
93 "${fit_file}\0" \
94 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
95 "${uboot}\0" \
96 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
97 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
98 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
99 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
100 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
101 "sf write ${loadaddr} 400 ${filesize};" \
102 "sf read ${cmp_buf} 400 ${uboot_sz};" \
103 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
104 "ubiboot=echo Booting from ubi ...; " \
105 "run ubiargs addmtd addmisc set_fit_default;" \
106 "bootm ${fit_addr_r}\0" \
Heiko Schocher7254d922015-05-18 13:32:31 +0200107 "rescueargs=setenv bootargs console=${console},${baudrate} " \
108 "root=/dev/ram rw\0 " \
109 "rescueboot=echo Booting rescue system from NOR ...; " \
110 "run rescueargs addmtd addmisc set_fit_default;" \
111 "bootm ${fit_addr_r}\0" \
112 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
113 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
114 CONFIG_EXTRA_ENV_BOARD_SETTINGS
115
116#define CONFIG_BOOTCOMMAND \
117 "mmc dev ${mmcdev};" \
118 "if mmc rescan; then " \
119 "if run loadbootscript; then " \
120 "run bootscript; " \
121 "else " \
122 "if run mmc_load_fit; then " \
123 "run mmcboot; " \
124 "else " \
125 "if run ubifs_load_fit; then " \
126 "run ubiboot; " \
127 "else " \
128 "if run rescue_load_fit; then " \
129 "run rescueboot; " \
130 "else " \
131 "echo RESCUE SYSTEM BOOT " \
132 "FAILURE;" \
133 "fi; " \
134 "fi; " \
135 "fi; " \
136 "fi; " \
137 "else " \
138 "if run ubifs_load_fit; then " \
139 "run ubiboot; " \
140 "else " \
141 "if run rescue_load_fit; then " \
142 "run rescueboot; " \
143 "else " \
144 "echo RESCUE SYSTEM BOOT FAILURE;" \
145 "fi; " \
146 "fi; " \
147 "fi"
148
149#define CONFIG_ARP_TIMEOUT 200UL
150
Heiko Schocher7254d922015-05-18 13:32:31 +0200151/* Print Buffer Size */
152#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Heiko Schocher7254d922015-05-18 13:32:31 +0200153
154#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
155#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
156#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
157
Heiko Schocher7254d922015-05-18 13:32:31 +0200158#define CONFIG_STACKSIZE (128 * 1024)
159
160/* Physical Memory Map */
161#define CONFIG_NR_DRAM_BANKS 1
162#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
163
164#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
165#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
166#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
167
168#define CONFIG_SYS_INIT_SP_OFFSET \
169 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
170#define CONFIG_SYS_INIT_SP_ADDR \
171 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
172
Peter Robinson056845c2015-05-22 17:30:45 +0100173/* Environment organization */
Heiko Schocher7254d922015-05-18 13:32:31 +0200174#define CONFIG_ENV_SIZE (12 * 1024)
175#define CONFIG_ENV_IS_IN_SPI_FLASH
176#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
177#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
178#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
179#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
180#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
181#define CONFIG_ENV_SECT_SIZE (0x010000)
182#define CONFIG_ENV_OFFSET (0x0d0000)
183#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
184
Heiko Schocher7254d922015-05-18 13:32:31 +0200185#define CONFIG_SYS_FSL_USDHC_NUM 2
186
187/* I2C */
188#define CONFIG_CMD_I2C
189#define CONFIG_SYS_I2C
190#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +0200191#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
192#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Heiko Schocher7254d922015-05-18 13:32:31 +0200193#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
194#define CONFIG_SYS_I2C_SPEED 100000
195#define CONFIG_SYS_I2C_SLAVE 0x7f
196#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
197
Heiko Schocher7254d922015-05-18 13:32:31 +0200198/* NAND stuff */
199#define CONFIG_CMD_NAND
200#define CONFIG_CMD_NAND_TRIMFFS
201#define CONFIG_NAND_MXS
202#define CONFIG_SYS_MAX_NAND_DEVICE 1
203#define CONFIG_SYS_NAND_BASE 0x40000000
204#define CONFIG_SYS_NAND_5_ADDR_CYCLE
205#define CONFIG_SYS_NAND_ONFI_DETECTION
206
207/* DMA stuff, needed for GPMI/MXS NAND support */
208#define CONFIG_APBH_DMA
209#define CONFIG_APBH_DMA_BURST
210#define CONFIG_APBH_DMA_BURST8
211
212/* RTC */
213#define CONFIG_SYS_I2C_RTC_ADDR 0x68
214#define CONFIG_SYS_RTC_BUS_NUM 2
215#define CONFIG_RTC_M41T11
216#define CONFIG_CMD_DATE
217
218/* USB Configs */
219#define CONFIG_CMD_USB
Heiko Schocher7254d922015-05-18 13:32:31 +0200220#define CONFIG_USB_EHCI
221#define CONFIG_USB_EHCI_MX6
222#define CONFIG_USB_STORAGE
223#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
224#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
225#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
226#define CONFIG_MXC_USB_FLAGS 0
227
228/* UBI support */
Peter Robinsona380ce62015-05-22 17:30:51 +0100229#define CONFIG_LZO
Heiko Schocher7254d922015-05-18 13:32:31 +0200230#define CONFIG_CMD_MTDPARTS
231#define CONFIG_MTD_PARTITIONS
232#define CONFIG_MTD_DEVICE
233#define CONFIG_RBTREE
Heiko Schocher7254d922015-05-18 13:32:31 +0200234#define CONFIG_CMD_UBI
235#define CONFIG_CMD_UBIFS
236
237#define CONFIG_MTD_UBI_FASTMAP
238#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
239
240#define CONFIG_HW_WATCHDOG
241#define CONFIG_IMX_WATCHDOG
242
243#define CONFIG_FIT
244
245/* Framebuffer */
246#define CONFIG_VIDEO
247#define CONFIG_VIDEO_IPUV3
248/* check this console not needed, after test remove it */
249#define CONFIG_CFB_CONSOLE
250#define CONFIG_VGA_AS_SINGLE_DEVICE
251#define CONFIG_SYS_CONSOLE_IS_IN_ENV
252#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
253#define CONFIG_VIDEO_BMP_RLE8
254#define CONFIG_SPLASH_SCREEN
255#define CONFIG_SPLASH_SCREEN_ALIGN
256#define CONFIG_BMP_16BPP
257#define CONFIG_VIDEO_LOGO
258#define CONFIG_VIDEO_BMP_LOGO
259#define CONFIG_IPUV3_CLK 198000000
260#define CONFIG_IMX_VIDEO_SKIP
261
262#define CONFIG_CMD_BMP
263
264#define CONFIG_PWM_IMX
265#define CONFIG_IMX6_PWM_PER_CLK 66000000
266
267#endif /* __ARISTAINETOS_COMMON_CONFIG_H */