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wdenk5e5f9ed2005-04-13 23:15:10 +00001/*
2 * (C) Copyright 2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk5e5f9ed2005-04-13 23:15:10 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020017#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
Anatolij Gustschinab9f5f82015-08-13 23:57:53 +020018#define CONFIG_DISPLAY_BOARDINFO
wdenk5e5f9ed2005-04-13 23:15:10 +000019
Wolfgang Denk2ae18242010-10-06 09:05:45 +020020/*
21 * allowed and functional CONFIG_SYS_TEXT_BASE values:
22 * 0xfe000000 low boot at 0x00000100 (default board setting)
23 * 0x00100000 RAM load and test
24 */
25#define CONFIG_SYS_TEXT_BASE 0xFE000000
26
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020027#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk5e5f9ed2005-04-13 23:15:10 +000028
wdenk5e5f9ed2005-04-13 23:15:10 +000029#define CONFIG_BOARD_EARLY_INIT_R
30
Becky Bruce31d82672008-05-08 19:02:12 -050031#define CONFIG_HIGH_BATS 1 /* High BATs supported */
32
wdenk5e5f9ed2005-04-13 23:15:10 +000033/*
34 * Serial console configuration
35 */
36#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
37#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020038#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
wdenk5e5f9ed2005-04-13 23:15:10 +000039
wdenk5e5f9ed2005-04-13 23:15:10 +000040
Jon Loeliger37e4f242007-07-04 22:31:56 -050041/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -050042 * BOOTP options
43 */
44#define CONFIG_BOOTP_BOOTFILESIZE
45#define CONFIG_BOOTP_BOOTPATH
46#define CONFIG_BOOTP_GATEWAY
47#define CONFIG_BOOTP_HOSTNAME
48
49
50/*
Jon Loeliger37e4f242007-07-04 22:31:56 -050051 * Command line configuration.
52 */
Jon Loeliger37e4f242007-07-04 22:31:56 -050053#define CONFIG_CMD_ASKENV
54#define CONFIG_CMD_DATE
55#define CONFIG_CMD_DHCP
56#define CONFIG_CMD_IMMAP
57#define CONFIG_CMD_MII
Jon Loeliger37e4f242007-07-04 22:31:56 -050058#define CONFIG_CMD_REGINFO
59#define CONFIG_CMD_SNTP
60
wdenk5e5f9ed2005-04-13 23:15:10 +000061
62/*
63 * MUST be low boot - HIGHBOOT is not supported anymore
64 */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020065#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066# define CONFIG_SYS_LOWBOOT 1
67# define CONFIG_SYS_LOWBOOT16 1
wdenk5e5f9ed2005-04-13 23:15:10 +000068#else
Wolfgang Denk14d0a022010-10-07 21:51:12 +020069# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
wdenk5e5f9ed2005-04-13 23:15:10 +000070#endif
71
72/*
73 * Autobooting
74 */
75#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
76
77#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010078 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk5e5f9ed2005-04-13 23:15:10 +000079 "echo"
80
81#undef CONFIG_BOOTARGS
82
83#define CONFIG_EXTRA_ENV_SETTINGS \
84 "netdev=eth0\0" \
85 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010086 "nfsroot=${serverip}:${rootpath}\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000087 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010088 "addip=setenv bootargs ${bootargs} " \
89 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
90 ":${hostname}:${netdev}:off panic=1\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000091 "flash_nfs=run nfsargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010092 "bootm ${kernel_addr}\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000093 "flash_self=run ramargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010094 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
95 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +000096 "rootpath=/opt/eldk/ppc_6xx\0" \
97 "bootfile=/tftpboot/canmb/uImage\0" \
98 ""
99
100#define CONFIG_BOOTCOMMAND "run flash_self"
101
102/*
103 * IPB Bus clocking configuration.
104 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenk5e5f9ed2005-04-13 23:15:10 +0000106
107/*
108 * Flash configuration, expect one 16 Megabyte Bank at most
109 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#define CONFIG_SYS_FLASH_BASE 0xFE000000
111#define CONFIG_SYS_FLASH_SIZE 0x02000000
112#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
113#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
wdenk5e5f9ed2005-04-13 23:15:10 +0000114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
116#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
wdenk5e5f9ed2005-04-13 23:15:10 +0000117
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200118#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_FLASH_CFI
120#define CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5e5f9ed2005-04-13 23:15:10 +0000121
122/*
wdenk5e5f9ed2005-04-13 23:15:10 +0000123 * Environment settings
124 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200125#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200126#define CONFIG_ENV_OFFSET (2*128*1024)
127#define CONFIG_ENV_SIZE 0x2000
128#define CONFIG_ENV_SECT_SIZE (128*1024)
wdenk5e5f9ed2005-04-13 23:15:10 +0000129
130/*
131 * Memory map
132 *
133 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
134 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
136#define CONFIG_SYS_SDRAM_BASE 0x00000000
137#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
wdenk5e5f9ed2005-04-13 23:15:10 +0000138
139/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200141#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
wdenk5e5f9ed2005-04-13 23:15:10 +0000142
143
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200144#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk5e5f9ed2005-04-13 23:15:10 +0000146
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200147#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
149# define CONFIG_SYS_RAMBOOT 1
wdenk5e5f9ed2005-04-13 23:15:10 +0000150#endif
151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
153#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
154#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenk5e5f9ed2005-04-13 23:15:10 +0000155
156/*
157 * Ethernet configuration
158 */
159#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800160#define CONFIG_MPC5xxx_FEC_MII100
wdenka6310922005-04-21 21:10:22 +0000161#define CONFIG_PHY_ADDR 0x0
wdenk5e5f9ed2005-04-13 23:15:10 +0000162/*
163 * GPIO configuration:
164 * PSC1,2,3 predefined as UART
165 * PCI disabled
166 * Ethernet 100 with MD
167 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
wdenk5e5f9ed2005-04-13 23:15:10 +0000169
170/*
171 * Miscellaneous configurable options
172 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500174#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000176#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000178#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
180#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
181#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000182
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
184#define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
wdenk5e5f9ed2005-04-13 23:15:10 +0000185
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
wdenk5e5f9ed2005-04-13 23:15:10 +0000187
wdenk5e5f9ed2005-04-13 23:15:10 +0000188#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
189
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500191#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500193#endif
194
wdenk5e5f9ed2005-04-13 23:15:10 +0000195/*
196 * Various low-level settings
197 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
199#define CONFIG_SYS_HID0_FINAL HID0_ICE
wdenk5e5f9ed2005-04-13 23:15:10 +0000200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
202#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
203#define CONFIG_SYS_BOOTCS_CFG 0x00047D01
204#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
205#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
wdenk5e5f9ed2005-04-13 23:15:10 +0000206
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#define CONFIG_SYS_CS_BURST 0x00000000
208#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
wdenk5e5f9ed2005-04-13 23:15:10 +0000209
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_RESET_ADDRESS 0x7f000000
wdenk5e5f9ed2005-04-13 23:15:10 +0000211
212#endif /* __CONFIG_H */