blob: 64831a422323fd5fdcae843ced62afe269cac739 [file] [log] [blame]
Simon Glassd36856a2020-02-06 09:55:04 -07001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Cr50 / H1 TPM support
4 *
5 * Copyright 2018 Google LLC
6 */
7
8#define LOG_CATEGORY UCLASS_TPM
9
10#include <common.h>
11#include <dm.h>
12#include <i2c.h>
13#include <irq.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060014#include <log.h>
Simon Glassd36856a2020-02-06 09:55:04 -070015#include <spl.h>
16#include <tpm-v2.h>
Simon Glasseaac9712020-09-22 12:45:24 -060017#include <acpi/acpigen.h>
18#include <acpi/acpi_device.h>
Simon Glassd36856a2020-02-06 09:55:04 -070019#include <asm/gpio.h>
20#include <asm/io.h>
21#include <asm/arch/iomap.h>
22#include <asm/arch/pm.h>
Simon Glassc05ed002020-05-10 11:40:11 -060023#include <linux/delay.h>
Simon Glasseaac9712020-09-22 12:45:24 -060024#include <dm/acpi.h>
Simon Glassd36856a2020-02-06 09:55:04 -070025
26enum {
27 TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
28 TIMEOUT_LONG_US = 2 * 1000 * 1000,
29 TIMEOUT_SHORT_US = 2 * 1000,
30 TIMEOUT_NO_IRQ_US = 20 * 1000,
31 TIMEOUT_IRQ_US = 100 * 1000,
32};
33
34enum {
35 CR50_DID_VID = 0x00281ae0L
36};
37
38enum {
39 CR50_MAX_BUF_SIZE = 63,
40};
41
Simon Glassfe6831d2020-04-08 16:57:23 -060042/**
43 * struct cr50_priv - Private driver data
44 *
45 * @ready_gpio: GPIO to use to check if the TPM is ready
46 * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
47 * @locality: Currenttly claimed locality (-1 if none)
48 * @vendor: vendor: Vendor ID for TPM
49 * @use_irq: true to use @irq, false to use @ready if available
50 */
Simon Glassd36856a2020-02-06 09:55:04 -070051struct cr50_priv {
52 struct gpio_desc ready_gpio;
53 struct irq irq;
54 int locality;
55 uint vendor;
56 bool use_irq;
57};
58
59/* Wait for interrupt to indicate TPM is ready */
60static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
61{
62 struct cr50_priv *priv = dev_get_priv(dev);
63 ulong timeout, base;
64 int i;
65
66 if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
67 /* Fixed delay if interrupt not supported */
68 udelay(TIMEOUT_NO_IRQ_US);
69 return 0;
70 }
71
72 base = timer_get_us();
73 timeout = base + TIMEOUT_IRQ_US;
74
75 i = 0;
76 while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
77 !dm_gpio_get_value(&priv->ready_gpio)) {
78 i++;
79 if ((int)(timer_get_us() - timeout) >= 0) {
80 log_warning("Timeout\n");
81 /* Use this instead of the -ETIMEDOUT used by i2c */
82 return -ETIME;
83 }
84 }
85 log_debug("i=%d\n", i);
86
87 return 0;
88}
89
90/* Clear pending interrupts */
91static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
92{
93 struct cr50_priv *priv = dev_get_priv(dev);
94
95 if (priv->use_irq)
96 irq_read_and_clear(&priv->irq);
97}
98
99/*
100 * cr50_i2c_read() - read from TPM register
101 *
102 * @dev: TPM chip information
103 * @addr: register address to read from
104 * @buffer: provided by caller
105 * @len: number of bytes to read
106 *
107 * 1) send register address byte 'addr' to the TPM
108 * 2) wait for TPM to indicate it is ready
109 * 3) read 'len' bytes of TPM response into the provided 'buffer'
110 *
111 * Return 0 on success. -ve on error
112 */
113static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
114 size_t len)
115{
116 int ret;
117
118 /* Clear interrupt before starting transaction */
119 cr50_i2c_clear_tpm_irq(dev);
120
121 /* Send the register address byte to the TPM */
122 ret = dm_i2c_write(dev, 0, &addr, 1);
123 if (ret) {
124 log_err("Address write failed (err=%d)\n", ret);
125 return ret;
126 }
127
128 /* Wait for TPM to be ready with response data */
129 ret = cr50_i2c_wait_tpm_ready(dev);
130 if (ret)
131 return ret;
132
133 /* Read response data frrom the TPM */
134 ret = dm_i2c_read(dev, 0, buffer, len);
135 if (ret) {
136 log_err("Read response failed (err=%d)\n", ret);
137 return ret;
138 }
139
140 return 0;
141}
142
143/*
144 * cr50_i2c_write() - write to TPM register
145 *
146 * @dev: TPM chip information
147 * @addr: register address to write to
148 * @buffer: data to write
149 * @len: number of bytes to write
150 *
151 * 1) prepend the provided address to the provided data
152 * 2) send the address+data to the TPM
153 * 3) wait for TPM to indicate it is done writing
154 *
155 * Returns -1 on error, 0 on success.
156 */
157static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
158 size_t len)
159{
160 u8 buf[len + 1];
161 int ret;
162
163 if (len > CR50_MAX_BUF_SIZE) {
164 log_err("Length %zd is too large\n", len);
165 return -E2BIG;
166 }
167
168 /* Prepend the 'register address' to the buffer */
169 buf[0] = addr;
170 memcpy(buf + 1, buffer, len);
171
172 /* Clear interrupt before starting transaction */
173 cr50_i2c_clear_tpm_irq(dev);
174
175 /* Send write request buffer with address */
176 ret = dm_i2c_write(dev, 0, buf, len + 1);
177 if (ret) {
178 log_err("Error writing to TPM (err=%d)\n", ret);
179 return ret;
180 }
181
182 /* Wait for TPM to be ready */
183 return cr50_i2c_wait_tpm_ready(dev);
184}
185
186static inline u8 tpm_access(u8 locality)
187{
188 return 0x0 | (locality << 4);
189}
190
191static inline u8 tpm_sts(u8 locality)
192{
193 return 0x1 | (locality << 4);
194}
195
196static inline u8 tpm_data_fifo(u8 locality)
197{
198 return 0x5 | (locality << 4);
199}
200
201static inline u8 tpm_did_vid(u8 locality)
202{
203 return 0x6 | (locality << 4);
204}
205
206static int release_locality(struct udevice *dev, int force)
207{
208 struct cr50_priv *priv = dev_get_priv(dev);
209 u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
210 u8 addr = tpm_access(priv->locality);
211 int ret;
212 u8 buf;
213
214 ret = cr50_i2c_read(dev, addr, &buf, 1);
215 if (ret)
216 return ret;
217
218 if (force || (buf & mask) == mask) {
219 buf = TPM_ACCESS_ACTIVE_LOCALITY;
220 cr50_i2c_write(dev, addr, &buf, 1);
221 }
222
Simon Glass79b7ade2020-04-08 16:57:22 -0600223 priv->locality = -1;
Simon Glassd36856a2020-02-06 09:55:04 -0700224
225 return 0;
226}
227
228/* cr50 requires all 4 bytes of status register to be read */
229static int cr50_i2c_status(struct udevice *dev)
230{
231 struct cr50_priv *priv = dev_get_priv(dev);
232 u8 buf[4];
233 int ret;
234
235 ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
236 if (ret) {
237 log_warning("%s: Failed to read status\n", __func__);
238 return ret;
239 }
240
241 return buf[0];
242}
243
244/* cr50 requires all 4 bytes of status register to be written */
245static int cr50_i2c_ready(struct udevice *dev)
246{
247 struct cr50_priv *priv = dev_get_priv(dev);
248 u8 buf[4] = { TPM_STS_COMMAND_READY };
249 int ret;
250
251 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
252 if (ret)
253 return ret;
254
255 udelay(TIMEOUT_SHORT_US);
256
257 return 0;
258}
259
260static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
261 size_t *burst, int *status)
262{
263 struct cr50_priv *priv = dev_get_priv(dev);
264 ulong timeout;
265 u32 buf;
266
267 /*
268 * cr50 uses bytes 3:2 of status register for burst count and all 4
269 * bytes must be read
270 */
271 timeout = timer_get_us() + TIMEOUT_LONG_US;
272 while (timer_get_us() < timeout) {
273 if (cr50_i2c_read(dev, tpm_sts(priv->locality),
274 (u8 *)&buf, sizeof(buf)) < 0) {
275 udelay(TIMEOUT_SHORT_US);
276 continue;
277 }
278
279 *status = buf & 0xff;
280 *burst = le16_to_cpu((buf >> 8) & 0xffff);
281
282 if ((*status & mask) == mask &&
283 *burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
284 return 0;
285
286 udelay(TIMEOUT_SHORT_US);
287 }
288
289 log_warning("Timeout reading burst and status\n");
290
291 return -ETIMEDOUT;
292}
293
294static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
295{
296 struct cr50_priv *priv = dev_get_priv(dev);
297 size_t burstcnt, expected, current, len;
298 u8 addr = tpm_data_fifo(priv->locality);
299 u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
300 u32 expected_buf;
301 int status;
302 int ret;
303
304 log_debug("%s: len=%x\n", __func__, buf_len);
305 if (buf_len < TPM_HEADER_SIZE)
306 return -E2BIG;
307
308 ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
309 if (ret < 0) {
310 log_warning("First chunk not available\n");
311 goto out_err;
312 }
313
314 /* Read first chunk of burstcnt bytes */
315 if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
316 log_warning("Read failed\n");
317 goto out_err;
318 }
319
320 /* Determine expected data in the return buffer */
321 memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
322 expected = be32_to_cpu(expected_buf);
323 if (expected > buf_len) {
324 log_warning("Too much data: %zu > %zu\n", expected, buf_len);
325 goto out_err;
326 }
327
328 /* Now read the rest of the data */
329 current = burstcnt;
330 while (current < expected) {
331 /* Read updated burst count and check status */
332 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
333 log_warning("- burst failure1\n");
334 goto out_err;
335 }
336
337 len = min(burstcnt, expected - current);
338 if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
339 log_warning("Read failed\n");
340 goto out_err;
341 }
342
343 current += len;
344 }
345
346 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
347 &status) < 0) {
348 log_warning("- burst failure2\n");
349 goto out_err;
350 }
351 if (status & TPM_STS_DATA_AVAIL) {
352 log_warning("Data still available\n");
353 goto out_err;
354 }
355
356 return current;
357
358out_err:
359 /* Abort current transaction if still pending */
360 ret = cr50_i2c_status(dev);
361 if (ret < 0)
362 return ret;
363 if (ret & TPM_STS_COMMAND_READY) {
364 ret = cr50_i2c_ready(dev);
365 if (ret)
366 return ret;
367 }
368
369 return -EIO;
370}
371
372static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
373{
374 struct cr50_priv *priv = dev_get_priv(dev);
375
376 int status;
377 size_t burstcnt, limit, sent = 0;
378 u8 tpm_go[4] = { TPM_STS_GO };
379 ulong timeout;
380 int ret;
381
382 log_debug("%s: len=%x\n", __func__, len);
383 timeout = timer_get_us() + TIMEOUT_LONG_US;
384 do {
385 ret = cr50_i2c_status(dev);
386 if (ret < 0)
387 goto out_err;
388 if (ret & TPM_STS_COMMAND_READY)
389 break;
390
391 if (timer_get_us() > timeout)
392 goto out_err;
393
394 ret = cr50_i2c_ready(dev);
395 if (ret)
396 goto out_err;
397 } while (1);
398
399 while (len > 0) {
400 u8 mask = TPM_STS_VALID;
401
402 /* Wait for data if this is not the first chunk */
403 if (sent > 0)
404 mask |= TPM_STS_DATA_EXPECT;
405
406 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
407 goto out_err;
408
409 /*
410 * Use burstcnt - 1 to account for the address byte
411 * that is inserted by cr50_i2c_write()
412 */
413 limit = min(burstcnt - 1, len);
414 if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
415 &buf[sent], limit) != 0) {
416 log_warning("Write failed\n");
417 goto out_err;
418 }
419
420 sent += limit;
421 len -= limit;
422 }
423
424 /* Ensure TPM is not expecting more data */
425 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
426 goto out_err;
427 if (status & TPM_STS_DATA_EXPECT) {
428 log_warning("Data still expected\n");
429 goto out_err;
430 }
431
432 /* Start the TPM command */
433 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
434 sizeof(tpm_go));
435 if (ret) {
436 log_warning("Start command failed\n");
437 goto out_err;
438 }
439
440 return sent;
441
442out_err:
443 /* Abort current transaction if still pending */
444 ret = cr50_i2c_status(dev);
445
446 if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
447 ret = cr50_i2c_ready(dev);
448 if (ret)
449 return ret;
450 }
451
452 return -EIO;
453}
454
455/**
456 * process_reset() - Wait for the Cr50 to reset
457 *
458 * Cr50 processes reset requests asynchronously and conceivably could be busy
459 * executing a long command and not reacting to the reset pulse for a while.
460 *
461 * This function will make sure that the AP does not proceed with boot until
462 * TPM finished reset processing.
463 *
464 * @dev: Cr50 device
465 * @return 0 if OK, -EPERM if locality could not be taken
466 */
467static int process_reset(struct udevice *dev)
468{
469 const int loc = 0;
470 u8 access;
471 ulong start;
472
473 /*
474 * Locality is released by TPM reset.
475 *
476 * If locality is taken at this point, this could be due to the fact
477 * that the TPM is performing a long operation and has not processed
478 * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
479 * it releases locality when reset is processed.
480 */
481 start = get_timer(0);
482 do {
483 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
484 int ret;
485
486 ret = cr50_i2c_read(dev, tpm_access(loc),
487 &access, sizeof(access));
488 if (ret || ((access & mask) == mask)) {
489 /*
490 * Don't bombard the chip with traffic; let it keep
491 * processing the command.
492 */
493 mdelay(2);
494 continue;
495 }
496
497 log_warning("TPM ready after %ld ms\n", get_timer(start));
498
499 return 0;
500 } while (get_timer(start) < TIMEOUT_INIT_MS);
501
502 log_warning("TPM failed to reset after %ld ms, status: %#x\n",
503 get_timer(start), access);
504
505 return -EPERM;
506}
507
508/*
509 * Locality could be already claimed (if this is a later U-Boot phase and the
510 * read-only U-Boot did not release it), or not yet claimed, if this is TPL or
511 * the older read-only U-Boot did release it.
512 */
513static int claim_locality(struct udevice *dev, int loc)
514{
515 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
Simon Glass79b7ade2020-04-08 16:57:22 -0600516 struct cr50_priv *priv = dev_get_priv(dev);
Simon Glassd36856a2020-02-06 09:55:04 -0700517 u8 access;
518 int ret;
519
520 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
521 if (ret)
522 return log_msg_ret("read1", ret);
523
524 if ((access & mask) == mask) {
525 log_warning("Locality already claimed\n");
526 return 0;
527 }
528
529 access = TPM_ACCESS_REQUEST_USE;
530 ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
531 if (ret)
532 return log_msg_ret("write", ret);
533
534 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
535 if (ret)
536 return log_msg_ret("read2", ret);
537
538 if ((access & mask) != mask) {
539 log_err("Failed to claim locality\n");
540 return -EPERM;
541 }
542 log_info("Claimed locality %d\n", loc);
Simon Glass79b7ade2020-04-08 16:57:22 -0600543 priv->locality = loc;
Simon Glassd36856a2020-02-06 09:55:04 -0700544
545 return 0;
546}
547
548static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
549{
550 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
551 struct cr50_priv *priv = dev_get_priv(dev);
552
553 return snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x) irq=%d",
554 chip->chip_addr, priv->vendor >> 16, priv->use_irq);
555}
556
557static int cr50_i2c_open(struct udevice *dev)
558{
559 char buf[80];
560 int ret;
561
562 ret = process_reset(dev);
563 if (ret)
564 return log_msg_ret("reset", ret);
565
566 ret = claim_locality(dev, 0);
567 if (ret)
568 return log_msg_ret("claim", ret);
569
570 cr50_i2c_get_desc(dev, buf, sizeof(buf));
571 log_debug("%s\n", buf);
572
573 return 0;
574}
575
576static int cr50_i2c_cleanup(struct udevice *dev)
577{
Simon Glass79b7ade2020-04-08 16:57:22 -0600578 struct cr50_priv *priv = dev_get_priv(dev);
579
580 printf("%s: cleanup %d\n", __func__, priv->locality);
581 if (priv->locality != -1)
582 release_locality(dev, 1);
Simon Glassd36856a2020-02-06 09:55:04 -0700583
584 return 0;
585}
586
Simon Glasseaac9712020-09-22 12:45:24 -0600587static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
588{
589 char scope[ACPI_PATH_MAX];
590 char name[ACPI_NAME_MAX];
591 const char *hid;
592 int ret;
593
594 ret = acpi_device_scope(dev, scope, sizeof(scope));
595 if (ret)
596 return log_msg_ret("scope", ret);
597 ret = acpi_get_name(dev, name);
598 if (ret)
599 return log_msg_ret("name", ret);
600
601 hid = dev_read_string(dev, "acpi,hid");
602 if (!hid)
603 return log_msg_ret("hid", ret);
604
605 /* Device */
606 acpigen_write_scope(ctx, scope);
607 acpigen_write_device(ctx, name);
608 acpigen_write_name_string(ctx, "_HID", hid);
609 acpigen_write_name_integer(ctx, "_UID",
610 dev_read_u32_default(dev, "acpi,uid", 0));
611 acpigen_write_name_string(ctx, "_DDN",
612 dev_read_string(dev, "acpi,ddn"));
613 acpigen_write_sta(ctx, acpi_device_status(dev));
614
615 /* Resources */
616 acpigen_write_name(ctx, "_CRS");
617 acpigen_write_resourcetemplate_header(ctx);
618 ret = acpi_device_write_i2c_dev(ctx, dev);
619 if (ret < 0)
620 return log_msg_ret("i2c", ret);
621 ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
622 "ready-gpios");
623 if (ret < 0)
624 return log_msg_ret("irq_gpio", ret);
625
626 acpigen_write_resourcetemplate_footer(ctx);
627
628 acpigen_pop_len(ctx); /* Device */
629 acpigen_pop_len(ctx); /* Scope */
630
631 return 0;
632}
633
Simon Glassd36856a2020-02-06 09:55:04 -0700634enum {
635 TPM_TIMEOUT_MS = 5,
636 SHORT_TIMEOUT_MS = 750,
637 LONG_TIMEOUT_MS = 2000,
638};
639
640static int cr50_i2c_ofdata_to_platdata(struct udevice *dev)
641{
642 struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
643 struct cr50_priv *priv = dev_get_priv(dev);
644 struct irq irq;
645 int ret;
646
647 upriv->version = TPM_V2;
648 upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
649 upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
650 upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
651 upriv->retry_time_ms = TPM_TIMEOUT_MS;
652
653 upriv->pcr_count = 32;
654 upriv->pcr_select_min = 2;
655
656 /* Optional GPIO to track when cr50 is ready */
657 ret = irq_get_by_index(dev, 0, &irq);
658 if (!ret) {
659 priv->irq = irq;
660 priv->use_irq = true;
661 } else {
Simon Glass32e8ee02020-04-08 16:57:24 -0600662 ret = gpio_request_by_name(dev, "ready-gpios", 0,
Simon Glassd36856a2020-02-06 09:55:04 -0700663 &priv->ready_gpio, GPIOD_IS_IN);
664 if (ret) {
665 log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
666 ret);
667 }
668 }
669
670 return 0;
671}
672
673static int cr50_i2c_probe(struct udevice *dev)
674{
675 struct cr50_priv *priv = dev_get_priv(dev);
676 u32 vendor = 0;
677 ulong start;
678
679 /*
680 * 150ms should be enough to synchronise with the TPM even under the
681 * worst nested-reset-request conditions. In the vast majority of cases
682 * there will be no wait at all.
683 */
684 start = get_timer(0);
685 while (get_timer(start) < 150) {
686 int ret;
687
688 /* Exit once DID and VID verified */
689 ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
690 if (!ret && vendor == CR50_DID_VID)
691 break;
692
693 /* TPM might be resetting; let's retry in a bit */
694 mdelay(10);
695 }
696 if (vendor != CR50_DID_VID) {
697 log_debug("DID_VID %08x not recognised\n", vendor);
698 return log_msg_ret("vendor-id", -EXDEV);
699 }
700 priv->vendor = vendor;
Simon Glass79b7ade2020-04-08 16:57:22 -0600701 priv->locality = -1;
Simon Glassd36856a2020-02-06 09:55:04 -0700702
703 return 0;
704}
705
Simon Glasseaac9712020-09-22 12:45:24 -0600706struct acpi_ops cr50_acpi_ops = {
707 .fill_ssdt = cr50_acpi_fill_ssdt,
708};
709
Simon Glassd36856a2020-02-06 09:55:04 -0700710static const struct tpm_ops cr50_i2c_ops = {
711 .open = cr50_i2c_open,
712 .get_desc = cr50_i2c_get_desc,
713 .send = cr50_i2c_send,
714 .recv = cr50_i2c_recv,
715 .cleanup = cr50_i2c_cleanup,
716};
717
718static const struct udevice_id cr50_i2c_ids[] = {
719 { .compatible = "google,cr50" },
720 { }
721};
722
723U_BOOT_DRIVER(cr50_i2c) = {
724 .name = "cr50_i2c",
725 .id = UCLASS_TPM,
726 .of_match = cr50_i2c_ids,
727 .ops = &cr50_i2c_ops,
728 .ofdata_to_platdata = cr50_i2c_ofdata_to_platdata,
729 .probe = cr50_i2c_probe,
Simon Glass79b7ade2020-04-08 16:57:22 -0600730 .remove = cr50_i2c_cleanup,
Simon Glassd36856a2020-02-06 09:55:04 -0700731 .priv_auto_alloc_size = sizeof(struct cr50_priv),
Simon Glasseaac9712020-09-22 12:45:24 -0600732 ACPI_OPS_PTR(&cr50_acpi_ops)
Simon Glass79b7ade2020-04-08 16:57:22 -0600733 .flags = DM_FLAG_OS_PREPARE,
Simon Glassd36856a2020-02-06 09:55:04 -0700734};