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Anatolij Gustschin4387cf12012-08-31 01:29:57 +00001/*
2 * Common configuration options for ifm camera boards
3 *
4 * (C) Copyright 2005
5 * Sebastien Cazaux, ifm electronic gmbh
6 *
7 * (C) Copyright 2012
8 * DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Anatolij Gustschin4387cf12012-08-31 01:29:57 +000011 */
12
13#ifndef __O2D_CONFIG_H
14#define __O2D_CONFIG_H
15
16/*
17 * High Level Configuration Options
18 */
Anatolij Gustschin4387cf12012-08-31 01:29:57 +000019#define CONFIG_MPC5200
Anatolij Gustschin80869882014-10-21 22:31:26 +020020#define CONFIG_DISPLAY_BOARDINFO
21#define CONFIG_SYS_GENERIC_BOARD
Anatolij Gustschin4387cf12012-08-31 01:29:57 +000022
23#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* running at 33.000000MHz */
24
25#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
26#if defined(CONFIG_CMD_KGDB)
27/* log base 2 of the above value */
28#define CONFIG_SYS_CACHELINE_SHIFT 5
29#endif
30
31/*
32#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
33 CONFIG_SYS_POST_I2C)
34*/
35
36#ifdef CONFIG_POST
37/* preserve space for the post_word at end of on-chip SRAM */
38#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
39#endif
40
41/*
42 * Serial console configuration
43 */
44#define CONFIG_PSC_CONSOLE 5 /* console is on PSC5 */
45#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
46#define CONFIG_SYS_BAUDRATE_TABLE \
47 { 9600, 19200, 38400, 57600, 115200, 230400 }
48
49/*
50 * PCI Mapping:
51 * 0x40000000 - 0x4fffffff - PCI Memory
52 * 0x50000000 - 0x50ffffff - PCI IO Space
53 */
54#undef CONFIG_PCI
55#define CONFIG_PCI_PNP 1
56
57#define CONFIG_PCI_MEM_BUS 0x40000000
58#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
59#define CONFIG_PCI_MEM_SIZE 0x10000000
60
61#define CONFIG_PCI_IO_BUS 0x50000000
62#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
63#define CONFIG_PCI_IO_SIZE 0x01000000
64
65#define CONFIG_SYS_XLB_PIPELINING 1
66
67/* Partitions */
68#define CONFIG_MAC_PARTITION
69#define CONFIG_DOS_PARTITION
70#define CONFIG_ISO_PARTITION
71
72#define CONFIG_TIMESTAMP /* Print image info with timestamp */
73
74#define CONFIG_SYS_ALT_MEMTEST /* Much more complex memory test */
75
76/*
77 * Supported commands
78 */
79#include <config_cmd_default.h>
80
81#define CONFIG_CMD_EEPROM
82#define CONFIG_CMD_FAT
83#define CONFIG_CMD_I2C
84#define CONFIG_CMD_MII
85#define CONFIG_CMD_PING
86#define CONFIG_CMD_DHCP
87#ifdef CONFIG_PCI
88#define CONFIG_CMD_PCI
89#endif
90#ifdef CONFIG_POST
91#define CONFIG_CMD_DIAG
92#endif
93
94#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
95/* Boot low with 16 or 32 MB Flash */
96#define CONFIG_SYS_LOWBOOT 1
97#elif (CONFIG_SYS_TEXT_BASE != 0x00100000)
98#error "CONFIG_SYS_TEXT_BASE value is invalid"
99#endif
100
101/*
102 * Autobooting
103 * Be selective on what keys can delay or stop the autoboot process
104 * To stop use: "++++++++++"
105 */
106#define CONFIG_AUTOBOOT_KEYED
107#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
108 "press password to stop\n", bootdelay
109#define CONFIG_AUTOBOOT_STOP_STR "++++++++++"
110#undef CONFIG_AUTOBOOT_DELAY_STR
111#define DEBUG_BOOTKEYS 0
112
113#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
114
115#define CONFIG_PREBOOT "run master"
116
117#undef CONFIG_BOOTARGS
118
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000119#if !defined(CONFIG_CONSOLE_DEV)
120#define CONFIG_CONSOLE_DEV "ttyPSC1"
121#endif
122
123/*
124 * Default environment for booting old and new kernel versions
125 */
126#define CONFIG_IFM_DEFAULT_ENV_OLD \
127 "flash_self_old=run ramargs addip addmem;" \
128 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
129 "flash_nfs_old=run nfsargs addip addmem;" \
130 "bootm ${kernel_addr}\0" \
131 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
132 "run nfsargs addip addmem;" \
133 "bootm ${kernel_addr_r}\0"
134
135#define CONFIG_IFM_DEFAULT_ENV_NEW \
136 "fdt_addr_r=900000\0" \
137 "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0" \
138 "flash_self=run ramargs addip addtty addmisc;" \
139 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
140 "flash_nfs=run nfsargs addip addtty addmisc;" \
141 "bootm ${kernel_addr} - ${fdt_addr}\0" \
142 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
143 "tftp ${fdt_addr_r} ${fdt_file}; " \
144 "run nfsargs addip addtty addmisc;" \
145 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
146
147#define CONFIG_IFM_DEFAULT_ENV_SETTINGS \
148 "IOpin=0x64\0" \
149 "addip=setenv bootargs ${bootargs} " \
150 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
151 ":${hostname}:${netdev}:off panic=1\0" \
152 "addmem=setenv bootargs ${bootargs} ${memlimit}\0" \
153 "addmisc=sete bootargs ${bootargs} ${miscargs}\0" \
154 "addtty=sete bootargs ${bootargs} console=" \
155 CONFIG_CONSOLE_DEV ",${baudrate}\0" \
156 "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
157 "kernel_addr_r=600000\0" \
158 "initrd_high=0x03e00000\0" \
159 "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200160 "memtest=mtest 0x00100000 "__stringify(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000161 "netdev=eth0\0" \
162 "nfsargs=setenv bootargs root=/dev/nfs rw " \
163 "nfsroot=${serverip}:${rootpath}\0" \
164 "ramargs=setenv bootargs root=/dev/ram rw\0" \
165 "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
166 "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
167 "cp.b ${fileaddr} ${linbot} ${filesize}\0" \
168 "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
169 "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};" \
170 "cp.b ${fileaddr} ${rambot} ${filesize}\0" \
171 "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0" \
172 "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};" \
173 "cp.b ${fileaddr} ${jffbot} ${filesize}\0" \
174 "rootpath=/opt/eldk/ppc_6xx\0" \
175 "uboname=" CONFIG_BOARD_NAME \
176 "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0" \
177 "progubo=tftp 200000 ${uboname};" \
178 "protect off ${ubobot} ${ubotop};" \
179 "erase ${ubobot} ${ubotop};" \
180 "cp.b ${fileaddr} ${ubobot} ${filesize}\0" \
181 "unlock=yes\0" \
182 "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;" \
183 "setenv bootdelay 1;" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200184 "crc32 "__stringify(CONFIG_SYS_TEXT_BASE)" " \
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000185 BOARD_POST_CRC32_END";" \
186 "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0"
187
188#define CONFIG_BOOTCOMMAND "run post"
189
190/*
191 * IPB Bus clocking configuration.
192 */
193#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
194
195#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
196/*
197 * PCI Bus clocking configuration
198 *
199 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
200 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
201 * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
202 */
203#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
204#endif
205
206/*
207 * I2C configuration
208 */
209#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
210#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 or #2 */
211#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
212#define CONFIG_SYS_I2C_SLAVE 0x7F
213
214/*
215 * EEPROM configuration:
216 *
217 * O2DNT board is equiped with Ramtron FRAM device FM24CL16
218 * 16 Kib Ferroelectric Nonvolatile serial RAM memory
219 * organized as 2048 x 8 bits and addressable as eight I2C devices
220 * 0x50 ... 0x57 each 256 bytes in size
221 *
222 */
223#define CONFIG_SYS_I2C_FRAM
224#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
225#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
226#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
227/*
228 * There is no write delay with FRAM, write operations are performed at bus
229 * speed. Thus, no status polling or write delay is needed.
230 */
231
232/*
233 * Flash configuration
234 */
235#define CONFIG_SYS_FLASH_CFI 1
236#define CONFIG_FLASH_CFI_DRIVER 1
237#define CONFIG_FLASH_16BIT
238#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
239#define CONFIG_SYS_FLASH_CFI_AMD_RESET
240#define CONFIG_SYS_FLASH_EMPTY_INFO
241
242#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
243#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
244#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Erase Timeout (in ms) */
245#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (in ms) */
246/* Timeout for Flash Clear Lock Bits (in ms) */
247#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000
248/* "Real" (hardware) sectors protection */
249#define CONFIG_SYS_FLASH_PROTECTION
250
251/*
252 * Environment settings
253 */
254#define CONFIG_ENV_IS_IN_FLASH 1
255#define CONFIG_ENV_SIZE 0x20000
256#define CONFIG_ENV_SECT_SIZE 0x20000
257#define CONFIG_ENV_OVERWRITE 1
258#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
259
260/*
261 * Memory map
262 */
263#define CONFIG_SYS_MBAR 0xF0000000
264#define CONFIG_SYS_SDRAM_BASE 0x00000000
265#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
266
267/* Use SRAM until RAM will be available */
268#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
269#ifdef CONFIG_POST
270/* preserve space for the post_word at end of on-chip SRAM */
271#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
272#else
273/* End of used area in DPRAM */
274#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
275#endif
276
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000277#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
Masahiro Yamada627b73e2014-02-07 09:23:03 +0900278 GENERATED_GBL_DATA_SIZE)
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000279#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
280
281#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
282#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* 192 kB for Monitor */
283#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */
284#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial map for Linux */
285
286#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
287#define CONFIG_SYS_RAMBOOT 1
288#endif
289
290/*
291 * Ethernet configuration
292 */
293#define CONFIG_MPC5xxx_FEC
294#define CONFIG_MPC5xxx_FEC_MII100
295#define CONFIG_PHY_ADDR 0x00
296#define CONFIG_RESET_PHY_R
297
298/*
299 * GPIO configuration
300 */
301#define CONFIG_SYS_GPIO_DATADIR 0x00000064 /* PSC1_2, PSC2_1,2 output */
302#define CONFIG_SYS_GPIO_OPENDRAIN 0x00000000 /* No open drain */
303#define CONFIG_SYS_GPIO_DATAVALUE 0x00000000 /* PSC1_1 to 1, rest to 0 */
304#define CONFIG_SYS_GPIO_ENABLE 0x00000064 /* PSC1_2, PSC2_1,2 enable */
305
306/*
307 * Miscellaneous configurable options
308 */
309#define CONFIG_SYS_LONGHELP /* undef to save memory */
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000310#define CONFIG_CMDLINE_EDITING
311#define CONFIG_SYS_HUSH_PARSER
312
313#if defined(CONFIG_CMD_KGDB)
314#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
315#else
316#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
317#endif
318/* Print Buffer Size */
319#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
320 sizeof(CONFIG_SYS_PROMPT) + 16)
321/* max number of command args */
322#define CONFIG_SYS_MAXARGS 16
323/* Boot Argument Buffer Size */
324#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
325
326/* default load address */
327#define CONFIG_SYS_LOAD_ADDR 0x100000
328
329/* decrementer freq: 1 ms ticks */
Anatolij Gustschin4387cf12012-08-31 01:29:57 +0000330
331/*
332 * Various low-level settings
333 */
334#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
335#define CONFIG_SYS_HID0_FINAL HID0_ICE
336
337#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
338#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
339#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
340#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
341
342#define CONFIG_BOARD_EARLY_INIT_R
343
344#define CONFIG_SYS_CS_BURST 0x00000000
345#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
346
347/*
348 * DT support
349 */
350#define CONFIG_OF_LIBFDT 1
351#define CONFIG_OF_BOARD_SETUP 1
352
353#define OF_CPU "PowerPC,5200@0"
354#define OF_SOC "soc5200@f0000000"
355#define OF_TBCLK (bd->bi_busfreq / 4)
356
357#endif /* __O2D_CONFIG_H */