blob: 49eadb9212e87e40c248ae02a631fb6820778afa [file] [log] [blame]
Stefan Roese8a316c92005-08-01 16:49:12 +02001/*
2 * (C) Copyright 2000-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
Stefan Roese8a316c92005-08-01 16:49:12 +020023
24#include <common.h>
25#include <asm/processor.h>
Stefan Roese779e9752007-08-14 14:44:41 +020026#include <asm/io.h>
27
28long int spd_sdram(void);
Stefan Roese8a316c92005-08-01 16:49:12 +020029
30int board_early_init_f(void)
31{
Stefan Roese952e7762009-09-24 09:55:50 +020032 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
33 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
34 mtdcr(UIC0CR, 0x00000010);
35 mtdcr(UIC0PR, 0xFFFF7FF0); /* set int polarities */
36 mtdcr(UIC0TR, 0x00000010); /* set int trigger levels */
37 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
Stefan Roese8a316c92005-08-01 16:49:12 +020038
Stefan Roese779e9752007-08-14 14:44:41 +020039 /*
40 * Configure CPC0_PCI to enable PerWE as output
41 * and enable the internal PCI arbiter if selected
42 */
43 if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
Stefan Roesed1c3b272009-09-09 16:25:29 +020044 mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
Stefan Roese779e9752007-08-14 14:44:41 +020045 else
Stefan Roesed1c3b272009-09-09 16:25:29 +020046 mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN);
Stefan Roese779e9752007-08-14 14:44:41 +020047
Stefan Roese8a316c92005-08-01 16:49:12 +020048 return 0;
49}
50
51/*
52 * Check Board Identity:
53 */
54int checkboard(void)
55{
Wolfgang Denk77ddac92005-10-13 16:45:02 +020056 char *s = getenv("serial#");
Stefan Roese8a316c92005-08-01 16:49:12 +020057
58 puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
59
60 if (s != NULL) {
61 puts(", serial# ");
62 puts(s);
63 }
64 putc('\n');
65
66 return (0);
67}
68
Stefan Roese8a316c92005-08-01 16:49:12 +020069/* -------------------------------------------------------------------------
70 initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
71 the necessary info for SDRAM controller configuration
72 ------------------------------------------------------------------------- */
Becky Bruce9973e3c2008-06-09 16:03:40 -050073phys_size_t initdram(int board_type)
Stefan Roese8a316c92005-08-01 16:49:12 +020074{
75 long int ret;
76
77 ret = spd_sdram();
78 return ret;
79}