blob: 184cca4c543764d4a5bbc8566a00354176c45a9f [file] [log] [blame]
Mingkai Hu234a89d2009-09-22 14:53:21 +08001/*
2 * Copyright 2009 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24#include <asm/io.h>
25
26void cpu_init_f(void)
27{
28 ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
29
30 /*
31 * LCRR - Clock Ratio Register - set up local bus timing
32 * when needed
33 */
34 out_be32(&lbc->lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
35
36#if defined(CONFIG_NAND_BR_PRELIM) && defined(CONFIG_NAND_OR_PRELIM)
37 out_be32(&lbc->br0, CONFIG_NAND_BR_PRELIM);
38 out_be32(&lbc->or0, CONFIG_NAND_OR_PRELIM);
39#else
40#error CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must be defined
41#endif
42
43#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
44 ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
45 char *l2srbar;
46 int i;
47
48 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
49
50 /* set MBECCDIS=1, SBECCDIS=1 */
51 out_be32(&l2cache->l2errdis,
52 (MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
53
54 /* set L2E=1 & L2SRAM=001 */
55 out_be32(&l2cache->l2ctl,
56 (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
57
58 /* Initialize L2 SRAM to zero */
59 l2srbar = (char *)CONFIG_SYS_INIT_L2_ADDR;
60 for (i = 0; i < CONFIG_SYS_L2_SIZE; i++)
61 l2srbar[i] = 0;
62#endif
63}