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Chin Liang See68e17472013-08-07 10:08:03 -05001/*
2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7
8#include <common.h>
9#include <asm/io.h>
Marek Vasut65d372c2015-08-24 11:51:46 +020010#include <asm/arch/reset_manager.h>
Chin Liang See68e17472013-08-07 10:08:03 -050011
12DECLARE_GLOBAL_DATA_PTR;
13
14static const struct socfpga_reset_manager *reset_manager_base =
15 (void *)SOCFPGA_RSTMGR_ADDRESS;
Marek Vasut31916112015-07-09 04:27:28 +020016
17/*
Chin Liang See68e17472013-08-07 10:08:03 -050018 * Write the reset manager register to cause reset
19 */
20void reset_cpu(ulong addr)
21{
22 /* request a warm reset */
Ley Foon Tan2b09ea42017-04-26 02:44:34 +080023 writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
24 &reset_manager_base->ctrl);
Chin Liang See68e17472013-08-07 10:08:03 -050025 /*
26 * infinite loop here as watchdog will trigger and reset
27 * the processor
28 */
29 while (1)
30 ;
31}