Chin Liang See | 68e1747 | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Altera Corporation <www.altera.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/io.h> |
Marek Vasut | 65d372c | 2015-08-24 11:51:46 +0200 | [diff] [blame] | 10 | #include <asm/arch/reset_manager.h> |
Chin Liang See | 68e1747 | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 11 | |
| 12 | DECLARE_GLOBAL_DATA_PTR; |
| 13 | |
| 14 | static const struct socfpga_reset_manager *reset_manager_base = |
| 15 | (void *)SOCFPGA_RSTMGR_ADDRESS; |
Marek Vasut | 3191611 | 2015-07-09 04:27:28 +0200 | [diff] [blame] | 16 | |
| 17 | /* |
Chin Liang See | 68e1747 | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 18 | * Write the reset manager register to cause reset |
| 19 | */ |
| 20 | void reset_cpu(ulong addr) |
| 21 | { |
| 22 | /* request a warm reset */ |
Ley Foon Tan | 2b09ea4 | 2017-04-26 02:44:34 +0800 | [diff] [blame] | 23 | writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB, |
| 24 | &reset_manager_base->ctrl); |
Chin Liang See | 68e1747 | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 25 | /* |
| 26 | * infinite loop here as watchdog will trigger and reset |
| 27 | * the processor |
| 28 | */ |
| 29 | while (1) |
| 30 | ; |
| 31 | } |