Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com> |
| 4 | * |
| 5 | * Sunxi PMIC bus access helpers |
| 6 | * |
| 7 | * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the |
| 8 | * axp223 uses the rsb bus, these functions abstract this. |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 9 | */ |
| 10 | |
Samuel Holland | 104950a | 2021-10-08 00:17:20 -0500 | [diff] [blame] | 11 | #include <axp_pmic.h> |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 12 | #include <dm.h> |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 13 | #include <asm/arch/p2wi.h> |
| 14 | #include <asm/arch/rsb.h> |
Hans de Goede | a536077 | 2015-04-25 22:18:09 +0200 | [diff] [blame] | 15 | #include <i2c.h> |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 16 | #include <power/pmic.h> |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 17 | #include <asm/arch/pmic_bus.h> |
| 18 | |
Hans de Goede | a536077 | 2015-04-25 22:18:09 +0200 | [diff] [blame] | 19 | #define AXP152_I2C_ADDR 0x30 |
| 20 | |
| 21 | #define AXP209_I2C_ADDR 0x34 |
| 22 | |
Jernej Skrabec | fbd37d8 | 2021-01-11 21:11:33 +0100 | [diff] [blame] | 23 | #define AXP305_I2C_ADDR 0x36 |
Andre Przywara | d17d051 | 2023-07-30 01:11:01 +0100 | [diff] [blame] | 24 | #define AXP313_I2C_ADDR 0x36 |
Jernej Skrabec | fbd37d8 | 2021-01-11 21:11:33 +0100 | [diff] [blame] | 25 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 26 | #define AXP221_CHIP_ADDR 0x68 |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 27 | |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 28 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 29 | static struct udevice *pmic; |
| 30 | #else |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 31 | static int pmic_i2c_address(void) |
| 32 | { |
| 33 | if (IS_ENABLED(CONFIG_AXP152_POWER)) |
| 34 | return AXP152_I2C_ADDR; |
| 35 | if (IS_ENABLED(CONFIG_AXP305_POWER)) |
| 36 | return AXP305_I2C_ADDR; |
Andre Przywara | d17d051 | 2023-07-30 01:11:01 +0100 | [diff] [blame] | 37 | if (IS_ENABLED(CONFIG_AXP313_POWER)) |
| 38 | return AXP313_I2C_ADDR; |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 39 | |
| 40 | /* Other AXP2xx and AXP8xx variants */ |
| 41 | return AXP209_I2C_ADDR; |
| 42 | } |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 43 | #endif |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 44 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 45 | int pmic_bus_init(void) |
| 46 | { |
| 47 | /* This cannot be 0 because it is used in SPL before BSS is ready */ |
| 48 | static int needs_init = 1; |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 49 | int ret = 0; |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 50 | |
| 51 | if (!needs_init) |
| 52 | return 0; |
| 53 | |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 54 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 55 | ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic), |
| 56 | &pmic); |
| 57 | #else |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 58 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) { |
| 59 | p2wi_init(); |
| 60 | ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, |
| 61 | AXP_PMIC_MODE_REG, |
| 62 | AXP_PMIC_MODE_P2WI); |
| 63 | } else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) { |
| 64 | ret = rsb_init(); |
| 65 | if (ret) |
| 66 | return ret; |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 67 | |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 68 | ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR, |
| 69 | AXP_PMIC_PRI_RUNTIME_ADDR); |
| 70 | } |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 71 | #endif |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 72 | |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 73 | needs_init = ret; |
| 74 | |
| 75 | return ret; |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | int pmic_bus_read(u8 reg, u8 *data) |
| 79 | { |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 80 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 81 | return pmic_read(pmic, reg, data, 1); |
| 82 | #else |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 83 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) |
| 84 | return p2wi_read(reg, data); |
| 85 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) |
| 86 | return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data); |
| 87 | |
| 88 | return i2c_read(pmic_i2c_address(), reg, 1, data, 1); |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 89 | #endif |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 90 | } |
| 91 | |
| 92 | int pmic_bus_write(u8 reg, u8 data) |
| 93 | { |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 94 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 95 | return pmic_write(pmic, reg, &data, 1); |
| 96 | #else |
Samuel Holland | d3b0298 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 97 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) |
| 98 | return p2wi_write(reg, data); |
| 99 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) |
| 100 | return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data); |
| 101 | |
| 102 | return i2c_write(pmic_i2c_address(), reg, 1, &data, 1); |
Samuel Holland | 8b0eacd | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 103 | #endif |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 104 | } |
| 105 | |
| 106 | int pmic_bus_setbits(u8 reg, u8 bits) |
| 107 | { |
| 108 | int ret; |
| 109 | u8 val; |
| 110 | |
| 111 | ret = pmic_bus_read(reg, &val); |
| 112 | if (ret) |
| 113 | return ret; |
| 114 | |
Olliver Schinagl | c970e89 | 2018-11-21 20:05:26 +0200 | [diff] [blame] | 115 | if ((val & bits) == bits) |
| 116 | return 0; |
| 117 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 118 | val |= bits; |
| 119 | return pmic_bus_write(reg, val); |
| 120 | } |
| 121 | |
| 122 | int pmic_bus_clrbits(u8 reg, u8 bits) |
| 123 | { |
| 124 | int ret; |
| 125 | u8 val; |
| 126 | |
| 127 | ret = pmic_bus_read(reg, &val); |
| 128 | if (ret) |
| 129 | return ret; |
| 130 | |
Olliver Schinagl | c970e89 | 2018-11-21 20:05:26 +0200 | [diff] [blame] | 131 | if (!(val & bits)) |
| 132 | return 0; |
| 133 | |
Hans de Goede | 1d624a4 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 134 | val &= ~bits; |
| 135 | return pmic_bus_write(reg, val); |
| 136 | } |