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Sonic Zhang320ec9d2012-08-16 12:08:31 +08001/*
Bin Menga1875592016-02-05 19:30:11 -08002 * U-Boot - Configuration file for BF609 EZ-Kit board
Sonic Zhang320ec9d2012-08-16 12:08:31 +08003 */
4
5#ifndef __CONFIG_BF609_EZKIT_H__
6#define __CONFIG_BF609_EZKIT_H__
7
8#include <asm/config-pre.h>
9
10/*
11 * Processor Settings
12 */
13#define CONFIG_BFIN_CPU bf609-0.0
14#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
15
Sonic Zhang320ec9d2012-08-16 12:08:31 +080016/* For ez-board version 1.0, else undef this */
17#define CONFIG_BFIN_BOARD_VERSION_1_0
18
19/*
20 * Clock Settings
21 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
22 * SCLK = (CLKIN * VCO_MULT) / SYSCLK_DIV
23 * SCLK0 = SCLK / SCLK0_DIV
24 * SCLK1 = SCLK / SCLK1_DIV
25 */
26/* CONFIG_CLKIN_HZ is any value in Hz */
27#define CONFIG_CLKIN_HZ (25000000)
28/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
29/* 1 = CLKIN / 2 */
30#define CONFIG_CLKIN_HALF (0)
31
32/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
33/* Values can range from 0-127 (where 0 means 128) */
34#define CONFIG_VCO_MULT (20)
35
36/* CCLK_DIV controls the core clock divider */
37/* Values can range from 0-31 (where 0 means 32) */
38#define CONFIG_CCLK_DIV (1)
39/* SCLK_DIV controls the system clock divider */
40/* Values can range from 0-31 (where 0 means 32) */
41#define CONFIG_SCLK_DIV (4)
42/* Values can range from 0-7 (where 0 means 8) */
43#define CONFIG_SCLK0_DIV (1)
44#define CONFIG_SCLK1_DIV (1)
45/* DCLK_DIV controls the DDR clock divider */
46/* Values can range from 0-31 (where 0 means 32) */
47#define CONFIG_DCLK_DIV (2)
48/* OCLK_DIV controls the output clock divider */
49/* Values can range from 0-127 (where 0 means 128) */
50#define CONFIG_OCLK_DIV (16)
51
52/*
53 * Memory Settings
54 */
55#define CONFIG_MEM_SIZE 128
56
57#define CONFIG_SMC_GCTL_VAL 0x00000010
58#define CONFIG_SMC_B0CTL_VAL 0x01007011
59#define CONFIG_SMC_B0TIM_VAL 0x08170977
60#define CONFIG_SMC_B0ETIM_VAL 0x00092231
61
62#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
63#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
64
Bob Liu49c2da52011-12-27 15:05:53 +080065#define CONFIG_HW_WATCHDOG
Sonic Zhang320ec9d2012-08-16 12:08:31 +080066/*
67 * Network Settings
68 */
69#define ADI_CMDS_NETWORK
70#define CONFIG_NETCONSOLE
Sonic Zhang320ec9d2012-08-16 12:08:31 +080071#define CONFIG_HOSTNAME "bf609-ezkit"
Alexey Brodkin92a190a2014-01-22 20:54:06 +040072#define CONFIG_PHY_ADDR 1
Sonic Zhang320ec9d2012-08-16 12:08:31 +080073#define CONFIG_DW_PORTS 1
Sonic Zhang320ec9d2012-08-16 12:08:31 +080074#define CONFIG_DW_ALTDESCRIPTOR
Sonic Zhang320ec9d2012-08-16 12:08:31 +080075#define CONFIG_MII
76
77/* i2c Settings */
Scott Jiangc4697032014-11-13 15:30:55 +080078#define CONFIG_SYS_I2C
Scott Jiangfea9b692014-11-13 15:30:53 +080079#define CONFIG_SYS_I2C_ADI
Sonic Zhang320ec9d2012-08-16 12:08:31 +080080
81/*
82 * Flash Settings
83 */
Sonic Zhang320ec9d2012-08-16 12:08:31 +080084#undef CONFIG_CMD_JFFS2
85#define CONFIG_SYS_FLASH_CFI_WIDTH 2
86#define CONFIG_FLASH_CFI_DRIVER
87#define CONFIG_SYS_FLASH_BASE 0xb0000000
88#define CONFIG_SYS_FLASH_CFI
89#define CONFIG_SYS_FLASH_PROTECTION
90#define CONFIG_SYS_MAX_FLASH_BANKS 1
91#define CONFIG_SYS_MAX_FLASH_SECT 131
92#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
93
94/*
95 * SPI Settings
96 */
97#define CONFIG_BFIN_SPI6XX
98#define CONFIG_ENV_SPI_MAX_HZ 25000000
99#define CONFIG_SF_DEFAULT_SPEED 25000000
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800100#define CONFIG_SPI_FLASH_ALL
101
102/*
103 * Env Storage Settings
104 */
105#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
106#define CONFIG_ENV_IS_IN_SPI_FLASH
107#define CONFIG_ENV_OFFSET 0x10000
108#define CONFIG_ENV_SIZE 0x2000
109#define CONFIG_ENV_SECT_SIZE 0x10000
110#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
111#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
112#define CONFIG_ENV_IS_IN_NAND
113#define CONFIG_ENV_OFFSET 0x60000
114#define CONFIG_ENV_SIZE 0x20000
115#else
116#define CONFIG_ENV_IS_IN_FLASH
117#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
118#define CONFIG_ENV_OFFSET 0x8000
119#define CONFIG_ENV_SIZE 0x8000
120#define CONFIG_ENV_SECT_SIZE 0x8000
121#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
122#endif
123
124#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0xB0100000\0"
125
126/*
127 * SDH Settings
128 */
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800129#define CONFIG_BFIN_SDH
130
131/*
132 * Misc Settings
133 */
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800134#define CONFIG_UART_CONSOLE 0
135
Bob Liu7d861d92013-02-05 19:05:41 +0800136#define CONFIG_CMD_SOFTSWITCH
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800137
138#define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 20*1024*1024 + 4)
139#define CONFIG_BFIN_SOFT_SWITCH
140
Sonic Zhangda34aae2013-05-02 13:46:21 +0800141#define CONFIG_ADI_GPIO2
142
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800143#if 0
144#define CONFIG_UART_MEM 1024
145#undef CONFIG_UART_CONSOLE
146#undef CONFIG_JTAG_CONSOLE
147#undef CONFIG_UART_CONSOLE_IS_JTAG
148#endif
149
Sonic Zhang955020c2013-02-20 18:05:16 +0800150#define CONFIG_BOARD_SIZE_LIMIT $$((512 * 1024))
151
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800152/*
Sonic Zhangf4d80382013-02-05 18:57:49 +0800153 * Run core 1 from L1 SRAM start address when init uboot on core 0
154 */
155/* #define CONFIG_CORE1_RUN 1 */
156
157/*
Sonic Zhang320ec9d2012-08-16 12:08:31 +0800158 * Pull in common ADI header for remaining command/environment setup
159 */
160#include <configs/bfin_adi_common.h>
161#endif