Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Renesas Solutions AP-325RXA board |
| 3 | * |
| 4 | * Copyright (C) 2008 Renesas Solutions Corp. |
| 5 | * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __AP325RXA_H |
| 27 | #define __AP325RXA_H |
| 28 | |
| 29 | #undef DEBUG |
| 30 | #define CONFIG_SH 1 |
| 31 | #define CONFIG_SH4 1 |
| 32 | #define CONFIG_CPU_SH7723 1 |
| 33 | #define CONFIG_AP325RXA 1 |
| 34 | |
| 35 | #define CONFIG_CMD_LOADB |
| 36 | #define CONFIG_CMD_LOADS |
| 37 | #define CONFIG_CMD_FLASH |
| 38 | #define CONFIG_CMD_MEMORY |
| 39 | #define CONFIG_CMD_NET |
| 40 | #define CONFIG_CMD_PING |
| 41 | #define CONFIG_CMD_NFS |
| 42 | #define CONFIG_CMD_SDRAM |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 43 | #define CONFIG_CMD_SAVEENV |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 44 | #define CONFIG_CMD_IDE |
| 45 | #define CONFIG_CMD_EXT2 |
| 46 | #define CONFIG_DOS_PARTITION |
| 47 | |
| 48 | #define CONFIG_BAUDRATE 38400 |
| 49 | #define CONFIG_BOOTDELAY 3 |
| 50 | #define CONFIG_BOOTARGS "console=ttySC2,38400" |
| 51 | |
| 52 | #define CONFIG_VERSION_VARIABLE |
| 53 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 54 | |
| 55 | /* SMC9118 */ |
| 56 | #define CONFIG_DRIVER_SMC911X 1 |
| 57 | #define CONFIG_DRIVER_SMC911X_32_BIT 1 |
| 58 | #define CONFIG_DRIVER_SMC911X_BASE 0xB6080000 |
| 59 | |
| 60 | /* MEMORY */ |
| 61 | #define AP325RXA_SDRAM_BASE (0x88000000) |
| 62 | #define AP325RXA_FLASH_BASE_1 (0xA0000000) |
| 63 | #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) |
| 64 | |
| 65 | /* undef to save memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 66 | #define CONFIG_SYS_LONGHELP |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 67 | /* Monitor Command Prompt */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_PROMPT "=> " |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 69 | /* Buffer size for input from the Console */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | #define CONFIG_SYS_CBSIZE 256 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 71 | /* Buffer size for Console output */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 72 | #define CONFIG_SYS_PBSIZE 256 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 73 | /* max args accepted for monitor commands */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | #define CONFIG_SYS_MAXARGS 16 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 75 | /* Buffer size for Boot Arguments passed to kernel */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_BARGSIZE 512 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 77 | /* List of legal baudrate settings for this board */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 79 | |
| 80 | /* SCIF */ |
| 81 | #define CONFIG_SCIF_CONSOLE 1 |
| 82 | #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ |
| 83 | #define CONFIG_CONS_SCIF5 1 |
| 84 | |
| 85 | /* Suppress display of console information at boot */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #undef CONFIG_SYS_CONSOLE_INFO_QUIET |
| 87 | #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| 88 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 89 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) |
| 91 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 92 | |
| 93 | /* Enable alternate, more extensive, memory test */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | #undef CONFIG_SYS_ALT_MEMTEST |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 95 | /* Scratch address used by the alternate memory test */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 96 | #undef CONFIG_SYS_MEMTEST_SCRATCH |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 97 | |
| 98 | /* Enable temporary baudrate change while serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 100 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 101 | #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 102 | /* maybe more, but if so u-boot doesn't know about it... */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 104 | /* default load address for scripts ?!? */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 106 | |
| 107 | /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 109 | /* Monitor size */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 110 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 111 | /* Size of DRAM reserved for malloc() use */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 112 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 113 | /* size in bytes reserved for initial data */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | #define CONFIG_SYS_GBL_DATA_SIZE (256) |
| 115 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 116 | |
| 117 | /* FLASH */ |
| 118 | #define CONFIG_FLASH_CFI_DRIVER 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | #define CONFIG_SYS_FLASH_CFI |
| 120 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 121 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 123 | /* Physical start address of Flash memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 125 | /* Max number of sectors on each Flash chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 126 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 127 | |
| 128 | /* |
| 129 | * IDE support |
| 130 | */ |
| 131 | #define CONFIG_IDE_RESET 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | #define CONFIG_SYS_PIO_MODE 1 |
| 133 | #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ |
| 134 | #define CONFIG_SYS_IDE_MAXDEVICE 1 |
| 135 | #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 |
| 136 | #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ |
| 137 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ |
| 138 | #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ |
| 139 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 140 | |
| 141 | /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 143 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 144 | |
| 145 | /* Timeout for Flash erase operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 147 | /* Timeout for Flash write operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 148 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 149 | /* Timeout for Flash set sector lock bit operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 150 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 151 | /* Timeout for Flash clear lock bit operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 152 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 153 | |
| 154 | /* |
| 155 | * Use hardware flash sectors protection instead |
| 156 | * of U-Boot software protection |
| 157 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #undef CONFIG_SYS_FLASH_PROTECTION |
| 159 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 160 | |
| 161 | /* ENV setting */ |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 162 | #define CONFIG_ENV_IS_IN_FLASH |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 163 | #define CONFIG_ENV_OVERWRITE 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 164 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| 165 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 166 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) |
| 167 | /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ |
| 168 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 169 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 170 | |
| 171 | /* Board Clock */ |
| 172 | #define CONFIG_SYS_CLK_FREQ 33333333 |
| 173 | #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 175 | |
| 176 | #endif /* __AP325RXA_H */ |